1Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver
2
3Nuvoton NPCM7xx SOC support two PSPI channels.
4
5Required properties:
6 - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC
7 - #address-cells : should be 1. see spi-bus.txt
8 - #size-cells : should be 0. see spi-bus.txt
9 - specifies physical base address and size of the register.
10 - interrupts : contain PSPI interrupt.
11 - clocks : phandle of PSPI reference clock.
12 - clock-names: Should be "clk_apb5".
13 - pinctrl-names : a pinctrl state named "default" must be defined.
14 - pinctrl-0 : phandle referencing pin configuration of the device.
15 - cs-gpios: Specifies the gpio pins to be used for chipselects.
16            See: Documentation/devicetree/bindings/spi/spi-bus.txt
17
18Optional properties:
19- clock-frequency : Input clock frequency to the PSPI block in Hz.
20		    Default is 25000000 Hz.
21
22Aliases:
23- All the SPI controller nodes should be represented in the aliases node using
24  the following format 'spi{n}' withe the correct numbered in "aliases" node.
25
26Example:
27
28aliases {
29	spi0 = &spi0;
30};
31
32spi0: spi@f0200000 {
33	compatible = "nuvoton,npcm750-pspi";
34	reg = <0xf0200000 0x1000>;
35	pinctrl-names = "default";
36	pinctrl-0 = <&pspi1_pins>;
37	#address-cells = <1>;
38	#size-cells = <0>;
39	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
40	clocks = <&clk NPCM7XX_CLK_APB5>;
41	clock-names = "clk_apb5";
42	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
43};
44