1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPI Controller
8
9description:
10  The Rockchip SPI controller is used to interface with various devices such
11  as flash and display controllers using the SPI communication interface.
12
13allOf:
14  - $ref: "spi-controller.yaml#"
15
16maintainers:
17  - Heiko Stuebner <heiko@sntech.de>
18
19# Everything else is described in the common file
20properties:
21  compatible:
22    oneOf:
23      - const: rockchip,rk3036-spi
24      - const: rockchip,rk3066-spi
25      - const: rockchip,rk3228-spi
26      - const: rockchip,rv1108-spi
27      - items:
28          - enum:
29              - rockchip,px30-spi
30              - rockchip,rk3128-spi
31              - rockchip,rk3188-spi
32              - rockchip,rk3288-spi
33              - rockchip,rk3308-spi
34              - rockchip,rk3328-spi
35              - rockchip,rk3368-spi
36              - rockchip,rk3399-spi
37              - rockchip,rk3568-spi
38              - rockchip,rk3588-spi
39              - rockchip,rv1126-spi
40          - const: rockchip,rk3066-spi
41
42  reg:
43    maxItems: 1
44
45  interrupts:
46    maxItems: 1
47
48  clocks:
49    items:
50      - description: transfer-clock
51      - description: peripheral clock
52
53  clock-names:
54    items:
55      - const: spiclk
56      - const: apb_pclk
57
58  dmas:
59    items:
60      - description: TX DMA Channel
61      - description: RX DMA Channel
62
63  dma-names:
64    items:
65      - const: tx
66      - const: rx
67
68  rx-sample-delay-ns:
69    default: 0
70    description:
71      Nano seconds to delay after the SCLK edge before sampling Rx data
72      (may need to be fine tuned for high capacitance lines).
73      If not specified 0 will be used.
74
75  pinctrl-names:
76    minItems: 1
77    items:
78      - const: default
79      - const: sleep
80    description:
81      Names for the pin configuration(s); may be "default" or "sleep",
82      where the "sleep" configuration may describe the state
83      the pins should be in during system suspend.
84
85  power-domains:
86    maxItems: 1
87
88required:
89  - compatible
90  - reg
91  - interrupts
92  - clocks
93  - clock-names
94
95unevaluatedProperties: false
96
97examples:
98  - |
99    #include <dt-bindings/clock/rk3188-cru-common.h>
100    #include <dt-bindings/interrupt-controller/arm-gic.h>
101    #include <dt-bindings/interrupt-controller/irq.h>
102    spi0: spi@ff110000 {
103      compatible = "rockchip,rk3066-spi";
104      reg = <0xff110000 0x1000>;
105      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
106      clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
107      clock-names = "spiclk", "apb_pclk";
108      dmas = <&pdma1 11>, <&pdma1 12>;
109      dma-names = "tx", "rx";
110      pinctrl-0 = <&spi1_pins>;
111      pinctrl-1 = <&spi1_sleep>;
112      pinctrl-names = "default", "sleep";
113      rx-sample-delay-ns = <10>;
114      #address-cells = <1>;
115      #size-cells = <0>;
116    };
117