1*a2ce092bSRich FelkerJ-Core Programmable Interval Timer and Clocksource 2*a2ce092bSRich Felker 3*a2ce092bSRich FelkerRequired properties: 4*a2ce092bSRich Felker 5*a2ce092bSRich Felker- compatible: Must be "jcore,pit". 6*a2ce092bSRich Felker 7*a2ce092bSRich Felker- reg: Memory region(s) for timer/clocksource registers. For SMP, 8*a2ce092bSRich Felker there should be one region per cpu, indexed by the sequential, 9*a2ce092bSRich Felker zero-based hardware cpu number. 10*a2ce092bSRich Felker 11*a2ce092bSRich Felker- interrupts: An interrupt to assign for the timer. The actual pit 12*a2ce092bSRich Felker core is integrated with the aic and allows the timer interrupt 13*a2ce092bSRich Felker assignment to be programmed by software, but this property is 14*a2ce092bSRich Felker required in order to reserve an interrupt number that doesn't 15*a2ce092bSRich Felker conflict with other devices. 16*a2ce092bSRich Felker 17*a2ce092bSRich Felker 18*a2ce092bSRich FelkerExample: 19*a2ce092bSRich Felker 20*a2ce092bSRich Felkertimer@200 { 21*a2ce092bSRich Felker compatible = "jcore,pit"; 22*a2ce092bSRich Felker reg = < 0x200 0x30 0x500 0x30 >; 23*a2ce092bSRich Felker interrupts = < 0x48 >; 24*a2ce092bSRich Felker}; 25