1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 BayLibre, SAS
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
9
10maintainers:
11  - Neil Armstrong <narmstrong@baylibre.com>
12
13description: |
14  The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
15  in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
16  only.
17
18  A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
19
20  One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
21
22  The DWC3 Glue controls the PHY routing and power, an interrupt line is
23  connected to the Glue to serve as OTG ID change detection.
24
25properties:
26  compatible:
27    enum:
28      - amlogic,meson-g12a-usb-ctrl
29
30  ranges: true
31
32  "#address-cells":
33    enum: [ 1, 2 ]
34
35  "#size-cells":
36    enum: [ 1, 2 ]
37
38  clocks:
39    minItems: 1
40
41  resets:
42    minItems: 1
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    maxItems: 1
49
50  phy-names:
51    items:
52      - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
53      - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
54      - const: usb3-phy0 # USB3 PHY if USB3_0 is used
55
56  phys:
57    minItems: 1
58    maxItems: 3
59
60  dr_mode: true
61
62  power-domains:
63    maxItems: 1
64
65  vbus-supply:
66    description: VBUS power supply when used in OTG switchable mode
67
68patternProperties:
69  "^usb@[0-9a-f]+$":
70    type: object
71
72additionalProperties: false
73
74required:
75  - compatible
76  - "#address-cells"
77  - "#size-cells"
78  - ranges
79  - clocks
80  - resets
81  - reg
82  - interrupts
83  - phy-names
84  - phys
85  - dr_mode
86
87examples:
88  - |
89    usb: usb@ffe09000 {
90          compatible = "amlogic,meson-g12a-usb-ctrl";
91          reg = <0x0 0xffe09000 0x0 0xa0>;
92          interrupts = <16>;
93          #address-cells = <1>;
94          #size-cells = <1>;
95          ranges;
96
97          clocks = <&clkc_usb>;
98          resets = <&reset_usb>;
99
100          dr_mode = "otg";
101
102          phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
103          phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
104
105          dwc2: usb@ff400000 {
106              compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
107              reg = <0xff400000 0x40000>;
108              interrupts = <31>;
109              clocks = <&clkc_usb1>;
110              clock-names = "otg";
111              phys = <&usb2_phy1>;
112              dr_mode = "peripheral";
113              g-rx-fifo-size = <192>;
114              g-np-tx-fifo-size = <128>;
115              g-tx-fifo-size = <128 128 16 16 16>;
116          };
117
118          dwc3: usb@ff500000 {
119              compatible = "snps,dwc3";
120              reg = <0xff500000 0x100000>;
121              interrupts = <30>;
122              dr_mode = "host";
123              snps,dis_u2_susphy_quirk;
124              snps,quirk-frame-length-adjustment;
125          };
126    };
127
128