1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SuperSpeed DWC3 USB SoC controller
8
9maintainers:
10  - Wesley Cheng <quic_wcheng@quicinc.com>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - qcom,ipq4019-dwc3
17          - qcom,ipq6018-dwc3
18          - qcom,ipq8064-dwc3
19          - qcom,ipq8074-dwc3
20          - qcom,msm8953-dwc3
21          - qcom,msm8994-dwc3
22          - qcom,msm8996-dwc3
23          - qcom,msm8998-dwc3
24          - qcom,qcs404-dwc3
25          - qcom,sc7180-dwc3
26          - qcom,sc7280-dwc3
27          - qcom,sc8280xp-dwc3
28          - qcom,sdm660-dwc3
29          - qcom,sdm670-dwc3
30          - qcom,sdm845-dwc3
31          - qcom,sdx55-dwc3
32          - qcom,sdx65-dwc3
33          - qcom,sm4250-dwc3
34          - qcom,sm6115-dwc3
35          - qcom,sm6125-dwc3
36          - qcom,sm6350-dwc3
37          - qcom,sm6375-dwc3
38          - qcom,sm8150-dwc3
39          - qcom,sm8250-dwc3
40          - qcom,sm8350-dwc3
41          - qcom,sm8450-dwc3
42      - const: qcom,dwc3
43
44  reg:
45    description: Offset and length of register set for QSCRATCH wrapper
46    maxItems: 1
47
48  "#address-cells":
49    enum: [ 1, 2 ]
50
51  "#size-cells":
52    enum: [ 1, 2 ]
53
54  ranges: true
55
56  power-domains:
57    description: specifies a phandle to PM domain provider node
58    maxItems: 1
59
60  clocks:
61    description: |
62      Several clocks are used, depending on the variant. Typical ones are::
63       - cfg_noc:: System Config NOC clock.
64       - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
65                60MHz for HS operation.
66       - iface:: System bus AXI clock.
67       - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
68                 power mode (U3).
69       - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
70                     mode. Its frequency should be 19.2MHz.
71    minItems: 1
72    maxItems: 9
73
74  clock-names:
75    minItems: 1
76    maxItems: 9
77
78  assigned-clocks:
79    items:
80      - description: Phandle and clock specifier of MOCK_UTMI_CLK.
81      - description: Phandle and clock specifoer of MASTER_CLK.
82
83  assigned-clock-rates:
84    items:
85      - description: Must be 19.2MHz (19200000).
86      - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
87  resets:
88    maxItems: 1
89
90  interconnects:
91    maxItems: 2
92
93  interconnect-names:
94    items:
95      - const: usb-ddr
96      - const: apps-usb
97
98  interrupts:
99    minItems: 1
100    maxItems: 4
101
102  interrupt-names:
103    minItems: 1
104    maxItems: 4
105
106  qcom,select-utmi-as-pipe-clk:
107    description:
108      If present, disable USB3 pipe_clk requirement.
109      Used when dwc3 operates without SSPHY and only
110      HS/FS/LS modes are supported.
111    type: boolean
112
113  wakeup-source: true
114
115# Required child node:
116
117patternProperties:
118  "^usb@[0-9a-f]+$":
119    $ref: snps,dwc3.yaml#
120
121    properties:
122      wakeup-source: false
123
124required:
125  - compatible
126  - reg
127  - "#address-cells"
128  - "#size-cells"
129  - ranges
130  - power-domains
131  - clocks
132  - clock-names
133  - interrupts
134  - interrupt-names
135
136allOf:
137  - if:
138      properties:
139        compatible:
140          contains:
141            enum:
142              - qcom,ipq4019-dwc3
143    then:
144      properties:
145        clocks:
146          maxItems: 3
147        clock-names:
148          items:
149            - const: core
150            - const: sleep
151            - const: mock_utmi
152
153  - if:
154      properties:
155        compatible:
156          contains:
157            enum:
158              - qcom,ipq8064-dwc3
159    then:
160      properties:
161        clocks:
162          items:
163            - description: Master/Core clock, has to be >= 125 MHz
164                for SS operation and >= 60MHz for HS operation.
165        clock-names:
166          items:
167            - const: core
168
169  - if:
170      properties:
171        compatible:
172          contains:
173            enum:
174              - qcom,msm8953-dwc3
175              - qcom,msm8996-dwc3
176              - qcom,msm8998-dwc3
177              - qcom,sc7180-dwc3
178              - qcom,sc7280-dwc3
179              - qcom,sdm670-dwc3
180              - qcom,sdm845-dwc3
181              - qcom,sdx55-dwc3
182              - qcom,sm6350-dwc3
183    then:
184      properties:
185        clocks:
186          maxItems: 5
187        clock-names:
188          items:
189            - const: cfg_noc
190            - const: core
191            - const: iface
192            - const: sleep
193            - const: mock_utmi
194
195  - if:
196      properties:
197        compatible:
198          contains:
199            enum:
200              - qcom,ipq6018-dwc3
201    then:
202      properties:
203        clocks:
204          minItems: 3
205          maxItems: 4
206        clock-names:
207          oneOf:
208            - items:
209                - const: core
210                - const: sleep
211                - const: mock_utmi
212            - items:
213                - const: cfg_noc
214                - const: core
215                - const: sleep
216                - const: mock_utmi
217
218  - if:
219      properties:
220        compatible:
221          contains:
222            enum:
223              - qcom,ipq8074-dwc3
224    then:
225      properties:
226        clocks:
227          maxItems: 4
228        clock-names:
229          items:
230            - const: cfg_noc
231            - const: core
232            - const: sleep
233            - const: mock_utmi
234
235  - if:
236      properties:
237        compatible:
238          contains:
239            enum:
240              - qcom,msm8994-dwc3
241              - qcom,qcs404-dwc3
242    then:
243      properties:
244        clocks:
245          maxItems: 4
246        clock-names:
247          items:
248            - const: core
249            - const: iface
250            - const: sleep
251            - const: mock_utmi
252
253  - if:
254      properties:
255        compatible:
256          contains:
257            enum:
258              - qcom,sc8280xp-dwc3
259    then:
260      properties:
261        clocks:
262          maxItems: 9
263        clock-names:
264          items:
265            - const: cfg_noc
266            - const: core
267            - const: iface
268            - const: sleep
269            - const: mock_utmi
270            - const: noc_aggr
271            - const: noc_aggr_north
272            - const: noc_aggr_south
273            - const: noc_sys
274
275  - if:
276      properties:
277        compatible:
278          contains:
279            enum:
280              - qcom,sdm660-dwc3
281    then:
282      properties:
283        clocks:
284          minItems: 6
285        clock-names:
286          items:
287            - const: cfg_noc
288            - const: core
289            - const: iface
290            - const: sleep
291            - const: mock_utmi
292            - const: bus
293
294  - if:
295      properties:
296        compatible:
297          contains:
298            enum:
299              - qcom,sm6115-dwc3
300              - qcom,sm6125-dwc3
301              - qcom,sm8150-dwc3
302              - qcom,sm8250-dwc3
303              - qcom,sm8450-dwc3
304    then:
305      properties:
306        clocks:
307          minItems: 6
308        clock-names:
309          items:
310            - const: cfg_noc
311            - const: core
312            - const: iface
313            - const: sleep
314            - const: mock_utmi
315            - const: xo
316
317  - if:
318      properties:
319        compatible:
320          contains:
321            enum:
322              - qcom,sm8350-dwc3
323    then:
324      properties:
325        clocks:
326          minItems: 5
327          maxItems: 6
328        clock-names:
329          minItems: 5
330          items:
331            - const: cfg_noc
332            - const: core
333            - const: iface
334            - const: sleep
335            - const: mock_utmi
336            - const: xo
337
338  - if:
339      properties:
340        compatible:
341          contains:
342            enum:
343              - qcom,ipq4019-dwc3
344              - qcom,ipq6018-dwc3
345              - qcom,ipq8064-dwc3
346              - qcom,ipq8074-dwc3
347              - qcom,msm8994-dwc3
348              - qcom,qcs404-dwc3
349              - qcom,sc7180-dwc3
350              - qcom,sdm670-dwc3
351              - qcom,sdm845-dwc3
352              - qcom,sdx55-dwc3
353              - qcom,sdx65-dwc3
354              - qcom,sm4250-dwc3
355              - qcom,sm6125-dwc3
356              - qcom,sm6350-dwc3
357              - qcom,sm8150-dwc3
358              - qcom,sm8250-dwc3
359              - qcom,sm8350-dwc3
360              - qcom,sm8450-dwc3
361    then:
362      properties:
363        interrupts:
364          items:
365            - description: The interrupt that is asserted
366                when a wakeup event is received on USB2 bus.
367            - description: The interrupt that is asserted
368                when a wakeup event is received on USB3 bus.
369            - description: Wakeup event on DM line.
370            - description: Wakeup event on DP line.
371        interrupt-names:
372          items:
373            - const: hs_phy_irq
374            - const: ss_phy_irq
375            - const: dm_hs_phy_irq
376            - const: dp_hs_phy_irq
377
378  - if:
379      properties:
380        compatible:
381          contains:
382            enum:
383              - qcom,msm8953-dwc3
384              - qcom,msm8996-dwc3
385              - qcom,msm8998-dwc3
386              - qcom,sm6115-dwc3
387    then:
388      properties:
389        interrupts:
390          maxItems: 2
391        interrupt-names:
392          items:
393            - const: hs_phy_irq
394            - const: ss_phy_irq
395
396  - if:
397      properties:
398        compatible:
399          contains:
400            enum:
401              - qcom,sdm660-dwc3
402    then:
403      properties:
404        interrupts:
405          minItems: 1
406          maxItems: 2
407        interrupt-names:
408          minItems: 1
409          items:
410            - const: hs_phy_irq
411            - const: ss_phy_irq
412
413  - if:
414      properties:
415        compatible:
416          contains:
417            enum:
418              - qcom,sc7280-dwc3
419    then:
420      properties:
421        interrupts:
422          minItems: 3
423          maxItems: 4
424        interrupt-names:
425          minItems: 3
426          items:
427            - const: hs_phy_irq
428            - const: dp_hs_phy_irq
429            - const: dm_hs_phy_irq
430            - const: ss_phy_irq
431
432  - if:
433      properties:
434        compatible:
435          contains:
436            enum:
437              - qcom,sc8280xp-dwc3
438    then:
439      properties:
440        interrupts:
441          maxItems: 4
442        interrupt-names:
443          items:
444            - const: pwr_event
445            - const: dp_hs_phy_irq
446            - const: dm_hs_phy_irq
447            - const: ss_phy_irq
448
449additionalProperties: false
450
451examples:
452  - |
453    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
454    #include <dt-bindings/interrupt-controller/arm-gic.h>
455    #include <dt-bindings/interrupt-controller/irq.h>
456    soc {
457        #address-cells = <2>;
458        #size-cells = <2>;
459
460        usb@a6f8800 {
461            compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
462            reg = <0 0x0a6f8800 0 0x400>;
463
464            #address-cells = <2>;
465            #size-cells = <2>;
466            ranges;
467            clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
468                     <&gcc GCC_USB30_PRIM_MASTER_CLK>,
469                     <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
470                     <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
471                     <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
472            clock-names = "cfg_noc",
473                          "core",
474                          "iface",
475                          "sleep",
476                          "mock_utmi";
477
478            assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
479                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
480            assigned-clock-rates = <19200000>, <150000000>;
481
482            interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
483                         <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
484                         <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
485                         <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
486            interrupt-names = "hs_phy_irq", "ss_phy_irq",
487                          "dm_hs_phy_irq", "dp_hs_phy_irq";
488
489            power-domains = <&gcc USB30_PRIM_GDSC>;
490
491            resets = <&gcc GCC_USB30_PRIM_BCR>;
492
493            usb@a600000 {
494                compatible = "snps,dwc3";
495                reg = <0 0x0a600000 0 0xcd00>;
496                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
497                iommus = <&apps_smmu 0x740 0>;
498                snps,dis_u2_susphy_quirk;
499                snps,dis_enblslpm_quirk;
500                phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
501                phy-names = "usb2-phy", "usb3-phy";
502            };
503        };
504    };
505