1*5d8cbf71SMauro Carvalho Chehab===================================================== 2*5d8cbf71SMauro Carvalho ChehabIntel INT3496 ACPI device extcon driver documentation 3*5d8cbf71SMauro Carvalho Chehab===================================================== 4*5d8cbf71SMauro Carvalho Chehab 5*5d8cbf71SMauro Carvalho ChehabThe Intel INT3496 ACPI device extcon driver is a driver for ACPI 6*5d8cbf71SMauro Carvalho Chehabdevices with an acpi-id of INT3496, such as found for example on 7*5d8cbf71SMauro Carvalho ChehabIntel Baytrail and Cherrytrail tablets. 8*5d8cbf71SMauro Carvalho Chehab 9*5d8cbf71SMauro Carvalho ChehabThis ACPI device describes how the OS can read the id-pin of the devices' 10*5d8cbf71SMauro Carvalho ChehabUSB-otg port, as well as how it optionally can enable Vbus output on the 11*5d8cbf71SMauro Carvalho Chehabotg port and how it can optionally control the muxing of the data pins 12*5d8cbf71SMauro Carvalho Chehabbetween an USB host and an USB peripheral controller. 13*5d8cbf71SMauro Carvalho Chehab 14*5d8cbf71SMauro Carvalho ChehabThe ACPI devices exposes this functionality by returning an array with up 15*5d8cbf71SMauro Carvalho Chehabto 3 gpio descriptors from its ACPI _CRS (Current Resource Settings) call: 16*5d8cbf71SMauro Carvalho Chehab 17*5d8cbf71SMauro Carvalho Chehab======= ===================================================================== 18*5d8cbf71SMauro Carvalho ChehabIndex 0 The input gpio for the id-pin, this is always present and valid 19*5d8cbf71SMauro Carvalho ChehabIndex 1 The output gpio for enabling Vbus output from the device to the otg 20*5d8cbf71SMauro Carvalho Chehab port, write 1 to enable the Vbus output (this gpio descriptor may 21*5d8cbf71SMauro Carvalho Chehab be absent or invalid) 22*5d8cbf71SMauro Carvalho ChehabIndex 2 The output gpio for muxing of the data pins between the USB host and 23*5d8cbf71SMauro Carvalho Chehab the USB peripheral controller, write 1 to mux to the peripheral 24*5d8cbf71SMauro Carvalho Chehab controller 25*5d8cbf71SMauro Carvalho Chehab======= ===================================================================== 26*5d8cbf71SMauro Carvalho Chehab 27*5d8cbf71SMauro Carvalho ChehabThere is a mapping between indices and GPIO connection IDs as follows 28*5d8cbf71SMauro Carvalho Chehab 29*5d8cbf71SMauro Carvalho Chehab ======= ======= 30*5d8cbf71SMauro Carvalho Chehab id index 0 31*5d8cbf71SMauro Carvalho Chehab vbus index 1 32*5d8cbf71SMauro Carvalho Chehab mux index 2 33*5d8cbf71SMauro Carvalho Chehab ======= ======= 34