1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2024b246eSLinus Torvalds /* 3024b246eSLinus Torvalds * include/asm-alpha/cache.h 4024b246eSLinus Torvalds */ 5024b246eSLinus Torvalds #ifndef __ARCH_ALPHA_CACHE_H 6024b246eSLinus Torvalds #define __ARCH_ALPHA_CACHE_H 7024b246eSLinus Torvalds 8024b246eSLinus Torvalds 9024b246eSLinus Torvalds /* Bytes per L1 (data) cache line. */ 10024b246eSLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6) 11024b246eSLinus Torvalds # define L1_CACHE_BYTES 64 12024b246eSLinus Torvalds # define L1_CACHE_SHIFT 6 13024b246eSLinus Torvalds #else 14024b246eSLinus Torvalds /* Both EV4 and EV5 are write-through, read-allocate, 15024b246eSLinus Torvalds direct-mapped, physical. 16024b246eSLinus Torvalds */ 17024b246eSLinus Torvalds # define L1_CACHE_BYTES 32 18024b246eSLinus Torvalds # define L1_CACHE_SHIFT 5 19024b246eSLinus Torvalds #endif 20024b246eSLinus Torvalds 21024b246eSLinus Torvalds #define SMP_CACHE_BYTES L1_CACHE_BYTES 22024b246eSLinus Torvalds 23024b246eSLinus Torvalds #endif 24