xref: /linux/arch/arm/mach-ep93xx/core.c (revision c6fbb759) 
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * arch/arm/mach-ep93xx/core.c
4  * Core routines for Cirrus EP93xx chips.
5  *
6  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
7  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
8  *
9  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
10  * role in the ep93xx linux community.
11  */
12 
13 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
14 
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/interrupt.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/sys_soc.h>
21 #include <linux/irq.h>
22 #include <linux/io.h>
23 #include <linux/gpio.h>
24 #include <linux/leds.h>
25 #include <linux/uaccess.h>
26 #include <linux/termios.h>
27 #include <linux/amba/bus.h>
28 #include <linux/amba/serial.h>
29 #include <linux/mtd/physmap.h>
30 #include <linux/i2c.h>
31 #include <linux/gpio/machine.h>
32 #include <linux/spi/spi.h>
33 #include <linux/export.h>
34 #include <linux/irqchip/arm-vic.h>
35 #include <linux/reboot.h>
36 #include <linux/usb/ohci_pdriver.h>
37 #include <linux/random.h>
38 
39 #include "hardware.h"
40 #include <linux/platform_data/video-ep93xx.h>
41 #include <linux/platform_data/keypad-ep93xx.h>
42 #include <linux/platform_data/spi-ep93xx.h>
43 #include <linux/soc/cirrus/ep93xx.h>
44 
45 #include "gpio-ep93xx.h"
46 
47 #include <asm/mach/arch.h>
48 #include <asm/mach/map.h>
49 
50 #include "soc.h"
51 #include "irqs.h"
52 
53 /*************************************************************************
54  * Static I/O mappings that are needed for all EP93xx platforms
55  *************************************************************************/
56 static struct map_desc ep93xx_io_desc[] __initdata = {
57 	{
58 		.virtual	= EP93XX_AHB_VIRT_BASE,
59 		.pfn		= __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
60 		.length		= EP93XX_AHB_SIZE,
61 		.type		= MT_DEVICE,
62 	}, {
63 		.virtual	= EP93XX_APB_VIRT_BASE,
64 		.pfn		= __phys_to_pfn(EP93XX_APB_PHYS_BASE),
65 		.length		= EP93XX_APB_SIZE,
66 		.type		= MT_DEVICE,
67 	},
68 };
69 
70 void __init ep93xx_map_io(void)
71 {
72 	iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
73 }
74 
75 /*************************************************************************
76  * EP93xx IRQ handling
77  *************************************************************************/
78 void __init ep93xx_init_irq(void)
79 {
80 	vic_init(EP93XX_VIC1_BASE, IRQ_EP93XX_VIC0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
81 	vic_init(EP93XX_VIC2_BASE, IRQ_EP93XX_VIC1, EP93XX_VIC2_VALID_IRQ_MASK, 0);
82 }
83 
84 
85 /*************************************************************************
86  * EP93xx System Controller Software Locked register handling
87  *************************************************************************/
88 
89 /*
90  * syscon_swlock prevents anything else from writing to the syscon
91  * block while a software locked register is being written.
92  */
93 static DEFINE_SPINLOCK(syscon_swlock);
94 
95 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
96 {
97 	unsigned long flags;
98 
99 	spin_lock_irqsave(&syscon_swlock, flags);
100 
101 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
102 	__raw_writel(val, reg);
103 
104 	spin_unlock_irqrestore(&syscon_swlock, flags);
105 }
106 
107 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
108 {
109 	unsigned long flags;
110 	unsigned int val;
111 
112 	spin_lock_irqsave(&syscon_swlock, flags);
113 
114 	val = __raw_readl(EP93XX_SYSCON_DEVCFG);
115 	val &= ~clear_bits;
116 	val |= set_bits;
117 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
118 	__raw_writel(val, EP93XX_SYSCON_DEVCFG);
119 
120 	spin_unlock_irqrestore(&syscon_swlock, flags);
121 }
122 
123 /**
124  * ep93xx_chip_revision() - returns the EP93xx chip revision
125  *
126  * See "platform.h" for more information.
127  */
128 unsigned int ep93xx_chip_revision(void)
129 {
130 	unsigned int v;
131 
132 	v = __raw_readl(EP93XX_SYSCON_SYSCFG);
133 	v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
134 	v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
135 	return v;
136 }
137 EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
138 
139 /*************************************************************************
140  * EP93xx GPIO
141  *************************************************************************/
142 static struct resource ep93xx_gpio_resource[] = {
143 	DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
144 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
145 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX),
146 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX),
147 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX),
148 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX),
149 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX),
150 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX),
151 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX),
152 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX),
153 };
154 
155 static struct platform_device ep93xx_gpio_device = {
156 	.name		= "gpio-ep93xx",
157 	.id		= -1,
158 	.num_resources	= ARRAY_SIZE(ep93xx_gpio_resource),
159 	.resource	= ep93xx_gpio_resource,
160 };
161 
162 /*************************************************************************
163  * EP93xx peripheral handling
164  *************************************************************************/
165 #define EP93XX_UART_MCR_OFFSET		(0x0100)
166 
167 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
168 				  void __iomem *base, unsigned int mctrl)
169 {
170 	unsigned int mcr;
171 
172 	mcr = 0;
173 	if (mctrl & TIOCM_RTS)
174 		mcr |= 2;
175 	if (mctrl & TIOCM_DTR)
176 		mcr |= 1;
177 
178 	__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
179 }
180 
181 static struct amba_pl010_data ep93xx_uart_data = {
182 	.set_mctrl	= ep93xx_uart_set_mctrl,
183 };
184 
185 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
186 	{ IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
187 
188 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
189 	{ IRQ_EP93XX_UART2 }, NULL);
190 
191 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
192 	{ IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
193 
194 static struct resource ep93xx_rtc_resource[] = {
195 	DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
196 };
197 
198 static struct platform_device ep93xx_rtc_device = {
199 	.name		= "ep93xx-rtc",
200 	.id		= -1,
201 	.num_resources	= ARRAY_SIZE(ep93xx_rtc_resource),
202 	.resource	= ep93xx_rtc_resource,
203 };
204 
205 /*************************************************************************
206  * EP93xx OHCI USB Host
207  *************************************************************************/
208 
209 static struct clk *ep93xx_ohci_host_clock;
210 
211 static int ep93xx_ohci_power_on(struct platform_device *pdev)
212 {
213 	if (!ep93xx_ohci_host_clock) {
214 		ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
215 		if (IS_ERR(ep93xx_ohci_host_clock))
216 			return PTR_ERR(ep93xx_ohci_host_clock);
217 	}
218 
219 	return clk_prepare_enable(ep93xx_ohci_host_clock);
220 }
221 
222 static void ep93xx_ohci_power_off(struct platform_device *pdev)
223 {
224 	clk_disable(ep93xx_ohci_host_clock);
225 }
226 
227 static struct usb_ohci_pdata ep93xx_ohci_pdata = {
228 	.power_on	= ep93xx_ohci_power_on,
229 	.power_off	= ep93xx_ohci_power_off,
230 	.power_suspend	= ep93xx_ohci_power_off,
231 };
232 
233 static struct resource ep93xx_ohci_resources[] = {
234 	DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
235 	DEFINE_RES_IRQ(IRQ_EP93XX_USB),
236 };
237 
238 static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
239 
240 static struct platform_device ep93xx_ohci_device = {
241 	.name		= "ohci-platform",
242 	.id		= -1,
243 	.num_resources	= ARRAY_SIZE(ep93xx_ohci_resources),
244 	.resource	= ep93xx_ohci_resources,
245 	.dev		= {
246 		.dma_mask		= &ep93xx_ohci_dma_mask,
247 		.coherent_dma_mask	= DMA_BIT_MASK(32),
248 		.platform_data		= &ep93xx_ohci_pdata,
249 	},
250 };
251 
252 /*************************************************************************
253  * EP93xx physmap'ed flash
254  *************************************************************************/
255 static struct physmap_flash_data ep93xx_flash_data;
256 
257 static struct resource ep93xx_flash_resource = {
258 	.flags		= IORESOURCE_MEM,
259 };
260 
261 static struct platform_device ep93xx_flash = {
262 	.name		= "physmap-flash",
263 	.id		= 0,
264 	.dev		= {
265 		.platform_data	= &ep93xx_flash_data,
266 	},
267 	.num_resources	= 1,
268 	.resource	= &ep93xx_flash_resource,
269 };
270 
271 /**
272  * ep93xx_register_flash() - Register the external flash device.
273  * @width:	bank width in octets
274  * @start:	resource start address
275  * @size:	resource size
276  */
277 void __init ep93xx_register_flash(unsigned int width,
278 				  resource_size_t start, resource_size_t size)
279 {
280 	ep93xx_flash_data.width		= width;
281 
282 	ep93xx_flash_resource.start	= start;
283 	ep93xx_flash_resource.end	= start + size - 1;
284 
285 	platform_device_register(&ep93xx_flash);
286 }
287 
288 
289 /*************************************************************************
290  * EP93xx ethernet peripheral handling
291  *************************************************************************/
292 static struct ep93xx_eth_data ep93xx_eth_data;
293 
294 static struct resource ep93xx_eth_resource[] = {
295 	DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
296 	DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
297 };
298 
299 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
300 
301 static struct platform_device ep93xx_eth_device = {
302 	.name		= "ep93xx-eth",
303 	.id		= -1,
304 	.dev		= {
305 		.platform_data		= &ep93xx_eth_data,
306 		.coherent_dma_mask	= DMA_BIT_MASK(32),
307 		.dma_mask		= &ep93xx_eth_dma_mask,
308 	},
309 	.num_resources	= ARRAY_SIZE(ep93xx_eth_resource),
310 	.resource	= ep93xx_eth_resource,
311 };
312 
313 /**
314  * ep93xx_register_eth - Register the built-in ethernet platform device.
315  * @data:	platform specific ethernet configuration (__initdata)
316  * @copy_addr:	flag indicating that the MAC address should be copied
317  *		from the IndAd registers (as programmed by the bootloader)
318  */
319 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
320 {
321 	if (copy_addr)
322 		memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
323 
324 	ep93xx_eth_data = *data;
325 	platform_device_register(&ep93xx_eth_device);
326 }
327 
328 
329 /*************************************************************************
330  * EP93xx i2c peripheral handling
331  *************************************************************************/
332 
333 /* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
334 static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
335 	.dev_id		= "i2c-gpio.0",
336 	.table		= {
337 		/* Use local offsets on gpiochip/port "G" */
338 		GPIO_LOOKUP_IDX("G", 1, NULL, 0,
339 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
340 		GPIO_LOOKUP_IDX("G", 0, NULL, 1,
341 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
342 	},
343 };
344 
345 static struct platform_device ep93xx_i2c_device = {
346 	.name		= "i2c-gpio",
347 	.id		= 0,
348 	.dev		= {
349 		.platform_data	= NULL,
350 	},
351 };
352 
353 /**
354  * ep93xx_register_i2c - Register the i2c platform device.
355  * @devices:	platform specific i2c bus device information (__initdata)
356  * @num:	the number of devices on the i2c bus
357  */
358 void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
359 {
360 	/*
361 	 * FIXME: this just sets the two pins as non-opendrain, as no
362 	 * platforms tries to do that anyway. Flag the applicable lines
363 	 * as open drain in the GPIO_LOOKUP above and the driver or
364 	 * gpiolib will handle open drain/open drain emulation as need
365 	 * be. Right now i2c-gpio emulates open drain which is not
366 	 * optimal.
367 	 */
368 	__raw_writel((0 << 1) | (0 << 0),
369 		     EP93XX_GPIO_EEDRIVE);
370 
371 	i2c_register_board_info(0, devices, num);
372 	gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
373 	platform_device_register(&ep93xx_i2c_device);
374 }
375 
376 /*************************************************************************
377  * EP93xx SPI peripheral handling
378  *************************************************************************/
379 static struct ep93xx_spi_info ep93xx_spi_master_data;
380 
381 static struct resource ep93xx_spi_resources[] = {
382 	DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
383 	DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
384 };
385 
386 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
387 
388 static struct platform_device ep93xx_spi_device = {
389 	.name		= "ep93xx-spi",
390 	.id		= 0,
391 	.dev		= {
392 		.platform_data		= &ep93xx_spi_master_data,
393 		.coherent_dma_mask	= DMA_BIT_MASK(32),
394 		.dma_mask		= &ep93xx_spi_dma_mask,
395 	},
396 	.num_resources	= ARRAY_SIZE(ep93xx_spi_resources),
397 	.resource	= ep93xx_spi_resources,
398 };
399 
400 /**
401  * ep93xx_register_spi() - registers spi platform device
402  * @info: ep93xx board specific spi master info (__initdata)
403  * @devices: SPI devices to register (__initdata)
404  * @num: number of SPI devices to register
405  *
406  * This function registers platform device for the EP93xx SPI controller and
407  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
408  */
409 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
410 				struct spi_board_info *devices, int num)
411 {
412 	/*
413 	 * When SPI is used, we need to make sure that I2S is muxed off from
414 	 * SPI pins.
415 	 */
416 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
417 
418 	ep93xx_spi_master_data = *info;
419 	spi_register_board_info(devices, num);
420 	platform_device_register(&ep93xx_spi_device);
421 }
422 
423 /*************************************************************************
424  * EP93xx LEDs
425  *************************************************************************/
426 static const struct gpio_led ep93xx_led_pins[] __initconst = {
427 	{
428 		.name	= "platform:grled",
429 		.gpio	= EP93XX_GPIO_LINE_GRLED,
430 	}, {
431 		.name	= "platform:rdled",
432 		.gpio	= EP93XX_GPIO_LINE_RDLED,
433 	},
434 };
435 
436 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
437 	.num_leds	= ARRAY_SIZE(ep93xx_led_pins),
438 	.leds		= ep93xx_led_pins,
439 };
440 
441 /*************************************************************************
442  * EP93xx pwm peripheral handling
443  *************************************************************************/
444 static struct resource ep93xx_pwm0_resource[] = {
445 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
446 };
447 
448 static struct platform_device ep93xx_pwm0_device = {
449 	.name		= "ep93xx-pwm",
450 	.id		= 0,
451 	.num_resources	= ARRAY_SIZE(ep93xx_pwm0_resource),
452 	.resource	= ep93xx_pwm0_resource,
453 };
454 
455 static struct resource ep93xx_pwm1_resource[] = {
456 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
457 };
458 
459 static struct platform_device ep93xx_pwm1_device = {
460 	.name		= "ep93xx-pwm",
461 	.id		= 1,
462 	.num_resources	= ARRAY_SIZE(ep93xx_pwm1_resource),
463 	.resource	= ep93xx_pwm1_resource,
464 };
465 
466 void __init ep93xx_register_pwm(int pwm0, int pwm1)
467 {
468 	if (pwm0)
469 		platform_device_register(&ep93xx_pwm0_device);
470 
471 	/* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
472 	if (pwm1)
473 		platform_device_register(&ep93xx_pwm1_device);
474 }
475 
476 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
477 {
478 	int err;
479 
480 	if (pdev->id == 0) {
481 		err = 0;
482 	} else if (pdev->id == 1) {
483 		err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
484 				   dev_name(&pdev->dev));
485 		if (err)
486 			return err;
487 		err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
488 		if (err)
489 			goto fail;
490 
491 		/* PWM 1 output on EGPIO[14] */
492 		ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
493 	} else {
494 		err = -ENODEV;
495 	}
496 
497 	return err;
498 
499 fail:
500 	gpio_free(EP93XX_GPIO_LINE_EGPIO14);
501 	return err;
502 }
503 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
504 
505 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
506 {
507 	if (pdev->id == 1) {
508 		gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
509 		gpio_free(EP93XX_GPIO_LINE_EGPIO14);
510 
511 		/* EGPIO[14] used for GPIO */
512 		ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
513 	}
514 }
515 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
516 
517 
518 /*************************************************************************
519  * EP93xx video peripheral handling
520  *************************************************************************/
521 static struct ep93xxfb_mach_info ep93xxfb_data;
522 
523 static struct resource ep93xx_fb_resource[] = {
524 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
525 };
526 
527 static struct platform_device ep93xx_fb_device = {
528 	.name			= "ep93xx-fb",
529 	.id			= -1,
530 	.dev			= {
531 		.platform_data		= &ep93xxfb_data,
532 		.coherent_dma_mask	= DMA_BIT_MASK(32),
533 		.dma_mask		= &ep93xx_fb_device.dev.coherent_dma_mask,
534 	},
535 	.num_resources		= ARRAY_SIZE(ep93xx_fb_resource),
536 	.resource		= ep93xx_fb_resource,
537 };
538 
539 /* The backlight use a single register in the framebuffer's register space */
540 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
541 
542 static struct resource ep93xx_bl_resources[] = {
543 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
544 		       EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
545 };
546 
547 static struct platform_device ep93xx_bl_device = {
548 	.name		= "ep93xx-bl",
549 	.id		= -1,
550 	.num_resources	= ARRAY_SIZE(ep93xx_bl_resources),
551 	.resource	= ep93xx_bl_resources,
552 };
553 
554 /**
555  * ep93xx_register_fb - Register the framebuffer platform device.
556  * @data:	platform specific framebuffer configuration (__initdata)
557  */
558 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
559 {
560 	ep93xxfb_data = *data;
561 	platform_device_register(&ep93xx_fb_device);
562 	platform_device_register(&ep93xx_bl_device);
563 }
564 
565 
566 /*************************************************************************
567  * EP93xx matrix keypad peripheral handling
568  *************************************************************************/
569 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
570 
571 static struct resource ep93xx_keypad_resource[] = {
572 	DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
573 	DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
574 };
575 
576 static struct platform_device ep93xx_keypad_device = {
577 	.name		= "ep93xx-keypad",
578 	.id		= -1,
579 	.dev		= {
580 		.platform_data	= &ep93xx_keypad_data,
581 	},
582 	.num_resources	= ARRAY_SIZE(ep93xx_keypad_resource),
583 	.resource	= ep93xx_keypad_resource,
584 };
585 
586 /**
587  * ep93xx_register_keypad - Register the keypad platform device.
588  * @data:	platform specific keypad configuration (__initdata)
589  */
590 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
591 {
592 	ep93xx_keypad_data = *data;
593 	platform_device_register(&ep93xx_keypad_device);
594 }
595 
596 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
597 {
598 	int err;
599 	int i;
600 
601 	for (i = 0; i < 8; i++) {
602 		err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
603 		if (err)
604 			goto fail_gpio_c;
605 		err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
606 		if (err)
607 			goto fail_gpio_d;
608 	}
609 
610 	/* Enable the keypad controller; GPIO ports C and D used for keypad */
611 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
612 				 EP93XX_SYSCON_DEVCFG_GONK);
613 
614 	return 0;
615 
616 fail_gpio_d:
617 	gpio_free(EP93XX_GPIO_LINE_C(i));
618 fail_gpio_c:
619 	for (--i; i >= 0; --i) {
620 		gpio_free(EP93XX_GPIO_LINE_C(i));
621 		gpio_free(EP93XX_GPIO_LINE_D(i));
622 	}
623 	return err;
624 }
625 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
626 
627 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
628 {
629 	int i;
630 
631 	for (i = 0; i < 8; i++) {
632 		gpio_free(EP93XX_GPIO_LINE_C(i));
633 		gpio_free(EP93XX_GPIO_LINE_D(i));
634 	}
635 
636 	/* Disable the keypad controller; GPIO ports C and D used for GPIO */
637 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
638 			       EP93XX_SYSCON_DEVCFG_GONK);
639 }
640 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
641 
642 /*************************************************************************
643  * EP93xx I2S audio peripheral handling
644  *************************************************************************/
645 static struct resource ep93xx_i2s_resource[] = {
646 	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
647 	DEFINE_RES_IRQ(IRQ_EP93XX_SAI),
648 };
649 
650 static struct platform_device ep93xx_i2s_device = {
651 	.name		= "ep93xx-i2s",
652 	.id		= -1,
653 	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
654 	.resource	= ep93xx_i2s_resource,
655 };
656 
657 static struct platform_device ep93xx_pcm_device = {
658 	.name		= "ep93xx-pcm-audio",
659 	.id		= -1,
660 };
661 
662 void __init ep93xx_register_i2s(void)
663 {
664 	platform_device_register(&ep93xx_i2s_device);
665 	platform_device_register(&ep93xx_pcm_device);
666 }
667 
668 #define EP93XX_SYSCON_DEVCFG_I2S_MASK	(EP93XX_SYSCON_DEVCFG_I2SONSSP | \
669 					 EP93XX_SYSCON_DEVCFG_I2SONAC97)
670 
671 #define EP93XX_I2SCLKDIV_MASK		(EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
672 					 EP93XX_SYSCON_I2SCLKDIV_SPOL)
673 
674 int ep93xx_i2s_acquire(void)
675 {
676 	unsigned val;
677 
678 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
679 			EP93XX_SYSCON_DEVCFG_I2S_MASK);
680 
681 	/*
682 	 * This is potentially racy with the clock api for i2s_mclk, sclk and
683 	 * lrclk. Since the i2s driver is the only user of those clocks we
684 	 * rely on it to prevent parallel use of this function and the
685 	 * clock api for the i2s clocks.
686 	 */
687 	val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
688 	val &= ~EP93XX_I2SCLKDIV_MASK;
689 	val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
690 	ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
691 
692 	return 0;
693 }
694 EXPORT_SYMBOL(ep93xx_i2s_acquire);
695 
696 void ep93xx_i2s_release(void)
697 {
698 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
699 }
700 EXPORT_SYMBOL(ep93xx_i2s_release);
701 
702 /*************************************************************************
703  * EP93xx AC97 audio peripheral handling
704  *************************************************************************/
705 static struct resource ep93xx_ac97_resources[] = {
706 	DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
707 	DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
708 };
709 
710 static struct platform_device ep93xx_ac97_device = {
711 	.name		= "ep93xx-ac97",
712 	.id		= -1,
713 	.num_resources	= ARRAY_SIZE(ep93xx_ac97_resources),
714 	.resource	= ep93xx_ac97_resources,
715 };
716 
717 void __init ep93xx_register_ac97(void)
718 {
719 	/*
720 	 * Make sure that the AC97 pins are not used by I2S.
721 	 */
722 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
723 
724 	platform_device_register(&ep93xx_ac97_device);
725 	platform_device_register(&ep93xx_pcm_device);
726 }
727 
728 /*************************************************************************
729  * EP93xx Watchdog
730  *************************************************************************/
731 static struct resource ep93xx_wdt_resources[] = {
732 	DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
733 };
734 
735 static struct platform_device ep93xx_wdt_device = {
736 	.name		= "ep93xx-wdt",
737 	.id		= -1,
738 	.num_resources	= ARRAY_SIZE(ep93xx_wdt_resources),
739 	.resource	= ep93xx_wdt_resources,
740 };
741 
742 /*************************************************************************
743  * EP93xx IDE
744  *************************************************************************/
745 static struct resource ep93xx_ide_resources[] = {
746 	DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
747 	DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
748 };
749 
750 static struct platform_device ep93xx_ide_device = {
751 	.name		= "ep93xx-ide",
752 	.id		= -1,
753 	.dev		= {
754 		.dma_mask		= &ep93xx_ide_device.dev.coherent_dma_mask,
755 		.coherent_dma_mask	= DMA_BIT_MASK(32),
756 	},
757 	.num_resources	= ARRAY_SIZE(ep93xx_ide_resources),
758 	.resource	= ep93xx_ide_resources,
759 };
760 
761 void __init ep93xx_register_ide(void)
762 {
763 	platform_device_register(&ep93xx_ide_device);
764 }
765 
766 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
767 {
768 	int err;
769 	int i;
770 
771 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
772 	if (err)
773 		return err;
774 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
775 	if (err)
776 		goto fail_egpio15;
777 	for (i = 2; i < 8; i++) {
778 		err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
779 		if (err)
780 			goto fail_gpio_e;
781 	}
782 	for (i = 4; i < 8; i++) {
783 		err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
784 		if (err)
785 			goto fail_gpio_g;
786 	}
787 	for (i = 0; i < 8; i++) {
788 		err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
789 		if (err)
790 			goto fail_gpio_h;
791 	}
792 
793 	/* GPIO ports E[7:2], G[7:4] and H used by IDE */
794 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
795 				 EP93XX_SYSCON_DEVCFG_GONIDE |
796 				 EP93XX_SYSCON_DEVCFG_HONIDE);
797 	return 0;
798 
799 fail_gpio_h:
800 	for (--i; i >= 0; --i)
801 		gpio_free(EP93XX_GPIO_LINE_H(i));
802 	i = 8;
803 fail_gpio_g:
804 	for (--i; i >= 4; --i)
805 		gpio_free(EP93XX_GPIO_LINE_G(i));
806 	i = 8;
807 fail_gpio_e:
808 	for (--i; i >= 2; --i)
809 		gpio_free(EP93XX_GPIO_LINE_E(i));
810 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
811 fail_egpio15:
812 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
813 	return err;
814 }
815 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
816 
817 void ep93xx_ide_release_gpio(struct platform_device *pdev)
818 {
819 	int i;
820 
821 	for (i = 2; i < 8; i++)
822 		gpio_free(EP93XX_GPIO_LINE_E(i));
823 	for (i = 4; i < 8; i++)
824 		gpio_free(EP93XX_GPIO_LINE_G(i));
825 	for (i = 0; i < 8; i++)
826 		gpio_free(EP93XX_GPIO_LINE_H(i));
827 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
828 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
829 
830 
831 	/* GPIO ports E[7:2], G[7:4] and H used by GPIO */
832 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
833 			       EP93XX_SYSCON_DEVCFG_GONIDE |
834 			       EP93XX_SYSCON_DEVCFG_HONIDE);
835 }
836 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
837 
838 /*************************************************************************
839  * EP93xx ADC
840  *************************************************************************/
841 static struct resource ep93xx_adc_resources[] = {
842 	DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
843 	DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
844 };
845 
846 static struct platform_device ep93xx_adc_device = {
847 	.name		= "ep93xx-adc",
848 	.id		= -1,
849 	.num_resources	= ARRAY_SIZE(ep93xx_adc_resources),
850 	.resource	= ep93xx_adc_resources,
851 };
852 
853 void __init ep93xx_register_adc(void)
854 {
855 	/* Power up ADC, deactivate Touch Screen Controller */
856 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
857 				EP93XX_SYSCON_DEVCFG_ADCPD);
858 
859 	platform_device_register(&ep93xx_adc_device);
860 }
861 
862 /*************************************************************************
863  * EP93xx Security peripheral
864  *************************************************************************/
865 
866 /*
867  * The Maverick Key is 256 bits of micro fuses blown at the factory during
868  * manufacturing to uniquely identify a part.
869  *
870  * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
871  */
872 #define EP93XX_SECURITY_REG(x)		(EP93XX_SECURITY_BASE + (x))
873 #define EP93XX_SECURITY_SECFLG		EP93XX_SECURITY_REG(0x2400)
874 #define EP93XX_SECURITY_FUSEFLG		EP93XX_SECURITY_REG(0x2410)
875 #define EP93XX_SECURITY_UNIQID		EP93XX_SECURITY_REG(0x2440)
876 #define EP93XX_SECURITY_UNIQCHK		EP93XX_SECURITY_REG(0x2450)
877 #define EP93XX_SECURITY_UNIQVAL		EP93XX_SECURITY_REG(0x2460)
878 #define EP93XX_SECURITY_SECID1		EP93XX_SECURITY_REG(0x2500)
879 #define EP93XX_SECURITY_SECID2		EP93XX_SECURITY_REG(0x2504)
880 #define EP93XX_SECURITY_SECCHK1		EP93XX_SECURITY_REG(0x2520)
881 #define EP93XX_SECURITY_SECCHK2		EP93XX_SECURITY_REG(0x2524)
882 #define EP93XX_SECURITY_UNIQID2		EP93XX_SECURITY_REG(0x2700)
883 #define EP93XX_SECURITY_UNIQID3		EP93XX_SECURITY_REG(0x2704)
884 #define EP93XX_SECURITY_UNIQID4		EP93XX_SECURITY_REG(0x2708)
885 #define EP93XX_SECURITY_UNIQID5		EP93XX_SECURITY_REG(0x270c)
886 
887 static char ep93xx_soc_id[33];
888 
889 static const char __init *ep93xx_get_soc_id(void)
890 {
891 	unsigned int id, id2, id3, id4, id5;
892 
893 	if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
894 		return "bad Hamming code";
895 
896 	id = __raw_readl(EP93XX_SECURITY_UNIQID);
897 	id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
898 	id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
899 	id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
900 	id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
901 
902 	if (id != id2)
903 		return "invalid";
904 
905 	/* Toss the unique ID into the entropy pool */
906 	add_device_randomness(&id2, 4);
907 	add_device_randomness(&id3, 4);
908 	add_device_randomness(&id4, 4);
909 	add_device_randomness(&id5, 4);
910 
911 	snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
912 		 "%08x%08x%08x%08x", id2, id3, id4, id5);
913 
914 	return ep93xx_soc_id;
915 }
916 
917 static const char __init *ep93xx_get_soc_rev(void)
918 {
919 	int rev = ep93xx_chip_revision();
920 
921 	switch (rev) {
922 	case EP93XX_CHIP_REV_D0:
923 		return "D0";
924 	case EP93XX_CHIP_REV_D1:
925 		return "D1";
926 	case EP93XX_CHIP_REV_E0:
927 		return "E0";
928 	case EP93XX_CHIP_REV_E1:
929 		return "E1";
930 	case EP93XX_CHIP_REV_E2:
931 		return "E2";
932 	default:
933 		return "unknown";
934 	}
935 }
936 
937 static const char __init *ep93xx_get_machine_name(void)
938 {
939 	return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
940 }
941 
942 static struct device __init *ep93xx_init_soc(void)
943 {
944 	struct soc_device_attribute *soc_dev_attr;
945 	struct soc_device *soc_dev;
946 
947 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
948 	if (!soc_dev_attr)
949 		return NULL;
950 
951 	soc_dev_attr->machine = ep93xx_get_machine_name();
952 	soc_dev_attr->family = "Cirrus Logic EP93xx";
953 	soc_dev_attr->revision = ep93xx_get_soc_rev();
954 	soc_dev_attr->soc_id = ep93xx_get_soc_id();
955 
956 	soc_dev = soc_device_register(soc_dev_attr);
957 	if (IS_ERR(soc_dev)) {
958 		kfree(soc_dev_attr->machine);
959 		kfree(soc_dev_attr);
960 		return NULL;
961 	}
962 
963 	return soc_device_to_device(soc_dev);
964 }
965 
966 struct device __init *ep93xx_init_devices(void)
967 {
968 	struct device *parent;
969 
970 	/* Disallow access to MaverickCrunch initially */
971 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
972 
973 	/* Default all ports to GPIO */
974 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
975 			       EP93XX_SYSCON_DEVCFG_GONK |
976 			       EP93XX_SYSCON_DEVCFG_EONIDE |
977 			       EP93XX_SYSCON_DEVCFG_GONIDE |
978 			       EP93XX_SYSCON_DEVCFG_HONIDE);
979 
980 	parent = ep93xx_init_soc();
981 
982 	/* Get the GPIO working early, other devices need it */
983 	platform_device_register(&ep93xx_gpio_device);
984 
985 	amba_device_register(&uart1_device, &iomem_resource);
986 	amba_device_register(&uart2_device, &iomem_resource);
987 	amba_device_register(&uart3_device, &iomem_resource);
988 
989 	platform_device_register(&ep93xx_rtc_device);
990 	platform_device_register(&ep93xx_ohci_device);
991 	platform_device_register(&ep93xx_wdt_device);
992 
993 	gpio_led_register_device(-1, &ep93xx_led_data);
994 
995 	return parent;
996 }
997 
998 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
999 {
1000 	/*
1001 	 * Set then clear the SWRST bit to initiate a software reset
1002 	 */
1003 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1004 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1005 
1006 	while (1)
1007 		;
1008 }
1009