1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config ARCH_OMAP2 6 bool "TI OMAP2" 7 depends on ARCH_MULTI_V6 8 select ARCH_OMAP2PLUS 9 select CPU_V6 10 select SOC_HAS_OMAP2_SDRC 11 12config ARCH_OMAP3 13 bool "TI OMAP3" 14 depends on ARCH_MULTI_V7 15 select ARCH_OMAP2PLUS 16 select ARM_CPU_SUSPEND if PM 17 select OMAP_INTERCONNECT 18 select PM_OPP if PM 19 select PM if CPU_IDLE 20 select SOC_HAS_OMAP2_SDRC 21 select ARM_ERRATA_430973 22 23config ARCH_OMAP4 24 bool "TI OMAP4" 25 depends on ARCH_MULTI_V7 26 select ARCH_OMAP2PLUS 27 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 28 select ARM_CPU_SUSPEND if PM 29 select ARM_ERRATA_720789 30 select ARM_GIC 31 select HAVE_ARM_SCU if SMP 32 select HAVE_ARM_TWD if SMP 33 select OMAP_INTERCONNECT 34 select OMAP_INTERCONNECT_BARRIER 35 select PL310_ERRATA_588369 if CACHE_L2X0 36 select PL310_ERRATA_727915 if CACHE_L2X0 37 select PM_OPP if PM 38 select PM if CPU_IDLE 39 select ARM_ERRATA_754322 40 select ARM_ERRATA_775420 41 select OMAP_INTERCONNECT 42 43config SOC_OMAP5 44 bool "TI OMAP5" 45 depends on ARCH_MULTI_V7 46 select ARCH_OMAP2PLUS 47 select ARM_CPU_SUSPEND if PM 48 select ARM_GIC 49 select HAVE_ARM_SCU if SMP 50 select HAVE_ARM_ARCH_TIMER 51 select ARM_ERRATA_798181 if SMP 52 select OMAP_INTERCONNECT 53 select OMAP_INTERCONNECT_BARRIER 54 select PM_OPP if PM 55 select ZONE_DMA if ARM_LPAE 56 57config SOC_AM33XX 58 bool "TI AM33XX" 59 depends on ARCH_MULTI_V7 60 select ARCH_OMAP2PLUS 61 select ARM_CPU_SUSPEND if PM 62 63config SOC_AM43XX 64 bool "TI AM43x" 65 depends on ARCH_MULTI_V7 66 select ARCH_OMAP2PLUS 67 select ARM_GIC 68 select MACH_OMAP_GENERIC 69 select MIGHT_HAVE_CACHE_L2X0 70 select HAVE_ARM_SCU 71 select GENERIC_CLOCKEVENTS_BROADCAST 72 select HAVE_ARM_TWD 73 select ARM_ERRATA_754322 74 select ARM_ERRATA_775420 75 select OMAP_INTERCONNECT 76 select ARM_CPU_SUSPEND if PM 77 78config SOC_DRA7XX 79 bool "TI DRA7XX" 80 depends on ARCH_MULTI_V7 81 select ARCH_OMAP2PLUS 82 select ARM_CPU_SUSPEND if PM 83 select ARM_GIC 84 select HAVE_ARM_SCU if SMP 85 select HAVE_ARM_ARCH_TIMER 86 select IRQ_CROSSBAR 87 select ARM_ERRATA_798181 if SMP 88 select OMAP_INTERCONNECT 89 select OMAP_INTERCONNECT_BARRIER 90 select PM_OPP if PM 91 select ZONE_DMA if ARM_LPAE 92 select PINCTRL_TI_IODELAY if OF && PINCTRL 93 94config ARCH_OMAP2PLUS 95 bool 96 select ARCH_HAS_BANDGAP 97 select ARCH_HAS_HOLES_MEMORYMODEL 98 select ARCH_OMAP 99 select CLKSRC_MMIO 100 select GENERIC_IRQ_CHIP 101 select GPIOLIB 102 select MACH_OMAP_GENERIC 103 select MEMORY 104 select MFD_SYSCON 105 select OMAP_DM_TIMER 106 select OMAP_GPMC 107 select PINCTRL 108 select SOC_BUS 109 select TI_SYSC 110 select OMAP_IRQCHIP 111 select CLKSRC_TI_32K 112 select ARCH_HAS_RESET_CONTROLLER 113 help 114 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 115 116config OMAP_INTERCONNECT_BARRIER 117 bool 118 select ARM_HEAVY_MB 119 120 121if ARCH_OMAP2PLUS 122 123menu "TI OMAP2/3/4 Specific Features" 124 125config ARCH_OMAP2PLUS_TYPICAL 126 bool "Typical OMAP configuration" 127 default y 128 select AEABI 129 select HIGHMEM 130 select I2C 131 select I2C_OMAP 132 select MENELAUS if ARCH_OMAP2 133 select NEON if CPU_V7 134 select PM 135 select REGULATOR 136 select REGULATOR_FIXED_VOLTAGE 137 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 138 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 139 select VFP 140 help 141 Compile a kernel suitable for booting most boards 142 143config SOC_HAS_OMAP2_SDRC 144 bool "OMAP2 SDRAM Controller support" 145 146config SOC_HAS_REALTIME_COUNTER 147 bool "Real time free running counter" 148 depends on SOC_OMAP5 || SOC_DRA7XX 149 default y 150 151comment "OMAP Core Type" 152 depends on ARCH_OMAP2 153 154config SOC_OMAP2420 155 bool "OMAP2420 support" 156 depends on ARCH_OMAP2 157 default y 158 select OMAP_DM_TIMER 159 select SOC_HAS_OMAP2_SDRC 160 161config SOC_OMAP2430 162 bool "OMAP2430 support" 163 depends on ARCH_OMAP2 164 default y 165 select SOC_HAS_OMAP2_SDRC 166 167config SOC_OMAP3430 168 bool "OMAP3430 support" 169 depends on ARCH_OMAP3 170 default y 171 select SOC_HAS_OMAP2_SDRC 172 173config SOC_TI81XX 174 bool "TI81XX support" 175 depends on ARCH_OMAP3 176 default y 177 178config OMAP_PACKAGE_CBC 179 bool 180 181config OMAP_PACKAGE_CBB 182 bool 183 184config OMAP_PACKAGE_CUS 185 bool 186 187config OMAP_PACKAGE_CBP 188 bool 189 190comment "OMAP Legacy Platform Data Board Type" 191 depends on ARCH_OMAP2PLUS 192 193config MACH_OMAP_GENERIC 194 bool 195 196config MACH_OMAP2_TUSB6010 197 bool 198 depends on ARCH_OMAP2 && SOC_OMAP2420 199 default y if MACH_NOKIA_N8X0 200 201config MACH_OMAP3517EVM 202 bool "OMAP3517/ AM3517 EVM board" 203 depends on ARCH_OMAP3 204 default y 205 206config MACH_OMAP3_PANDORA 207 bool "OMAP3 Pandora" 208 depends on ARCH_OMAP3 209 default y 210 select OMAP_PACKAGE_CBB 211 212config MACH_NOKIA_N810 213 bool 214 215config MACH_NOKIA_N810_WIMAX 216 bool 217 218config MACH_NOKIA_N8X0 219 bool "Nokia N800/N810" 220 depends on SOC_OMAP2420 221 default y 222 select MACH_NOKIA_N810 223 select MACH_NOKIA_N810_WIMAX 224 225config OMAP3_SDRC_AC_TIMING 226 bool "Enable SDRC AC timing register changes" 227 depends on ARCH_OMAP3 228 help 229 If you know that none of your system initiators will attempt to 230 access SDRAM during CORE DVFS, select Y here. This should boost 231 SDRAM performance at lower CORE OPPs. There are relatively few 232 users who will wish to say yes at this point - almost everyone will 233 wish to say no. Selecting yes without understanding what is 234 going on could result in system crashes; 235 236endmenu 237 238endif 239 240config OMAP5_ERRATA_801819 241 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 242 depends on SOC_OMAP5 || SOC_DRA7XX 243 help 244 A livelock can occur in the L2 cache arbitration that might prevent 245 a snoop from completing. Under certain conditions this can cause the 246 system to deadlock. 247 248endmenu 249