xref: /linux/arch/arm/mach-pxa/pxa-regs.h (revision e6acc406)
1e6acc406SArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */
2e6acc406SArnd Bergmann /*
3e6acc406SArnd Bergmann  *  Author:	Nicolas Pitre
4e6acc406SArnd Bergmann  *  Created:	Jun 15, 2001
5e6acc406SArnd Bergmann  *  Copyright:	MontaVista Software Inc.
6e6acc406SArnd Bergmann  */
7e6acc406SArnd Bergmann #ifndef __ASM_MACH_PXA_REGS_H
8e6acc406SArnd Bergmann #define __ASM_MACH_PXA_REGS_H
9e6acc406SArnd Bergmann 
10e6acc406SArnd Bergmann /*
11e6acc406SArnd Bergmann  * Workarounds for at least 2 errata so far require this.
12e6acc406SArnd Bergmann  * The mapping is set in mach-pxa/generic.c.
13e6acc406SArnd Bergmann  */
14e6acc406SArnd Bergmann #define UNCACHED_PHYS_0		0xfe000000
15e6acc406SArnd Bergmann #define UNCACHED_PHYS_0_SIZE	0x00100000
16e6acc406SArnd Bergmann 
17e6acc406SArnd Bergmann /*
18e6acc406SArnd Bergmann  * Intel PXA2xx internal register mapping:
19e6acc406SArnd Bergmann  *
20e6acc406SArnd Bergmann  * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
21e6acc406SArnd Bergmann  * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
22e6acc406SArnd Bergmann  * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
23e6acc406SArnd Bergmann  * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
24e6acc406SArnd Bergmann  * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
25e6acc406SArnd Bergmann  * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
26e6acc406SArnd Bergmann  * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
27e6acc406SArnd Bergmann  *
28e6acc406SArnd Bergmann  * Note that not all PXA2xx chips implement all those addresses, and the
29e6acc406SArnd Bergmann  * kernel only maps the minimum needed range of this mapping.
30e6acc406SArnd Bergmann  */
31e6acc406SArnd Bergmann #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
32e6acc406SArnd Bergmann #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
33e6acc406SArnd Bergmann 
34e6acc406SArnd Bergmann #ifndef __ASSEMBLY__
35e6acc406SArnd Bergmann # define __REG(x)	(*((volatile u32 __iomem *)io_p2v(x)))
36e6acc406SArnd Bergmann 
37e6acc406SArnd Bergmann /* With indexed regs we don't want to feed the index through io_p2v()
38e6acc406SArnd Bergmann    especially if it is a variable, otherwise horrible code will result. */
39e6acc406SArnd Bergmann # define __REG2(x,y)	\
40e6acc406SArnd Bergmann 	(*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
41e6acc406SArnd Bergmann 
42e6acc406SArnd Bergmann # define __PREG(x)	(io_v2p((u32)&(x)))
43e6acc406SArnd Bergmann 
44e6acc406SArnd Bergmann #else
45e6acc406SArnd Bergmann 
46e6acc406SArnd Bergmann # define __REG(x)	io_p2v(x)
47e6acc406SArnd Bergmann # define __PREG(x)	io_v2p(x)
48e6acc406SArnd Bergmann 
49e6acc406SArnd Bergmann #endif
50e6acc406SArnd Bergmann 
51e6acc406SArnd Bergmann 
52e6acc406SArnd Bergmann #endif
53