1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright Altera Corporation (C) 2015. All rights reserved.
4 */
5
6#include "socfpga_stratix10.dtsi"
7
8/ {
9	model = "SoCFPGA Stratix 10 SoCDK";
10	compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
11
12	aliases {
13		serial0 = &uart0;
14		ethernet0 = &gmac0;
15		ethernet1 = &gmac1;
16		ethernet2 = &gmac2;
17	};
18
19	chosen {
20		stdout-path = "serial0:115200n8";
21	};
22
23	leds {
24		compatible = "gpio-leds";
25		led-hps0 {
26			label = "hps_led0";
27			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
28		};
29
30		led-hps1 {
31			label = "hps_led1";
32			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
33		};
34
35		led-hps2 {
36			label = "hps_led2";
37			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
38		};
39	};
40
41	memory {
42		device_type = "memory";
43		/* We expect the bootloader to fill in the reg */
44		reg = <0 0 0 0>;
45	};
46
47	ref_033v: regulator-v-ref {
48		compatible = "regulator-fixed";
49		regulator-name = "0.33V";
50		regulator-min-microvolt = <330000>;
51		regulator-max-microvolt = <330000>;
52	};
53
54	soc {
55		eccmgr {
56			sdmmca-ecc@ff8c8c00 {
57				compatible = "altr,socfpga-s10-sdmmc-ecc",
58					     "altr,socfpga-sdmmc-ecc";
59				reg = <0xff8c8c00 0x100>;
60				altr,ecc-parent = <&mmc>;
61				interrupts = <14 4>,
62					     <15 4>;
63			};
64		};
65	};
66};
67
68&gpio1 {
69	status = "okay";
70};
71
72&gmac0 {
73	status = "okay";
74	phy-mode = "rgmii";
75	phy-handle = <&phy0>;
76
77	max-frame-size = <9000>;
78
79	mdio0 {
80		#address-cells = <1>;
81		#size-cells = <0>;
82		compatible = "snps,dwmac-mdio";
83		phy0: ethernet-phy@0 {
84			reg = <4>;
85
86			txd0-skew-ps = <0>; /* -420ps */
87			txd1-skew-ps = <0>; /* -420ps */
88			txd2-skew-ps = <0>; /* -420ps */
89			txd3-skew-ps = <0>; /* -420ps */
90			rxd0-skew-ps = <420>; /* 0ps */
91			rxd1-skew-ps = <420>; /* 0ps */
92			rxd2-skew-ps = <420>; /* 0ps */
93			rxd3-skew-ps = <420>; /* 0ps */
94			txen-skew-ps = <0>; /* -420ps */
95			txc-skew-ps = <900>; /* 0ps */
96			rxdv-skew-ps = <420>; /* 0ps */
97			rxc-skew-ps = <1680>; /* 780ps */
98		};
99	};
100};
101
102&mmc {
103	status = "okay";
104	cap-sd-highspeed;
105	cap-mmc-highspeed;
106	broken-cd;
107	bus-width = <4>;
108	clk-phase-sd-hs = <0>, <135>;
109};
110
111&osc1 {
112	clock-frequency = <25000000>;
113};
114
115&uart0 {
116	status = "okay";
117};
118
119&usb0 {
120	status = "okay";
121	disable-over-current;
122};
123
124&watchdog0 {
125	status = "okay";
126};
127
128&i2c1 {
129	status = "okay";
130	clock-frequency = <100000>;
131	i2c-sda-falling-time-ns = <890>;  /* hcnt */
132	i2c-sdl-falling-time-ns = <890>;  /* lcnt */
133
134	adc@14 {
135		compatible = "lltc,ltc2497";
136		reg = <0x14>;
137		vref-supply = <&ref_033v>;
138	};
139
140	temp@4c {
141		compatible = "maxim,max1619";
142		reg = <0x4c>;
143	};
144
145	eeprom@51 {
146		compatible = "atmel,24c32";
147		reg = <0x51>;
148		pagesize = <32>;
149	};
150
151	rtc@68 {
152		compatible = "dallas,ds1339";
153		reg = <0x68>;
154	};
155};
156
157&qspi {
158	status = "okay";
159	flash@0 {
160		#address-cells = <1>;
161		#size-cells = <1>;
162		compatible = "micron,mt25qu02g", "jedec,spi-nor";
163		reg = <0>;
164		spi-max-frequency = <100000000>;
165
166		m25p,fast-read;
167		cdns,page-size = <256>;
168		cdns,block-size = <16>;
169		cdns,read-delay = <1>;
170		cdns,tshsl-ns = <50>;
171		cdns,tsd2d-ns = <50>;
172		cdns,tchsh-ns = <4>;
173		cdns,tslch-ns = <4>;
174
175		partitions {
176			compatible = "fixed-partitions";
177			#address-cells = <1>;
178			#size-cells = <1>;
179
180			qspi_boot: partition@0 {
181				label = "Boot and fpga data";
182				reg = <0x0 0x03FE0000>;
183			};
184
185			qspi_rootfs: partition@3FE0000 {
186				label = "Root Filesystem - JFFS2";
187				reg = <0x03FE0000 0x0C020000>;
188			};
189		};
190	};
191};
192