1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Linaro Limited 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 12#include "sa8540p.dtsi" 13#include "sa8540p-pmics.dtsi" 14 15/ { 16 model = "Qualcomm SA8540P Ride"; 17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p"; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c12 = &i2c12; 23 i2c15 = &i2c15; 24 i2c18 = &i2c18; 25 serial0 = &uart17; 26 }; 27 28 chosen { 29 stdout-path = "serial0:115200n8"; 30 }; 31}; 32 33&apps_rsc { 34 regulators-0 { 35 compatible = "qcom,pm8150-rpmh-regulators"; 36 qcom,pmic-id = "a"; 37 38 vreg_l3a: ldo3 { 39 regulator-name = "vreg_l3a"; 40 regulator-min-microvolt = <1200000>; 41 regulator-max-microvolt = <1208000>; 42 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 43 }; 44 45 vreg_l5a: ldo5 { 46 regulator-name = "vreg_l5a"; 47 regulator-min-microvolt = <912000>; 48 regulator-max-microvolt = <912000>; 49 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 50 }; 51 52 vreg_l7a: ldo7 { 53 regulator-name = "vreg_l7a"; 54 regulator-min-microvolt = <1800000>; 55 regulator-max-microvolt = <1800000>; 56 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 57 }; 58 59 vreg_l11a: ldo11 { 60 regulator-name = "vreg_l11a"; 61 regulator-min-microvolt = <880000>; 62 regulator-max-microvolt = <880000>; 63 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 64 }; 65 66 vreg_l13a: ldo13 { 67 regulator-name = "vreg_l13a"; 68 regulator-min-microvolt = <3072000>; 69 regulator-max-microvolt = <3072000>; 70 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 71 }; 72 }; 73 74 regulators-1 { 75 compatible = "qcom,pm8150-rpmh-regulators"; 76 qcom,pmic-id = "c"; 77 78 vreg_l1c: ldo1 { 79 regulator-name = "vreg_l1c"; 80 regulator-min-microvolt = <912000>; 81 regulator-max-microvolt = <912000>; 82 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 83 }; 84 85 vreg_l2c: ldo2 { 86 regulator-name = "vreg_l2c"; 87 regulator-min-microvolt = <3072000>; 88 regulator-max-microvolt = <3072000>; 89 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 90 }; 91 92 vreg_l4c: ldo4 { 93 regulator-name = "vreg_l4c"; 94 regulator-min-microvolt = <1200000>; 95 regulator-max-microvolt = <1208000>; 96 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 97 }; 98 99 vreg_l6c: ldo6 { 100 regulator-name = "vreg_l6c"; 101 regulator-min-microvolt = <1200000>; 102 regulator-max-microvolt = <1200000>; 103 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 104 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 105 RPMH_REGULATOR_MODE_HPM>; 106 regulator-allow-set-load; 107 }; 108 109 vreg_l7c: ldo7 { 110 regulator-name = "vreg_l7c"; 111 regulator-min-microvolt = <1800000>; 112 regulator-max-microvolt = <1800000>; 113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 114 }; 115 116 vreg_l17c: ldo17 { 117 regulator-name = "vreg_l17c"; 118 regulator-min-microvolt = <2504000>; 119 regulator-max-microvolt = <2504000>; 120 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 121 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 122 RPMH_REGULATOR_MODE_HPM>; 123 regulator-allow-set-load; 124 }; 125 }; 126 127 regulators-2 { 128 compatible = "qcom,pm8150-rpmh-regulators"; 129 qcom,pmic-id = "g"; 130 131 vreg_l3g: ldo3 { 132 regulator-name = "vreg_l3g"; 133 regulator-min-microvolt = <1200000>; 134 regulator-max-microvolt = <1200000>; 135 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 136 }; 137 138 vreg_l7g: ldo7 { 139 regulator-name = "vreg_l7g"; 140 regulator-min-microvolt = <1800000>; 141 regulator-max-microvolt = <1800000>; 142 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 143 }; 144 145 vreg_l8g: ldo8 { 146 regulator-name = "vreg_l8g"; 147 regulator-min-microvolt = <880000>; 148 regulator-max-microvolt = <880000>; 149 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 150 }; 151 }; 152}; 153 154&i2c0 { 155 pinctrl-names = "default"; 156 pinctrl-0 = <&i2c0_default>; 157 158 status = "okay"; 159}; 160 161&i2c1 { 162 pinctrl-names = "default"; 163 pinctrl-0 = <&i2c1_default>; 164 165 status = "okay"; 166}; 167 168&i2c12 { 169 pinctrl-names = "default"; 170 pinctrl-0 = <&i2c12_default>; 171 172 status = "okay"; 173}; 174 175&i2c15 { 176 pinctrl-names = "default"; 177 pinctrl-0 = <&i2c15_default>; 178 179 status = "okay"; 180}; 181 182&i2c18 { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&i2c18_default>; 185 186 status = "okay"; 187}; 188 189&pcie2a { 190 ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>, 191 <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>, 192 <0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>; 193 194 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; 195 wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>; 196 197 pinctrl-names = "default"; 198 pinctrl-0 = <&pcie2a_default>; 199 200 status = "okay"; 201}; 202 203&pcie2a_phy { 204 vdda-phy-supply = <&vreg_l11a>; 205 vdda-pll-supply = <&vreg_l3a>; 206 207 status = "okay"; 208}; 209 210&pcie3a { 211 ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, 212 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x20000000>, 213 <0x03000000 0x6 0x00000000 0x6 0x00000000 0x2 0x00000000>; 214 215 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 216 wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; 217 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pcie3a_default>; 220 221 status = "okay"; 222}; 223 224&pcie3a_phy { 225 vdda-phy-supply = <&vreg_l11a>; 226 vdda-pll-supply = <&vreg_l3a>; 227 228 status = "okay"; 229}; 230 231&qup0 { 232 status = "okay"; 233}; 234 235&qup1 { 236 status = "okay"; 237}; 238 239&qup2 { 240 status = "okay"; 241}; 242 243&remoteproc_nsp0 { 244 firmware-name = "qcom/sa8540p/cdsp.mbn"; 245 status = "okay"; 246}; 247 248&remoteproc_nsp1 { 249 firmware-name = "qcom/sa8540p/cdsp1.mbn"; 250 status = "okay"; 251}; 252 253&uart17 { 254 compatible = "qcom,geni-debug-uart"; 255 status = "okay"; 256}; 257 258&ufs_mem_hc { 259 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; 260 261 vcc-supply = <&vreg_l17c>; 262 vccq-supply = <&vreg_l6c>; 263 264 status = "okay"; 265}; 266 267&ufs_mem_phy { 268 vdda-phy-supply = <&vreg_l8g>; 269 vdda-pll-supply = <&vreg_l3g>; 270 271 status = "okay"; 272}; 273 274&usb_0 { 275 status = "okay"; 276}; 277 278&usb_0_dwc3 { 279 dr_mode = "peripheral"; 280}; 281 282&usb_0_hsphy { 283 vdda-pll-supply = <&vreg_l5a>; 284 vdda18-supply = <&vreg_l7a>; 285 vdda33-supply = <&vreg_l13a>; 286 287 status = "okay"; 288}; 289 290&usb_0_qmpphy { 291 vdda-phy-supply = <&vreg_l3a>; 292 vdda-pll-supply = <&vreg_l5a>; 293 294 status = "okay"; 295}; 296 297&usb_2_hsphy0 { 298 vdda-pll-supply = <&vreg_l5a>; 299 vdda18-supply = <&vreg_l7g>; 300 vdda33-supply = <&vreg_l13a>; 301 302 status = "okay"; 303}; 304 305&usb_2_qmpphy0 { 306 vdda-phy-supply = <&vreg_l3a>; 307 vdda-pll-supply = <&vreg_l5a>; 308 309 status = "okay"; 310}; 311 312&xo_board_clk { 313 clock-frequency = <38400000>; 314}; 315 316/* PINCTRL */ 317 318&tlmm { 319 i2c0_default: i2c0-default-state { 320 /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ 321 pins = "gpio135", "gpio136"; 322 function = "qup0"; 323 drive-strength = <2>; 324 bias-pull-up; 325 }; 326 327 i2c1_default: i2c1-default-state { 328 /* To PM40028B-F3EI PCIe switch */ 329 pins = "gpio158", "gpio159"; 330 function = "qup1"; 331 drive-strength = <2>; 332 bias-pull-up; 333 }; 334 335 i2c12_default: i2c12-default-state { 336 /* To Maxim max20411 */ 337 pins = "gpio0", "gpio1"; 338 function = "qup12"; 339 drive-strength = <2>; 340 bias-pull-up; 341 }; 342 343 i2c15_default: i2c15-default-state { 344 /* To display connector (SIP1 only) */ 345 pins = "gpio36", "gpio37"; 346 function = "qup15"; 347 drive-strength = <2>; 348 bias-pull-up; 349 }; 350 351 i2c18_default: i2c18-default-state { 352 /* To ASM330LHH IMU (SIP1 only) */ 353 pins = "gpio66", "gpio67"; 354 function = "qup18"; 355 drive-strength = <2>; 356 bias-pull-up; 357 }; 358 359 pcie2a_default: pcie2a-default-state { 360 perst-pins { 361 pins = "gpio143"; 362 function = "gpio"; 363 drive-strength = <2>; 364 bias-pull-down; 365 }; 366 367 clkreq-pins { 368 pins = "gpio142"; 369 function = "pcie2a_clkreq"; 370 drive-strength = <2>; 371 bias-pull-up; 372 }; 373 374 wake-pins { 375 pins = "gpio145"; 376 function = "gpio"; 377 drive-strength = <2>; 378 bias-pull-up; 379 }; 380 }; 381 382 pcie3a_default: pcie3a-default-state { 383 perst-pins { 384 pins = "gpio151"; 385 function = "gpio"; 386 drive-strength = <2>; 387 bias-pull-down; 388 }; 389 390 clkreq-pins { 391 pins = "gpio150"; 392 function = "pcie3a_clkreq"; 393 drive-strength = <2>; 394 bias-pull-up; 395 }; 396 397 wake-pins { 398 pins = "gpio56"; 399 function = "gpio"; 400 drive-strength = <2>; 401 bias-pull-up; 402 }; 403 }; 404}; 405