xref: /linux/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi (revision c6fbb759)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
4 *
5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6 */
7
8#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9#include <dt-bindings/input/linux-event-codes.h>
10#include "sc7280.dtsi"
11#include "pm7325.dtsi"
12#include "pm8350c.dtsi"
13#include "pmk8350.dtsi"
14
15#include "sc7280-chrome-common.dtsi"
16
17/ {
18	aliases {
19		bluetooth0 = &bluetooth;
20		serial1 = &uart7;
21	};
22
23	max98360a: audio-codec-0 {
24		compatible = "maxim,max98360a";
25		pinctrl-names = "default";
26		pinctrl-0 = <&amp_en>;
27		sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
28		#sound-dai-cells = <0>;
29	};
30
31	wcd9385: audio-codec-1 {
32		compatible = "qcom,wcd9385-codec";
33		pinctrl-names = "default", "sleep";
34		pinctrl-0 = <&wcd_reset_n>;
35		pinctrl-1 = <&wcd_reset_n_sleep>;
36
37		reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
38
39		qcom,rx-device = <&wcd_rx>;
40		qcom,tx-device = <&wcd_tx>;
41
42		vdd-rxtx-supply = <&vreg_l18b_1p8>;
43		vdd-io-supply = <&vreg_l18b_1p8>;
44		vdd-buck-supply = <&vreg_l17b_1p8>;
45		vdd-mic-bias-supply = <&vreg_bob>;
46
47		qcom,micbias1-microvolt = <1800000>;
48		qcom,micbias2-microvolt = <1800000>;
49		qcom,micbias3-microvolt = <1800000>;
50		qcom,micbias4-microvolt = <1800000>;
51
52		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
53							  500000 500000 500000>;
54		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
55		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
56		#sound-dai-cells = <1>;
57	};
58
59	gpio-keys {
60		compatible = "gpio-keys";
61		label = "gpio-keys";
62
63		pinctrl-names = "default";
64		pinctrl-0 = <&key_vol_up_default>;
65
66		key-volume-up {
67			label = "volume_up";
68			gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
69			linux,input-type = <1>;
70			linux,code = <KEY_VOLUMEUP>;
71			gpio-key,wakeup;
72			debounce-interval = <15>;
73			linux,can-disable;
74		};
75	};
76
77	nvme_3v3_regulator: nvme-3v3-regulator {
78		compatible = "regulator-fixed";
79		regulator-name = "VLDO_3V3";
80
81		regulator-min-microvolt = <3300000>;
82		regulator-max-microvolt = <3300000>;
83
84		enable-active-high;
85		pinctrl-names = "default";
86		pinctrl-0 = <&nvme_pwren>;
87	};
88
89	sound: sound {
90		compatible = "google,sc7280-herobrine";
91		model = "sc7280-wcd938x-max98360a-1mic";
92
93		audio-routing =
94			"IN1_HPHL", "HPHL_OUT",
95			"IN2_HPHR", "HPHR_OUT",
96			"AMIC1", "MIC BIAS1",
97			"AMIC2", "MIC BIAS2",
98			"VA DMIC0", "MIC BIAS3",
99			"VA DMIC1", "MIC BIAS3",
100			"VA DMIC2", "MIC BIAS1",
101			"VA DMIC3", "MIC BIAS1",
102			"TX SWR_ADC0", "ADC1_OUTPUT",
103			"TX SWR_ADC1", "ADC2_OUTPUT",
104			"TX SWR_ADC2", "ADC3_OUTPUT",
105			"TX SWR_DMIC0", "DMIC1_OUTPUT",
106			"TX SWR_DMIC1", "DMIC2_OUTPUT",
107			"TX SWR_DMIC2", "DMIC3_OUTPUT",
108			"TX SWR_DMIC3", "DMIC4_OUTPUT",
109			"TX SWR_DMIC4", "DMIC5_OUTPUT",
110			"TX SWR_DMIC5", "DMIC6_OUTPUT",
111			"TX SWR_DMIC6", "DMIC7_OUTPUT",
112			"TX SWR_DMIC7", "DMIC8_OUTPUT";
113
114		qcom,msm-mbhc-hphl-swh = <1>;
115		qcom,msm-mbhc-gnd-swh = <1>;
116
117		#address-cells = <1>;
118		#size-cells = <0>;
119		#sound-dai-cells = <0>;
120
121		dai-link@0 {
122			link-name = "MAX98360A";
123			reg = <0>;
124
125			cpu {
126				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
127			};
128
129			codec {
130				sound-dai = <&max98360a>;
131			};
132		};
133
134		dai-link@1 {
135			link-name = "DisplayPort";
136			reg = <1>;
137
138			cpu {
139				sound-dai = <&lpass_cpu LPASS_DP_RX>;
140			};
141
142			codec {
143				sound-dai = <&mdss_dp>;
144			};
145		};
146
147		dai-link@2 {
148			link-name = "WCD9385 Playback";
149			reg = <2>;
150
151			cpu {
152				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
153			};
154
155			codec {
156				sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
157			};
158		};
159
160		dai-link@3 {
161			link-name = "WCD9385 Capture";
162			reg = <3>;
163
164			cpu {
165				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
166			};
167
168			codec {
169				sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
170			};
171		};
172
173		dai-link@4 {
174			link-name = "DMIC";
175			reg = <4>;
176
177			cpu {
178				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
179			};
180
181			codec {
182				sound-dai = <&lpass_va_macro 0>;
183			};
184		};
185	};
186};
187
188&apps_rsc {
189	pm7325-regulators {
190		compatible = "qcom,pm7325-rpmh-regulators";
191		qcom,pmic-id = "b";
192
193		vreg_s1b_1p8: smps1 {
194			regulator-min-microvolt = <1856000>;
195			regulator-max-microvolt = <2040000>;
196		};
197
198		vreg_s7b_0p9: smps7 {
199			regulator-min-microvolt = <535000>;
200			regulator-max-microvolt = <1120000>;
201		};
202
203		vreg_s8b_1p2: smps8 {
204			regulator-min-microvolt = <1256000>;
205			regulator-max-microvolt = <1500000>;
206		};
207
208		vreg_l1b_0p8: ldo1 {
209			regulator-min-microvolt = <825000>;
210			regulator-max-microvolt = <925000>;
211		};
212
213		vreg_l2b_3p0: ldo2 {
214			regulator-min-microvolt = <2700000>;
215			regulator-max-microvolt = <3544000>;
216		};
217
218		vreg_l6b_1p2: ldo6 {
219			regulator-min-microvolt = <1140000>;
220			regulator-max-microvolt = <1260000>;
221		};
222
223		vreg_l7b_2p9: ldo7 {
224			regulator-min-microvolt = <2960000>;
225			regulator-max-microvolt = <2960000>;
226		};
227
228		vreg_l8b_0p9: ldo8 {
229			regulator-min-microvolt = <870000>;
230			regulator-max-microvolt = <970000>;
231		};
232
233		vreg_l9b_1p2: ldo9 {
234			regulator-min-microvolt = <1080000>;
235			regulator-max-microvolt = <1304000>;
236		};
237
238		vreg_l11b_1p7: ldo11 {
239			regulator-min-microvolt = <1504000>;
240			regulator-max-microvolt = <2000000>;
241		};
242
243		vreg_l12b_0p8: ldo12 {
244			regulator-min-microvolt = <751000>;
245			regulator-max-microvolt = <824000>;
246		};
247
248		vreg_l13b_0p8: ldo13 {
249			regulator-min-microvolt = <530000>;
250			regulator-max-microvolt = <824000>;
251		};
252
253		vreg_l14b_1p2: ldo14 {
254			regulator-min-microvolt = <1080000>;
255			regulator-max-microvolt = <1304000>;
256		};
257
258		vreg_l15b_0p8: ldo15 {
259			regulator-min-microvolt = <765000>;
260			regulator-max-microvolt = <1020000>;
261		};
262
263		vreg_l16b_1p2: ldo16 {
264			regulator-min-microvolt = <1100000>;
265			regulator-max-microvolt = <1300000>;
266		};
267
268		vreg_l17b_1p8: ldo17 {
269			regulator-min-microvolt = <1700000>;
270			regulator-max-microvolt = <1900000>;
271		};
272
273		vreg_l18b_1p8: ldo18 {
274			regulator-min-microvolt = <1800000>;
275			regulator-max-microvolt = <2000000>;
276		};
277
278		vreg_l19b_1p8: ldo19 {
279			regulator-min-microvolt = <1800000>;
280			regulator-max-microvolt = <1800000>;
281		};
282	};
283
284	pm8350c-regulators {
285		compatible = "qcom,pm8350c-rpmh-regulators";
286		qcom,pmic-id = "c";
287
288		vreg_s1c_2p2: smps1 {
289			regulator-min-microvolt = <2190000>;
290			regulator-max-microvolt = <2210000>;
291		};
292
293		vreg_s9c_1p0: smps9 {
294			regulator-min-microvolt = <1010000>;
295			regulator-max-microvolt = <1170000>;
296		};
297
298		vreg_l1c_1p8: ldo1 {
299			regulator-min-microvolt = <1800000>;
300			regulator-max-microvolt = <1980000>;
301		};
302
303		vreg_l2c_1p8: ldo2 {
304			regulator-min-microvolt = <1620000>;
305			regulator-max-microvolt = <1980000>;
306		};
307
308		vreg_l3c_3p0: ldo3 {
309			regulator-min-microvolt = <2800000>;
310			regulator-max-microvolt = <3540000>;
311		};
312
313		vreg_l4c_1p8: ldo4 {
314			regulator-min-microvolt = <1620000>;
315			regulator-max-microvolt = <3300000>;
316		};
317
318		vreg_l5c_1p8: ldo5 {
319			regulator-min-microvolt = <1620000>;
320			regulator-max-microvolt = <3300000>;
321		};
322
323		vreg_l6c_2p9: ldo6 {
324			regulator-min-microvolt = <1800000>;
325			regulator-max-microvolt = <2950000>;
326		};
327
328		vreg_l7c_3p0: ldo7 {
329			regulator-min-microvolt = <3000000>;
330			regulator-max-microvolt = <3544000>;
331		};
332
333		vreg_l8c_1p8: ldo8 {
334			regulator-min-microvolt = <1620000>;
335			regulator-max-microvolt = <2000000>;
336		};
337
338		vreg_l9c_2p9: ldo9 {
339			regulator-min-microvolt = <2960000>;
340			regulator-max-microvolt = <2960000>;
341		};
342
343		vreg_l10c_0p8: ldo10 {
344			regulator-min-microvolt = <720000>;
345			regulator-max-microvolt = <1050000>;
346		};
347
348		vreg_l11c_2p8: ldo11 {
349			regulator-min-microvolt = <2800000>;
350			regulator-max-microvolt = <3544000>;
351		};
352
353		vreg_l12c_1p8: ldo12 {
354			regulator-min-microvolt = <1650000>;
355			regulator-max-microvolt = <2000000>;
356		};
357
358		vreg_l13c_3p0: ldo13 {
359			regulator-min-microvolt = <2700000>;
360			regulator-max-microvolt = <3544000>;
361		};
362
363		vreg_bob: bob {
364			regulator-min-microvolt = <3008000>;
365			regulator-max-microvolt = <3960000>;
366		};
367	};
368};
369
370&gpi_dma0 {
371	status = "okay";
372};
373
374&gpi_dma1 {
375	status = "okay";
376};
377
378&ipa {
379	status = "okay";
380	modem-init;
381};
382
383&lpass_cpu {
384	status = "okay";
385
386	pinctrl-names = "default";
387	pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
388
389	dai-link@1 {
390		reg = <MI2S_SECONDARY>;
391		qcom,playback-sd-lines = <0>;
392	};
393
394	dai-link@5 {
395		reg = <LPASS_DP_RX>;
396	};
397
398	dai-link@6 {
399		reg = <LPASS_CDC_DMA_RX0>;
400	};
401
402	dai-link@19 {
403		reg = <LPASS_CDC_DMA_TX3>;
404	};
405
406	dai-link@25 {
407		reg = <LPASS_CDC_DMA_VA_TX0>;
408	};
409};
410
411&lpass_rx_macro {
412	status = "okay";
413};
414
415&lpass_tx_macro {
416	status = "okay";
417};
418
419&lpass_va_macro {
420	status = "okay";
421	vdd-micb-supply = <&vreg_bob>;
422};
423
424&pcie1 {
425	status = "okay";
426	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
427
428	vddpe-3v3-supply = <&nvme_3v3_regulator>;
429
430	pinctrl-names = "default";
431	pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
432};
433
434&pcie1_phy {
435	status = "okay";
436
437	vdda-phy-supply = <&vreg_l10c_0p8>;
438	vdda-pll-supply = <&vreg_l6b_1p2>;
439};
440
441&pmk8350_vadc {
442	pmk8350-die-temp@3 {
443		reg = <PMK8350_ADC7_DIE_TEMP>;
444		label = "pmk8350_die_temp";
445		qcom,pre-scaling = <1 1>;
446	};
447};
448
449&qfprom {
450	vcc-supply = <&vreg_l1c_1p8>;
451};
452
453&qupv3_id_0 {
454	status = "okay";
455};
456
457&qupv3_id_1 {
458	status = "okay";
459};
460
461&sdhc_1 {
462	status = "okay";
463
464	non-removable;
465	no-sd;
466	no-sdio;
467
468	vmmc-supply = <&vreg_l7b_2p9>;
469	vqmmc-supply = <&vreg_l19b_1p8>;
470};
471
472&sdhc_2 {
473	status = "okay";
474
475	pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
476	pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
477
478	vmmc-supply = <&vreg_l9c_2p9>;
479	vqmmc-supply = <&vreg_l6c_2p9>;
480
481	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
482};
483
484&swr0 {
485	status = "okay";
486
487	wcd_rx: codec@0,4 {
488		compatible = "sdw20217010d00";
489		reg = <0 4>;
490		#sound-dai-cells = <1>;
491		qcom,rx-port-mapping = <1 2 3 4 5>;
492	};
493};
494
495&swr1 {
496	status = "okay";
497
498	wcd_tx: codec@0,3 {
499		compatible = "sdw20217010d00";
500		reg = <0 3>;
501		#sound-dai-cells = <1>;
502		qcom,tx-port-mapping = <1 2 3 4>;
503	};
504};
505
506&uart5 {
507	compatible = "qcom,geni-debug-uart";
508	status = "okay";
509};
510
511&usb_1 {
512	status = "okay";
513};
514
515&usb_1_dwc3 {
516	dr_mode = "host";
517};
518
519&usb_1_hsphy {
520	status = "okay";
521
522	vdda-pll-supply = <&vreg_l10c_0p8>;
523	vdda33-supply = <&vreg_l2b_3p0>;
524	vdda18-supply = <&vreg_l1c_1p8>;
525};
526
527&usb_1_qmpphy {
528	status = "okay";
529
530	vdda-phy-supply = <&vreg_l6b_1p2>;
531	vdda-pll-supply = <&vreg_l1b_0p8>;
532};
533
534&uart7 {
535	status = "okay";
536
537	/delete-property/interrupts;
538	interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
539				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
540	pinctrl-names = "default", "sleep";
541	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
542
543	bluetooth: bluetooth {
544		compatible = "qcom,wcn6750-bt";
545		pinctrl-names = "default";
546		pinctrl-0 = <&bt_en>, <&sw_ctrl>;
547		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
548		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
549		vddaon-supply = <&vreg_s7b_0p9>;
550		vddbtcxmx-supply = <&vreg_s7b_0p9>;
551		vddrfacmn-supply = <&vreg_s7b_0p9>;
552		vddrfa0p8-supply = <&vreg_s7b_0p9>;
553		vddrfa1p7-supply = <&vreg_s1b_1p8>;
554		vddrfa1p2-supply = <&vreg_s8b_1p2>;
555		vddrfa2p2-supply = <&vreg_s1c_2p2>;
556		vddasd-supply = <&vreg_l11c_2p8>;
557		max-speed = <3200000>;
558	};
559};
560
561/* PINCTRL - additions to nodes defined in sc7280.dtsi */
562
563&dp_hot_plug_det {
564	bias-disable;
565};
566
567&lpass_dmic01_clk {
568	drive-strength = <8>;
569	bias-disable;
570};
571
572&lpass_dmic01_clk_sleep {
573	drive-strength = <2>;
574};
575
576&lpass_dmic01_data {
577	bias-pull-down;
578};
579
580&lpass_dmic23_clk {
581	drive-strength = <8>;
582	bias-disable;
583};
584
585&lpass_dmic23_clk_sleep {
586	drive-strength = <2>;
587};
588
589&lpass_dmic23_data {
590	bias-pull-down;
591};
592
593&lpass_rx_swr_clk {
594	drive-strength = <2>;
595	slew-rate = <1>;
596	bias-disable;
597};
598
599&lpass_rx_swr_clk_sleep {
600	bias-pull-down;
601};
602
603&lpass_rx_swr_data {
604	drive-strength = <2>;
605	slew-rate = <1>;
606	bias-bus-hold;
607};
608
609&lpass_rx_swr_data_sleep {
610	bias-pull-down;
611};
612
613&lpass_tx_swr_clk {
614	drive-strength = <2>;
615	slew-rate = <1>;
616	bias-disable;
617};
618
619&lpass_tx_swr_clk_sleep {
620	bias-pull-down;
621};
622
623&lpass_tx_swr_data {
624	drive-strength = <2>;
625	slew-rate = <1>;
626	bias-bus-hold;
627};
628
629&mi2s1_data0 {
630	drive-strength = <6>;
631	bias-disable;
632};
633
634&mi2s1_sclk {
635	drive-strength = <6>;
636	bias-disable;
637};
638
639&mi2s1_ws {
640	drive-strength = <6>;
641};
642
643&pm7325_gpios {
644	key_vol_up_default: key-vol-up-state {
645		pins = "gpio6";
646		function = "normal";
647		input-enable;
648		bias-pull-up;
649		power-source = <0>;
650		qcom,drive-strength = <3>;
651	};
652};
653
654&pcie1_clkreq_n {
655	bias-pull-up;
656	drive-strength = <2>;
657};
658
659&qspi_cs0 {
660	bias-disable;
661};
662
663&qspi_clk {
664	bias-disable;
665};
666
667&qspi_data01 {
668	/* High-Z when no transfers; nice to park the lines */
669	bias-pull-up;
670};
671
672&qup_uart5_tx {
673	drive-strength = <2>;
674	bias-disable;
675};
676
677&qup_uart5_rx {
678	drive-strength = <2>;
679	bias-pull-up;
680};
681
682&qup_uart7_cts {
683	/*
684	 * Configure a bias-bus-hold on CTS to lower power
685	 * usage when Bluetooth is turned off. Bus hold will
686	 * maintain a low power state regardless of whether
687	 * the Bluetooth module drives the pin in either
688	 * direction or leaves the pin fully unpowered.
689	 */
690	bias-bus-hold;
691};
692
693&qup_uart7_rts {
694	/* We'll drive RTS, so no pull */
695	drive-strength = <2>;
696	bias-disable;
697};
698
699&qup_uart7_tx {
700	/* We'll drive TX, so no pull */
701	drive-strength = <2>;
702	bias-disable;
703};
704
705&qup_uart7_rx {
706	/*
707	 * Configure a pull-up on RX. This is needed to avoid
708	 * garbage data when the TX pin of the Bluetooth module is
709	 * in tri-state (module powered off or not driving the
710	 * signal yet).
711	 */
712	bias-pull-up;
713};
714
715&sdc1_clk {
716	bias-disable;
717	drive-strength = <16>;
718};
719
720&sdc1_cmd {
721	bias-pull-up;
722	drive-strength = <10>;
723};
724
725&sdc1_data {
726	bias-pull-up;
727	drive-strength = <10>;
728};
729
730&sdc1_rclk {
731	bias-pull-down;
732};
733
734&sdc2_clk {
735	bias-disable;
736	drive-strength = <16>;
737};
738
739&sdc2_cmd {
740	bias-pull-up;
741	drive-strength = <10>;
742};
743
744&sdc2_data {
745	bias-pull-up;
746	drive-strength = <10>;
747};
748
749&tlmm {
750	amp_en: amp-en {
751		pins = "gpio63";
752		bias-pull-down;
753		drive-strength = <2>;
754	};
755
756	bt_en: bt-en-pins {
757		pins = "gpio85";
758		function = "gpio";
759		output-low;
760		bias-disable;
761	};
762
763	nvme_pwren: nvme-pwren-pins {
764		function = "gpio";
765	};
766
767	pcie1_reset_n: pcie1-reset-n-pins {
768		pins = "gpio2";
769		function = "gpio";
770
771		drive-strength = <16>;
772		output-low;
773		bias-disable;
774	};
775
776	pcie1_wake_n: pcie1-wake-n-pins {
777		pins = "gpio3";
778		function = "gpio";
779
780		drive-strength = <2>;
781		bias-pull-up;
782	};
783
784	qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
785		pins = "gpio28";
786		function = "gpio";
787		/*
788		 * Configure a bias-bus-hold on CTS to lower power
789		 * usage when Bluetooth is turned off. Bus hold will
790		 * maintain a low power state regardless of whether
791		 * the Bluetooth module drives the pin in either
792		 * direction or leaves the pin fully unpowered.
793		 */
794		bias-bus-hold;
795	};
796
797	qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
798		pins = "gpio29";
799		function = "gpio";
800		/*
801		 * Configure pull-down on RTS. As RTS is active low
802		 * signal, pull it low to indicate the BT SoC that it
803		 * can wakeup the system anytime from suspend state by
804		 * pulling RX low (by sending wakeup bytes).
805		 */
806		bias-pull-down;
807	};
808
809	qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
810		pins = "gpio30";
811		function = "gpio";
812		/*
813		 * Configure pull-up on TX when it isn't actively driven
814		 * to prevent BT SoC from receiving garbage during sleep.
815		 */
816		bias-pull-up;
817	};
818
819	qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
820		pins = "gpio31";
821		function = "gpio";
822		/*
823		 * Configure a pull-up on RX. This is needed to avoid
824		 * garbage data when the TX pin of the Bluetooth module
825		 * is floating which may cause spurious wakeups.
826		 */
827		bias-pull-up;
828	};
829
830	sd_cd: sd-cd-pins {
831		pins = "gpio91";
832		function = "gpio";
833		bias-pull-up;
834	};
835
836	sw_ctrl: sw-ctrl-pins {
837		pins = "gpio86";
838		function = "gpio";
839		bias-pull-down;
840	};
841
842	wcd_reset_n: wcd-reset-n {
843		pins = "gpio83";
844		function = "gpio";
845		drive-strength = <8>;
846	};
847
848	wcd_reset_n_sleep: wcd-reset-n-sleep {
849		pins = "gpio83";
850		function = "gpio";
851		drive-strength = <8>;
852		bias-disable;
853	};
854};
855