1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 */
5
6/dts-v1/;
7#include <dt-bindings/pwm/pwm.h>
8#include "rk3399.dtsi"
9
10/ {
11	model = "Rockchip RK3399 Evaluation Board";
12	compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
13
14	aliases {
15		mmc0 = &sdhci;
16	};
17
18	backlight: backlight {
19		compatible = "pwm-backlight";
20		brightness-levels = <
21			  0   1   2   3   4   5   6   7
22			  8   9  10  11  12  13  14  15
23			 16  17  18  19  20  21  22  23
24			 24  25  26  27  28  29  30  31
25			 32  33  34  35  36  37  38  39
26			 40  41  42  43  44  45  46  47
27			 48  49  50  51  52  53  54  55
28			 56  57  58  59  60  61  62  63
29			 64  65  66  67  68  69  70  71
30			 72  73  74  75  76  77  78  79
31			 80  81  82  83  84  85  86  87
32			 88  89  90  91  92  93  94  95
33			 96  97  98  99 100 101 102 103
34			104 105 106 107 108 109 110 111
35			112 113 114 115 116 117 118 119
36			120 121 122 123 124 125 126 127
37			128 129 130 131 132 133 134 135
38			136 137 138 139 140 141 142 143
39			144 145 146 147 148 149 150 151
40			152 153 154 155 156 157 158 159
41			160 161 162 163 164 165 166 167
42			168 169 170 171 172 173 174 175
43			176 177 178 179 180 181 182 183
44			184 185 186 187 188 189 190 191
45			192 193 194 195 196 197 198 199
46			200 201 202 203 204 205 206 207
47			208 209 210 211 212 213 214 215
48			216 217 218 219 220 221 222 223
49			224 225 226 227 228 229 230 231
50			232 233 234 235 236 237 238 239
51			240 241 242 243 244 245 246 247
52			248 249 250 251 252 253 254 255>;
53		default-brightness-level = <200>;
54		pwms = <&pwm0 0 25000 0>;
55	};
56
57	edp_panel: edp-panel {
58		compatible = "lg,lp079qx1-sp0v";
59		backlight = <&backlight>;
60		enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
61		power-supply = <&vcc3v3_s0>;
62
63		port {
64			panel_in_edp: endpoint {
65				remote-endpoint = <&edp_out_panel>;
66			};
67		};
68	};
69
70	clkin_gmac: external-gmac-clock {
71		compatible = "fixed-clock";
72		clock-frequency = <125000000>;
73		clock-output-names = "clkin_gmac";
74		#clock-cells = <0>;
75	};
76
77	vdd_center: vdd-center {
78		compatible = "pwm-regulator";
79		pwms = <&pwm3 0 25000 0>;
80		regulator-name = "vdd_center";
81		regulator-min-microvolt = <800000>;
82		regulator-max-microvolt = <1400000>;
83		regulator-always-on;
84		regulator-boot-on;
85		status = "okay";
86	};
87
88	vcc3v3_sys: vcc3v3-sys {
89		compatible = "regulator-fixed";
90		regulator-name = "vcc3v3_sys";
91		regulator-always-on;
92		regulator-boot-on;
93		regulator-min-microvolt = <3300000>;
94		regulator-max-microvolt = <3300000>;
95	};
96
97	vcc5v0_sys: vcc5v0-sys {
98		compatible = "regulator-fixed";
99		regulator-name = "vcc5v0_sys";
100		regulator-always-on;
101		regulator-boot-on;
102		regulator-min-microvolt = <5000000>;
103		regulator-max-microvolt = <5000000>;
104	};
105
106	vcc5v0_host: vcc5v0-host-regulator {
107		compatible = "regulator-fixed";
108		enable-active-high;
109		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
110		pinctrl-names = "default";
111		pinctrl-0 = <&vcc5v0_host_en>;
112		regulator-name = "vcc5v0_host";
113		vin-supply = <&vcc5v0_sys>;
114	};
115
116	vcc_phy: vcc-phy-regulator {
117		compatible = "regulator-fixed";
118		regulator-name = "vcc_phy";
119		regulator-always-on;
120		regulator-boot-on;
121	};
122
123	vcc_phy: vcc-phy-regulator {
124		compatible = "regulator-fixed";
125		regulator-name = "vcc_phy";
126		regulator-always-on;
127		regulator-boot-on;
128	};
129
130};
131
132&edp {
133	status = "okay";
134	force-hpd;
135
136	ports {
137		edp_out: port@1 {
138			reg = <1>;
139			#address-cells = <1>;
140			#size-cells = <0>;
141
142			edp_out_panel: endpoint@0 {
143				reg = <0>;
144				remote-endpoint = <&panel_in_edp>;
145			};
146		};
147	};
148};
149
150&emmc_phy {
151	status = "okay";
152};
153
154&gmac {
155	assigned-clocks = <&cru SCLK_RMII_SRC>;
156	assigned-clock-parents = <&clkin_gmac>;
157	clock_in_out = "input";
158	phy-supply = <&vcc_phy>;
159	phy-mode = "rgmii";
160	pinctrl-names = "default";
161	pinctrl-0 = <&rgmii_pins>;
162	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
163	snps,reset-active-low;
164	snps,reset-delays-us = <0 10000 50000>;
165	tx_delay = <0x28>;
166	rx_delay = <0x11>;
167	status = "okay";
168};
169
170&i2c0 {
171	status = "okay";
172
173	rk808: pmic@1b {
174		compatible = "rockchip,rk808";
175		reg = <0x1b>;
176		interrupt-parent = <&gpio1>;
177		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
178		pinctrl-names = "default";
179		pinctrl-0 = <&pmic_int_l>;
180		rockchip,system-power-controller;
181		wakeup-source;
182		#clock-cells = <1>;
183		clock-output-names = "rk808-clkout1", "rk808-clkout2";
184
185		vcc1-supply = <&vcc3v3_sys>;
186		vcc2-supply = <&vcc3v3_sys>;
187		vcc3-supply = <&vcc3v3_sys>;
188		vcc4-supply = <&vcc3v3_sys>;
189		vcc6-supply = <&vcc3v3_sys>;
190		vcc7-supply = <&vcc3v3_sys>;
191		vcc8-supply = <&vcc3v3_sys>;
192		vcc9-supply = <&vcc3v3_sys>;
193		vcc10-supply = <&vcc3v3_sys>;
194		vcc11-supply = <&vcc3v3_sys>;
195		vcc12-supply = <&vcc3v3_sys>;
196		vddio-supply = <&vcc1v8_pmu>;
197
198		regulators {
199			vdd_log: DCDC_REG1 {
200				regulator-name = "vdd_log";
201				regulator-min-microvolt = <750000>;
202				regulator-max-microvolt = <1350000>;
203				regulator-ramp-delay = <6001>;
204				regulator-always-on;
205				regulator-boot-on;
206				regulator-state-mem {
207					regulator-on-in-suspend;
208					regulator-suspend-microvolt = <900000>;
209				};
210			};
211
212			vdd_cpu_l: DCDC_REG2 {
213				regulator-name = "vdd_cpu_l";
214				regulator-min-microvolt = <750000>;
215				regulator-max-microvolt = <1350000>;
216				regulator-ramp-delay = <6001>;
217				regulator-always-on;
218				regulator-boot-on;
219				regulator-state-mem {
220					regulator-off-in-suspend;
221				};
222			};
223
224			vcc_ddr: DCDC_REG3 {
225				regulator-name = "vcc_ddr";
226				regulator-always-on;
227				regulator-boot-on;
228				regulator-state-mem {
229					regulator-on-in-suspend;
230				};
231			};
232
233			vcc_1v8: DCDC_REG4 {
234				regulator-name = "vcc_1v8";
235				regulator-min-microvolt = <1800000>;
236				regulator-max-microvolt = <1800000>;
237				regulator-always-on;
238				regulator-boot-on;
239				regulator-state-mem {
240					regulator-on-in-suspend;
241					regulator-suspend-microvolt = <1800000>;
242				};
243			};
244
245			vcc1v8_dvp: LDO_REG1 {
246				regulator-name = "vcc1v8_dvp";
247				regulator-min-microvolt = <1800000>;
248				regulator-max-microvolt = <1800000>;
249				regulator-always-on;
250				regulator-boot-on;
251				regulator-state-mem {
252					regulator-off-in-suspend;
253				};
254			};
255
256			vcc3v0_tp: LDO_REG2 {
257				regulator-name = "vcc3v0_tp";
258				regulator-min-microvolt = <3000000>;
259				regulator-max-microvolt = <3000000>;
260				regulator-always-on;
261				regulator-boot-on;
262				regulator-state-mem {
263					regulator-off-in-suspend;
264				};
265			};
266
267			vcc1v8_pmu: LDO_REG3 {
268				regulator-name = "vcc1v8_pmu";
269				regulator-min-microvolt = <1800000>;
270				regulator-max-microvolt = <1800000>;
271				regulator-always-on;
272				regulator-boot-on;
273				regulator-state-mem {
274					regulator-on-in-suspend;
275					regulator-suspend-microvolt = <1800000>;
276				};
277			};
278
279			vcc_sd: LDO_REG4 {
280				regulator-name = "vcc_sd";
281				regulator-min-microvolt = <1800000>;
282				regulator-max-microvolt = <3000000>;
283				regulator-always-on;
284				regulator-boot-on;
285				regulator-state-mem {
286					regulator-on-in-suspend;
287					regulator-suspend-microvolt = <3000000>;
288				};
289			};
290
291			vcca3v0_codec: LDO_REG5 {
292				regulator-name = "vcca3v0_codec";
293				regulator-min-microvolt = <3000000>;
294				regulator-max-microvolt = <3000000>;
295				regulator-always-on;
296				regulator-boot-on;
297				regulator-state-mem {
298					regulator-off-in-suspend;
299				};
300			};
301
302			vcc_1v5: LDO_REG6 {
303				regulator-name = "vcc_1v5";
304				regulator-min-microvolt = <1500000>;
305				regulator-max-microvolt = <1500000>;
306				regulator-always-on;
307				regulator-boot-on;
308				regulator-state-mem {
309					regulator-on-in-suspend;
310					regulator-suspend-microvolt = <1500000>;
311				};
312			};
313
314			vcca1v8_codec: LDO_REG7 {
315				regulator-name = "vcca1v8_codec";
316				regulator-min-microvolt = <1800000>;
317				regulator-max-microvolt = <1800000>;
318				regulator-always-on;
319				regulator-boot-on;
320				regulator-state-mem {
321					regulator-off-in-suspend;
322				};
323			};
324
325			vcc_3v0: LDO_REG8 {
326				regulator-name = "vcc_3v0";
327				regulator-min-microvolt = <3000000>;
328				regulator-max-microvolt = <3000000>;
329				regulator-always-on;
330				regulator-boot-on;
331				regulator-state-mem {
332					regulator-on-in-suspend;
333					regulator-suspend-microvolt = <3000000>;
334				};
335			};
336
337			vcc3v3_s3: SWITCH_REG1 {
338				regulator-name = "vcc3v3_s3";
339				regulator-always-on;
340				regulator-boot-on;
341				regulator-state-mem {
342					regulator-on-in-suspend;
343				};
344			};
345
346			vcc3v3_s0: SWITCH_REG2 {
347				regulator-name = "vcc3v3_s0";
348				regulator-always-on;
349				regulator-boot-on;
350				regulator-state-mem {
351					regulator-off-in-suspend;
352				};
353			};
354		};
355	};
356
357	vdd_cpu_b: regulator@40 {
358		compatible = "silergy,syr827";
359		reg = <0x40>;
360		fcs,suspend-voltage-selector = <1>;
361		regulator-name = "vdd_cpu_b";
362		regulator-min-microvolt = <712500>;
363		regulator-max-microvolt = <1500000>;
364		regulator-ramp-delay = <1000>;
365		regulator-always-on;
366		regulator-boot-on;
367		vin-supply = <&vcc5v0_sys>;
368
369		regulator-state-mem {
370			regulator-off-in-suspend;
371		};
372	};
373
374	vdd_gpu: regulator@41 {
375		compatible = "silergy,syr828";
376		reg = <0x41>;
377		fcs,suspend-voltage-selector = <1>;
378		regulator-name = "vdd_gpu";
379		regulator-min-microvolt = <712500>;
380		regulator-max-microvolt = <1500000>;
381		regulator-ramp-delay = <1000>;
382		regulator-always-on;
383		regulator-boot-on;
384		vin-supply = <&vcc5v0_sys>;
385
386		regulator-state-mem {
387			regulator-off-in-suspend;
388		};
389	};
390};
391
392&pwm0 {
393	status = "okay";
394};
395
396&pwm2 {
397	status = "okay";
398};
399
400&pwm3 {
401	status = "okay";
402};
403
404&sdhci {
405	bus-width = <8>;
406	mmc-hs400-1_8v;
407	mmc-hs400-enhanced-strobe;
408	non-removable;
409	status = "okay";
410};
411
412&pcie_phy {
413	status = "disabled";
414};
415
416&pcie0 {
417	ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
418	num-lanes = <4>;
419	pinctrl-names = "default";
420	pinctrl-0 = <&pcie_clkreqn_cpm>;
421	status = "disabled";
422};
423
424&u2phy0 {
425	status = "okay";
426};
427
428&u2phy0_host {
429	phy-supply = <&vcc5v0_host>;
430	status = "okay";
431};
432
433&u2phy1 {
434	status = "okay";
435};
436
437&u2phy1_host {
438	phy-supply = <&vcc5v0_host>;
439	status = "okay";
440};
441
442&uart2 {
443	status = "okay";
444};
445
446&usb_host0_ehci {
447	status = "okay";
448};
449
450&usb_host0_ohci {
451	status = "okay";
452};
453
454&usb_host1_ehci {
455	status = "okay";
456};
457
458&usb_host1_ohci {
459	status = "okay";
460};
461
462&pinctrl {
463	pmic {
464		pmic_int_l: pmic-int-l {
465			rockchip,pins =
466				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
467		};
468	};
469
470	usb2 {
471		vcc5v0_host_en: vcc5v0-host-en {
472			rockchip,pins =
473				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
474		};
475	};
476};
477
478&vopb {
479	status = "okay";
480};
481
482&vopb_mmu {
483	status = "okay";
484};
485