1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com> 5 */ 6 7/dts-v1/; 8#include <dt-bindings/input/linux-event-codes.h> 9#include <dt-bindings/pwm/pwm.h> 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 model = "Pine64 RockPro64"; 15 compatible = "pine64,rockpro64", "rockchip,rk3399"; 16 17 chosen { 18 stdout-path = "serial2:1500000n8"; 19 }; 20 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; 23 clock-frequency = <125000000>; 24 clock-output-names = "clkin_gmac"; 25 #clock-cells = <0>; 26 }; 27 28 gpio-keys { 29 compatible = "gpio-keys"; 30 autorepeat; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&pwrbtn>; 33 34 power { 35 debounce-interval = <100>; 36 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 37 label = "GPIO Key Power"; 38 linux,code = <KEY_POWER>; 39 wakeup-source; 40 }; 41 }; 42 43 leds { 44 compatible = "gpio-leds"; 45 pinctrl-names = "default"; 46 pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; 47 48 work-led { 49 label = "work"; 50 default-state = "on"; 51 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 52 }; 53 54 diy-led { 55 label = "diy"; 56 default-state = "off"; 57 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 58 }; 59 }; 60 61 sdio_pwrseq: sdio-pwrseq { 62 compatible = "mmc-pwrseq-simple"; 63 clocks = <&rk808 1>; 64 clock-names = "ext_clock"; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&wifi_enable_h>; 67 68 /* 69 * On the module itself this is one of these (depending 70 * on the actual card populated): 71 * - SDIO_RESET_L_WL_REG_ON 72 * - PDN (power down when low) 73 */ 74 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 75 }; 76 77 vcc12v_dcin: vcc12v-dcin { 78 compatible = "regulator-fixed"; 79 regulator-name = "vcc12v_dcin"; 80 regulator-always-on; 81 regulator-boot-on; 82 regulator-min-microvolt = <12000000>; 83 regulator-max-microvolt = <12000000>; 84 }; 85 86 /* switched by pmic_sleep */ 87 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { 88 compatible = "regulator-fixed"; 89 regulator-name = "vcc1v8_s3"; 90 regulator-always-on; 91 regulator-boot-on; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 vin-supply = <&vcc_1v8>; 95 }; 96 97 vcc3v3_pcie: vcc3v3-pcie-regulator { 98 compatible = "regulator-fixed"; 99 enable-active-high; 100 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&pcie_pwr_en>; 103 regulator-name = "vcc3v3_pcie"; 104 regulator-always-on; 105 regulator-boot-on; 106 vin-supply = <&vcc12v_dcin>; 107 }; 108 109 vcc3v3_sys: vcc3v3-sys { 110 compatible = "regulator-fixed"; 111 regulator-name = "vcc3v3_sys"; 112 regulator-always-on; 113 regulator-boot-on; 114 regulator-min-microvolt = <3300000>; 115 regulator-max-microvolt = <3300000>; 116 vin-supply = <&vcc5v0_sys>; 117 }; 118 119 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ 120 vcc5v0_host: vcc5v0-host-regulator { 121 compatible = "regulator-fixed"; 122 enable-active-high; 123 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&vcc5v0_host_en>; 126 regulator-name = "vcc5v0_host"; 127 regulator-always-on; 128 vin-supply = <&vcc5v0_usb>; 129 }; 130 131 vcc5v0_typec: vcc5v0-typec-regulator { 132 compatible = "regulator-fixed"; 133 enable-active-high; 134 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&vcc5v0_typec_en>; 137 regulator-name = "vcc5v0_typec"; 138 regulator-always-on; 139 vin-supply = <&vcc5v0_usb>; 140 }; 141 142 vcc5v0_sys: vcc5v0-sys { 143 compatible = "regulator-fixed"; 144 regulator-name = "vcc5v0_sys"; 145 regulator-always-on; 146 regulator-boot-on; 147 regulator-min-microvolt = <5000000>; 148 regulator-max-microvolt = <5000000>; 149 vin-supply = <&vcc12v_dcin>; 150 }; 151 152 vcc5v0_usb: vcc5v0-usb { 153 compatible = "regulator-fixed"; 154 regulator-name = "vcc5v0_usb"; 155 regulator-always-on; 156 regulator-boot-on; 157 regulator-min-microvolt = <5000000>; 158 regulator-max-microvolt = <5000000>; 159 vin-supply = <&vcc12v_dcin>; 160 }; 161 162 vdd_log: vdd-log { 163 compatible = "pwm-regulator"; 164 pwms = <&pwm2 0 25000 1>; 165 regulator-name = "vdd_log"; 166 regulator-always-on; 167 regulator-boot-on; 168 regulator-min-microvolt = <800000>; 169 regulator-max-microvolt = <1400000>; 170 vin-supply = <&vcc5v0_sys>; 171 }; 172}; 173 174&cpu_l0 { 175 cpu-supply = <&vdd_cpu_l>; 176}; 177 178&cpu_l1 { 179 cpu-supply = <&vdd_cpu_l>; 180}; 181 182&cpu_l2 { 183 cpu-supply = <&vdd_cpu_l>; 184}; 185 186&cpu_l3 { 187 cpu-supply = <&vdd_cpu_l>; 188}; 189 190&cpu_b0 { 191 cpu-supply = <&vdd_cpu_b>; 192}; 193 194&cpu_b1 { 195 cpu-supply = <&vdd_cpu_b>; 196}; 197 198&emmc_phy { 199 status = "okay"; 200}; 201 202&gmac { 203 assigned-clocks = <&cru SCLK_RMII_SRC>; 204 assigned-clock-parents = <&clkin_gmac>; 205 clock_in_out = "input"; 206 phy-supply = <&vcc_lan>; 207 phy-mode = "rgmii"; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&rgmii_pins>; 210 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 211 snps,reset-active-low; 212 snps,reset-delays-us = <0 10000 50000>; 213 tx_delay = <0x28>; 214 rx_delay = <0x11>; 215 status = "okay"; 216}; 217 218&hdmi { 219 ddc-i2c-bus = <&i2c3>; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&hdmi_cec>; 222 status = "okay"; 223}; 224 225&hdmi_sound { 226 status = "okay"; 227}; 228 229&gpu { 230 mali-supply = <&vdd_gpu>; 231 status = "okay"; 232}; 233 234&i2c0 { 235 clock-frequency = <400000>; 236 i2c-scl-rising-time-ns = <168>; 237 i2c-scl-falling-time-ns = <4>; 238 status = "okay"; 239 240 rk808: pmic@1b { 241 compatible = "rockchip,rk808"; 242 reg = <0x1b>; 243 interrupt-parent = <&gpio1>; 244 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 245 #clock-cells = <1>; 246 clock-output-names = "xin32k", "rk808-clkout2"; 247 pinctrl-names = "default"; 248 pinctrl-0 = <&pmic_int_l>; 249 rockchip,system-power-controller; 250 wakeup-source; 251 252 vcc1-supply = <&vcc5v0_sys>; 253 vcc2-supply = <&vcc5v0_sys>; 254 vcc3-supply = <&vcc5v0_sys>; 255 vcc4-supply = <&vcc5v0_sys>; 256 vcc6-supply = <&vcc5v0_sys>; 257 vcc7-supply = <&vcc5v0_sys>; 258 vcc8-supply = <&vcc3v3_sys>; 259 vcc9-supply = <&vcc5v0_sys>; 260 vcc10-supply = <&vcc5v0_sys>; 261 vcc11-supply = <&vcc5v0_sys>; 262 vcc12-supply = <&vcc3v3_sys>; 263 vddio-supply = <&vcca_1v8>; 264 265 regulators { 266 vdd_center: DCDC_REG1 { 267 regulator-name = "vdd_center"; 268 regulator-always-on; 269 regulator-boot-on; 270 regulator-min-microvolt = <750000>; 271 regulator-max-microvolt = <1350000>; 272 regulator-ramp-delay = <6001>; 273 regulator-state-mem { 274 regulator-off-in-suspend; 275 }; 276 }; 277 278 vdd_cpu_l: DCDC_REG2 { 279 regulator-name = "vdd_cpu_l"; 280 regulator-always-on; 281 regulator-boot-on; 282 regulator-min-microvolt = <750000>; 283 regulator-max-microvolt = <1350000>; 284 regulator-ramp-delay = <6001>; 285 regulator-state-mem { 286 regulator-off-in-suspend; 287 }; 288 }; 289 290 vcc_ddr: DCDC_REG3 { 291 regulator-name = "vcc_ddr"; 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-state-mem { 295 regulator-on-in-suspend; 296 }; 297 }; 298 299 vcc_1v8: DCDC_REG4 { 300 regulator-name = "vcc_1v8"; 301 regulator-always-on; 302 regulator-boot-on; 303 regulator-min-microvolt = <1800000>; 304 regulator-max-microvolt = <1800000>; 305 regulator-state-mem { 306 regulator-on-in-suspend; 307 regulator-suspend-microvolt = <1800000>; 308 }; 309 }; 310 311 vcc1v8_dvp: LDO_REG1 { 312 regulator-name = "vcc1v8_dvp"; 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-min-microvolt = <1800000>; 316 regulator-max-microvolt = <1800000>; 317 regulator-state-mem { 318 regulator-off-in-suspend; 319 }; 320 }; 321 322 vcc3v0_touch: LDO_REG2 { 323 regulator-name = "vcc3v0_touch"; 324 regulator-always-on; 325 regulator-boot-on; 326 regulator-min-microvolt = <3000000>; 327 regulator-max-microvolt = <3000000>; 328 regulator-state-mem { 329 regulator-off-in-suspend; 330 }; 331 }; 332 333 vcca_1v8: LDO_REG3 { 334 regulator-name = "vcca_1v8"; 335 regulator-always-on; 336 regulator-boot-on; 337 regulator-min-microvolt = <1800000>; 338 regulator-max-microvolt = <1800000>; 339 regulator-state-mem { 340 regulator-on-in-suspend; 341 regulator-suspend-microvolt = <1800000>; 342 }; 343 }; 344 345 vcc_sdio: LDO_REG4 { 346 regulator-name = "vcc_sdio"; 347 regulator-always-on; 348 regulator-boot-on; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <3000000>; 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 regulator-suspend-microvolt = <3000000>; 354 }; 355 }; 356 357 vcca3v0_codec: LDO_REG5 { 358 regulator-name = "vcca3v0_codec"; 359 regulator-always-on; 360 regulator-boot-on; 361 regulator-min-microvolt = <3000000>; 362 regulator-max-microvolt = <3000000>; 363 regulator-state-mem { 364 regulator-off-in-suspend; 365 }; 366 }; 367 368 vcc_1v5: LDO_REG6 { 369 regulator-name = "vcc_1v5"; 370 regulator-always-on; 371 regulator-boot-on; 372 regulator-min-microvolt = <1500000>; 373 regulator-max-microvolt = <1500000>; 374 regulator-state-mem { 375 regulator-on-in-suspend; 376 regulator-suspend-microvolt = <1500000>; 377 }; 378 }; 379 380 vcca1v8_codec: LDO_REG7 { 381 regulator-name = "vcca1v8_codec"; 382 regulator-always-on; 383 regulator-boot-on; 384 regulator-min-microvolt = <1800000>; 385 regulator-max-microvolt = <1800000>; 386 regulator-state-mem { 387 regulator-off-in-suspend; 388 }; 389 }; 390 391 vcc_3v0: LDO_REG8 { 392 regulator-name = "vcc_3v0"; 393 regulator-always-on; 394 regulator-boot-on; 395 regulator-min-microvolt = <3000000>; 396 regulator-max-microvolt = <3000000>; 397 regulator-state-mem { 398 regulator-on-in-suspend; 399 regulator-suspend-microvolt = <3000000>; 400 }; 401 }; 402 403 vcc3v3_s3: vcc_lan: SWITCH_REG1 { 404 regulator-name = "vcc3v3_s3"; 405 regulator-always-on; 406 regulator-boot-on; 407 regulator-state-mem { 408 regulator-off-in-suspend; 409 }; 410 }; 411 412 vcc3v3_s0: SWITCH_REG2 { 413 regulator-name = "vcc3v3_s0"; 414 regulator-always-on; 415 regulator-boot-on; 416 regulator-state-mem { 417 regulator-off-in-suspend; 418 }; 419 }; 420 }; 421 }; 422 423 vdd_cpu_b: regulator@40 { 424 compatible = "silergy,syr827"; 425 reg = <0x40>; 426 fcs,suspend-voltage-selector = <1>; 427 pinctrl-names = "default"; 428 pinctrl-0 = <&vsel1_gpio>; 429 regulator-name = "vdd_cpu_b"; 430 regulator-min-microvolt = <712500>; 431 regulator-max-microvolt = <1500000>; 432 regulator-ramp-delay = <1000>; 433 regulator-always-on; 434 regulator-boot-on; 435 vin-supply = <&vcc5v0_sys>; 436 437 regulator-state-mem { 438 regulator-off-in-suspend; 439 }; 440 }; 441 442 vdd_gpu: regulator@41 { 443 compatible = "silergy,syr828"; 444 reg = <0x41>; 445 fcs,suspend-voltage-selector = <1>; 446 pinctrl-names = "default"; 447 pinctrl-0 = <&vsel2_gpio>; 448 regulator-name = "vdd_gpu"; 449 regulator-min-microvolt = <712500>; 450 regulator-max-microvolt = <1500000>; 451 regulator-ramp-delay = <1000>; 452 regulator-always-on; 453 regulator-boot-on; 454 vin-supply = <&vcc5v0_sys>; 455 456 regulator-state-mem { 457 regulator-off-in-suspend; 458 }; 459 }; 460}; 461 462&i2c1 { 463 i2c-scl-rising-time-ns = <300>; 464 i2c-scl-falling-time-ns = <15>; 465 status = "okay"; 466}; 467 468&i2c3 { 469 i2c-scl-rising-time-ns = <450>; 470 i2c-scl-falling-time-ns = <15>; 471 status = "okay"; 472}; 473 474&i2c4 { 475 i2c-scl-rising-time-ns = <600>; 476 i2c-scl-falling-time-ns = <20>; 477 status = "okay"; 478 479 fusb0: typec-portc@22 { 480 compatible = "fcs,fusb302"; 481 reg = <0x22>; 482 interrupt-parent = <&gpio1>; 483 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 484 pinctrl-names = "default"; 485 pinctrl-0 = <&fusb0_int>; 486 vbus-supply = <&vcc5v0_typec>; 487 status = "okay"; 488 }; 489}; 490 491&i2s0 { 492 rockchip,playback-channels = <8>; 493 rockchip,capture-channels = <8>; 494 status = "okay"; 495}; 496 497&i2s1 { 498 rockchip,playback-channels = <2>; 499 rockchip,capture-channels = <2>; 500 status = "okay"; 501}; 502 503&i2s2 { 504 status = "okay"; 505}; 506 507&io_domains { 508 status = "okay"; 509 510 bt656-supply = <&vcc1v8_dvp>; 511 audio-supply = <&vcc_3v0>; 512 sdmmc-supply = <&vcc_sdio>; 513 gpio1830-supply = <&vcc_3v0>; 514}; 515 516&pmu_io_domains { 517 pmu1830-supply = <&vcc_3v0>; 518 status = "okay"; 519}; 520 521&pinctrl { 522 buttons { 523 pwrbtn: pwrbtn { 524 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 525 }; 526 }; 527 528 fusb302x { 529 fusb0_int: fusb0-int { 530 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 531 }; 532 }; 533 534 leds { 535 work_led_gpio: work_led-gpio { 536 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 537 }; 538 539 diy_led_gpio: diy_led-gpio { 540 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 541 }; 542 }; 543 544 pcie { 545 pcie_pwr_en: pcie-pwr-en { 546 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 547 }; 548 }; 549 550 pmic { 551 pmic_int_l: pmic-int-l { 552 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 553 }; 554 555 vsel1_gpio: vsel1-gpio { 556 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 557 }; 558 559 vsel2_gpio: vsel2-gpio { 560 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 561 }; 562 }; 563 564 sdio-pwrseq { 565 wifi_enable_h: wifi-enable-h { 566 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 567 }; 568 }; 569 570 usb-typec { 571 vcc5v0_typec_en: vcc5v0_typec_en { 572 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 573 }; 574 }; 575 576 usb2 { 577 vcc5v0_host_en: vcc5v0-host-en { 578 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 579 }; 580 }; 581}; 582 583&pwm0 { 584 status = "okay"; 585}; 586 587&pwm2 { 588 status = "okay"; 589}; 590 591&saradc { 592 vref-supply = <&vcca1v8_s3>; 593 status = "okay"; 594}; 595 596&sdmmc { 597 bus-width = <4>; 598 cap-mmc-highspeed; 599 cap-sd-highspeed; 600 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 601 disable-wp; 602 max-frequency = <150000000>; 603 pinctrl-names = "default"; 604 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; 605 status = "okay"; 606}; 607 608&sdhci { 609 bus-width = <8>; 610 mmc-hs400-1_8v; 611 mmc-hs400-enhanced-strobe; 612 non-removable; 613 status = "okay"; 614}; 615 616&tcphy0 { 617 status = "okay"; 618}; 619 620&tcphy1 { 621 status = "okay"; 622}; 623 624&tsadc { 625 /* tshut mode 0:CRU 1:GPIO */ 626 rockchip,hw-tshut-mode = <1>; 627 /* tshut polarity 0:LOW 1:HIGH */ 628 rockchip,hw-tshut-polarity = <1>; 629 status = "okay"; 630}; 631 632&u2phy0 { 633 status = "okay"; 634 635 u2phy0_otg: otg-port { 636 status = "okay"; 637 }; 638 639 u2phy0_host: host-port { 640 phy-supply = <&vcc5v0_host>; 641 status = "okay"; 642 }; 643}; 644 645&u2phy1 { 646 status = "okay"; 647 648 u2phy1_otg: otg-port { 649 status = "okay"; 650 }; 651 652 u2phy1_host: host-port { 653 phy-supply = <&vcc5v0_host>; 654 status = "okay"; 655 }; 656}; 657 658&uart0 { 659 pinctrl-names = "default"; 660 pinctrl-0 = <&uart0_xfer &uart0_cts>; 661 status = "okay"; 662}; 663 664&uart2 { 665 status = "okay"; 666}; 667 668&usb_host0_ehci { 669 status = "okay"; 670}; 671 672&usb_host0_ohci { 673 status = "okay"; 674}; 675 676&usb_host1_ehci { 677 status = "okay"; 678}; 679 680&usb_host1_ohci { 681 status = "okay"; 682}; 683 684&usbdrd3_0 { 685 status = "okay"; 686}; 687 688&usbdrd_dwc3_0 { 689 status = "okay"; 690 dr_mode = "otg"; 691}; 692 693&usbdrd3_1 { 694 status = "okay"; 695}; 696 697&usbdrd_dwc3_1 { 698 status = "okay"; 699 dr_mode = "host"; 700}; 701 702&vopb { 703 status = "okay"; 704}; 705 706&vopb_mmu { 707 status = "okay"; 708}; 709 710&vopl { 711 status = "okay"; 712}; 713 714&vopl_mmu { 715 status = "okay"; 716}; 717