1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Author: Frank Wunderlich <frank-w@public-files.de> 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include "rk3568.dtsi" 13 14/ { 15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; 16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; 17 18 aliases { 19 ethernet0 = &gmac0; 20 ethernet1 = &gmac1; 21 mmc0 = &sdmmc0; 22 mmc1 = &sdhci; 23 }; 24 25 chosen: chosen { 26 stdout-path = "serial2:1500000n8"; 27 }; 28 29 leds { 30 compatible = "gpio-leds"; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&blue_led_pin &green_led_pin>; 33 34 blue_led: led-0 { 35 color = <LED_COLOR_ID_BLUE>; 36 default-state = "off"; 37 function = LED_FUNCTION_STATUS; 38 gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; 39 }; 40 41 green_led: led-1 { 42 color = <LED_COLOR_ID_GREEN>; 43 default-state = "on"; 44 function = LED_FUNCTION_POWER; 45 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 46 }; 47 }; 48 49 dc_12v: dc-12v-regulator { 50 compatible = "regulator-fixed"; 51 regulator-name = "dc_12v"; 52 regulator-always-on; 53 regulator-boot-on; 54 regulator-min-microvolt = <12000000>; 55 regulator-max-microvolt = <12000000>; 56 }; 57 58 hdmi-con { 59 compatible = "hdmi-connector"; 60 type = "a"; 61 62 port { 63 hdmi_con_in: endpoint { 64 remote-endpoint = <&hdmi_out_con>; 65 }; 66 }; 67 }; 68 69 vcc3v3_sys: vcc3v3-sys-regulator { 70 compatible = "regulator-fixed"; 71 regulator-name = "vcc3v3_sys"; 72 regulator-always-on; 73 regulator-boot-on; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 vin-supply = <&dc_12v>; 77 }; 78 79 vcc5v0_sys: vcc5v0-sys-regulator { 80 compatible = "regulator-fixed"; 81 regulator-name = "vcc5v0_sys"; 82 regulator-always-on; 83 regulator-boot-on; 84 regulator-min-microvolt = <5000000>; 85 regulator-max-microvolt = <5000000>; 86 vin-supply = <&dc_12v>; 87 }; 88 89 pcie30_avdd0v9: pcie30-avdd0v9-regulator { 90 compatible = "regulator-fixed"; 91 regulator-name = "pcie30_avdd0v9"; 92 regulator-always-on; 93 regulator-boot-on; 94 regulator-min-microvolt = <900000>; 95 regulator-max-microvolt = <900000>; 96 vin-supply = <&vcc3v3_sys>; 97 }; 98 99 pcie30_avdd1v8: pcie30-avdd1v8-regulator { 100 compatible = "regulator-fixed"; 101 regulator-name = "pcie30_avdd1v8"; 102 regulator-always-on; 103 regulator-boot-on; 104 regulator-min-microvolt = <1800000>; 105 regulator-max-microvolt = <1800000>; 106 vin-supply = <&vcc3v3_sys>; 107 }; 108 109 /* pi6c pcie clock generator feeds both ports */ 110 vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator { 111 compatible = "regulator-fixed"; 112 regulator-name = "vcc3v3_pcie"; 113 regulator-min-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>; 115 enable-active-high; 116 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 117 startup-delay-us = <200000>; 118 vin-supply = <&vcc5v0_sys>; 119 }; 120 121 /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ 122 vcc3v3_minipcie: vcc3v3-minipcie-regulator { 123 compatible = "regulator-fixed"; 124 regulator-name = "vcc3v3_minipcie"; 125 regulator-min-microvolt = <3300000>; 126 regulator-max-microvolt = <3300000>; 127 enable-active-high; 128 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&minipcie_enable_h>; 131 startup-delay-us = <50000>; 132 vin-supply = <&vcc3v3_pi6c_05>; 133 }; 134 135 /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ 136 vcc3v3_ngff: vcc3v3-ngff-regulator { 137 compatible = "regulator-fixed"; 138 regulator-name = "vcc3v3_ngff"; 139 regulator-min-microvolt = <3300000>; 140 regulator-max-microvolt = <3300000>; 141 enable-active-high; 142 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 143 pinctrl-names = "default"; 144 pinctrl-0 = <&ngffpcie_enable_h>; 145 startup-delay-us = <50000>; 146 vin-supply = <&vcc3v3_pi6c_05>; 147 }; 148 149 vcc5v0_usb: vcc5v0-usb-regulator { 150 compatible = "regulator-fixed"; 151 regulator-name = "vcc5v0_usb"; 152 regulator-always-on; 153 regulator-boot-on; 154 regulator-min-microvolt = <5000000>; 155 regulator-max-microvolt = <5000000>; 156 vin-supply = <&dc_12v>; 157 }; 158 159 vcc5v0_usb_host: vcc5v0-usb-host-regulator { 160 compatible = "regulator-fixed"; 161 enable-active-high; 162 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 163 pinctrl-names = "default"; 164 pinctrl-0 = <&vcc5v0_usb_host_en>; 165 regulator-name = "vcc5v0_usb_host"; 166 regulator-min-microvolt = <5000000>; 167 regulator-max-microvolt = <5000000>; 168 vin-supply = <&vcc5v0_usb>; 169 }; 170 171 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 172 compatible = "regulator-fixed"; 173 enable-active-high; 174 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&vcc5v0_usb_otg_en>; 177 regulator-name = "vcc5v0_usb_otg"; 178 regulator-min-microvolt = <5000000>; 179 regulator-max-microvolt = <5000000>; 180 vin-supply = <&vcc5v0_usb>; 181 }; 182}; 183 184&combphy0 { 185 /* used for USB3 */ 186 status = "okay"; 187}; 188 189&combphy1 { 190 /* used for USB3 */ 191 status = "okay"; 192}; 193 194&combphy2 { 195 /* used for SATA */ 196 status = "okay"; 197}; 198 199&gmac0 { 200 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 201 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; 202 clock_in_out = "input"; 203 phy-mode = "rgmii"; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&gmac0_miim 206 &gmac0_tx_bus2 207 &gmac0_rx_bus2 208 &gmac0_rgmii_clk 209 &gmac0_rgmii_bus>; 210 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 211 snps,reset-active-low; 212 /* Reset time is 20ms, 100ms for rtl8211f */ 213 snps,reset-delays-us = <0 20000 100000>; 214 tx_delay = <0x4f>; 215 rx_delay = <0x0f>; 216 status = "okay"; 217 218 fixed-link { 219 speed = <1000>; 220 full-duplex; 221 pause; 222 }; 223}; 224 225&gmac1 { 226 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 227 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; 228 clock_in_out = "output"; 229 phy-handle = <&rgmii_phy1>; 230 phy-mode = "rgmii"; 231 pinctrl-names = "default"; 232 pinctrl-0 = <&gmac1m1_miim 233 &gmac1m1_tx_bus2 234 &gmac1m1_rx_bus2 235 &gmac1m1_rgmii_clk 236 &gmac1m1_rgmii_bus>; 237 238 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 239 snps,reset-active-low; 240 /* Reset time is 20ms, 100ms for rtl8211f */ 241 snps,reset-delays-us = <0 20000 100000>; 242 243 tx_delay = <0x3c>; 244 rx_delay = <0x2f>; 245 246 status = "okay"; 247}; 248 249&gpu { 250 mali-supply = <&vdd_gpu>; 251 status = "okay"; 252}; 253 254&hdmi { 255 avdd-0v9-supply = <&vdda0v9_image>; 256 avdd-1v8-supply = <&vcca1v8_image>; 257 status = "okay"; 258}; 259 260&hdmi_in { 261 hdmi_in_vp0: endpoint { 262 remote-endpoint = <&vp0_out_hdmi>; 263 }; 264}; 265 266&hdmi_out { 267 hdmi_out_con: endpoint { 268 remote-endpoint = <&hdmi_con_in>; 269 }; 270}; 271 272&hdmi_sound { 273 status = "okay"; 274}; 275 276&i2c0 { 277 status = "okay"; 278 279 rk809: pmic@20 { 280 compatible = "rockchip,rk809"; 281 reg = <0x20>; 282 interrupt-parent = <&gpio0>; 283 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 284 #clock-cells = <1>; 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pmic_int>; 287 rockchip,system-power-controller; 288 vcc1-supply = <&vcc3v3_sys>; 289 vcc2-supply = <&vcc3v3_sys>; 290 vcc3-supply = <&vcc3v3_sys>; 291 vcc4-supply = <&vcc3v3_sys>; 292 vcc5-supply = <&vcc3v3_sys>; 293 vcc6-supply = <&vcc3v3_sys>; 294 vcc7-supply = <&vcc3v3_sys>; 295 vcc8-supply = <&vcc3v3_sys>; 296 vcc9-supply = <&vcc3v3_sys>; 297 wakeup-source; 298 299 regulators { 300 vdd_logic: DCDC_REG1 { 301 regulator-name = "vdd_logic"; 302 regulator-always-on; 303 regulator-boot-on; 304 regulator-init-microvolt = <900000>; 305 regulator-initial-mode = <0x2>; 306 regulator-min-microvolt = <500000>; 307 regulator-max-microvolt = <1350000>; 308 regulator-ramp-delay = <6001>; 309 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 315 vdd_gpu: DCDC_REG2 { 316 regulator-name = "vdd_gpu"; 317 regulator-always-on; 318 regulator-init-microvolt = <900000>; 319 regulator-initial-mode = <0x2>; 320 regulator-min-microvolt = <500000>; 321 regulator-max-microvolt = <1350000>; 322 regulator-ramp-delay = <6001>; 323 324 regulator-state-mem { 325 regulator-off-in-suspend; 326 }; 327 }; 328 329 vcc_ddr: DCDC_REG3 { 330 regulator-name = "vcc_ddr"; 331 regulator-always-on; 332 regulator-boot-on; 333 regulator-initial-mode = <0x2>; 334 335 regulator-state-mem { 336 regulator-on-in-suspend; 337 }; 338 }; 339 340 vdd_npu: DCDC_REG4 { 341 regulator-name = "vdd_npu"; 342 regulator-init-microvolt = <900000>; 343 regulator-initial-mode = <0x2>; 344 regulator-min-microvolt = <500000>; 345 regulator-max-microvolt = <1350000>; 346 regulator-ramp-delay = <6001>; 347 348 regulator-state-mem { 349 regulator-off-in-suspend; 350 }; 351 }; 352 353 vcc_1v8: DCDC_REG5 { 354 regulator-name = "vcc_1v8"; 355 regulator-always-on; 356 regulator-boot-on; 357 regulator-min-microvolt = <1800000>; 358 regulator-max-microvolt = <1800000>; 359 360 regulator-state-mem { 361 regulator-off-in-suspend; 362 }; 363 }; 364 365 vdda0v9_image: LDO_REG1 { 366 regulator-name = "vdda0v9_image"; 367 regulator-always-on; 368 regulator-min-microvolt = <900000>; 369 regulator-max-microvolt = <900000>; 370 371 regulator-state-mem { 372 regulator-off-in-suspend; 373 }; 374 }; 375 376 vdda_0v9: LDO_REG2 { 377 regulator-name = "vdda_0v9"; 378 regulator-always-on; 379 regulator-boot-on; 380 regulator-min-microvolt = <900000>; 381 regulator-max-microvolt = <900000>; 382 383 regulator-state-mem { 384 regulator-off-in-suspend; 385 }; 386 }; 387 388 vdda0v9_pmu: LDO_REG3 { 389 regulator-name = "vdda0v9_pmu"; 390 regulator-always-on; 391 regulator-boot-on; 392 regulator-min-microvolt = <900000>; 393 regulator-max-microvolt = <900000>; 394 395 regulator-state-mem { 396 regulator-on-in-suspend; 397 regulator-suspend-microvolt = <900000>; 398 }; 399 }; 400 401 vccio_acodec: LDO_REG4 { 402 regulator-name = "vccio_acodec"; 403 regulator-always-on; 404 regulator-boot-on; 405 regulator-min-microvolt = <3300000>; 406 regulator-max-microvolt = <3300000>; 407 408 regulator-state-mem { 409 regulator-off-in-suspend; 410 }; 411 }; 412 413 vccio_sd: LDO_REG5 { 414 regulator-name = "vccio_sd"; 415 regulator-min-microvolt = <1800000>; 416 regulator-max-microvolt = <3300000>; 417 418 regulator-state-mem { 419 regulator-off-in-suspend; 420 }; 421 }; 422 423 vcc3v3_pmu: LDO_REG6 { 424 regulator-name = "vcc3v3_pmu"; 425 regulator-always-on; 426 regulator-boot-on; 427 regulator-min-microvolt = <3300000>; 428 regulator-max-microvolt = <3300000>; 429 430 regulator-state-mem { 431 regulator-on-in-suspend; 432 regulator-suspend-microvolt = <3300000>; 433 }; 434 }; 435 436 vcca_1v8: LDO_REG7 { 437 regulator-name = "vcca_1v8"; 438 regulator-always-on; 439 regulator-boot-on; 440 regulator-min-microvolt = <1800000>; 441 regulator-max-microvolt = <1800000>; 442 443 regulator-state-mem { 444 regulator-off-in-suspend; 445 }; 446 }; 447 448 vcca1v8_pmu: LDO_REG8 { 449 regulator-name = "vcca1v8_pmu"; 450 regulator-always-on; 451 regulator-boot-on; 452 regulator-min-microvolt = <1800000>; 453 regulator-max-microvolt = <1800000>; 454 455 regulator-state-mem { 456 regulator-on-in-suspend; 457 regulator-suspend-microvolt = <1800000>; 458 }; 459 }; 460 461 vcca1v8_image: LDO_REG9 { 462 regulator-name = "vcca1v8_image"; 463 regulator-always-on; 464 regulator-min-microvolt = <1800000>; 465 regulator-max-microvolt = <1800000>; 466 467 regulator-state-mem { 468 regulator-off-in-suspend; 469 }; 470 }; 471 472 vcc_3v3: SWITCH_REG1 { 473 regulator-name = "vcc_3v3"; 474 regulator-always-on; 475 regulator-boot-on; 476 477 regulator-state-mem { 478 regulator-off-in-suspend; 479 }; 480 }; 481 482 vcc3v3_sd: SWITCH_REG2 { 483 regulator-name = "vcc3v3_sd"; 484 regulator-always-on; 485 486 regulator-state-mem { 487 regulator-off-in-suspend; 488 }; 489 }; 490 }; 491 }; 492}; 493 494&i2c3 { 495 status = "okay"; 496 497 hym8563: rtc@51 { 498 compatible = "haoyu,hym8563"; 499 reg = <0x51>; 500 interrupt-parent = <&gpio0>; 501 interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>; 502 #clock-cells = <0>; 503 clock-output-names = "rtcic_32kout"; 504 pinctrl-names = "default"; 505 pinctrl-0 = <&hym8563_int>; 506 wakeup-source; 507 }; 508}; 509 510&i2c5 { 511 /* pin 3 (SDA) + 4 (SCL) of header con2 */ 512 status = "disabled"; 513}; 514 515&i2s0_8ch { 516 /* hdmi sound */ 517 status = "okay"; 518}; 519 520&mdio0 { 521 #address-cells = <1>; 522 #size-cells = <0>; 523 524 switch@0 { 525 compatible = "mediatek,mt7531"; 526 reg = <0>; 527 528 ports { 529 #address-cells = <1>; 530 #size-cells = <0>; 531 532 port@1 { 533 reg = <1>; 534 label = "lan0"; 535 }; 536 537 port@2 { 538 reg = <2>; 539 label = "lan1"; 540 }; 541 542 port@3 { 543 reg = <3>; 544 label = "lan2"; 545 }; 546 547 port@4 { 548 reg = <4>; 549 label = "lan3"; 550 }; 551 552 port@5 { 553 reg = <5>; 554 label = "cpu"; 555 ethernet = <&gmac0>; 556 phy-mode = "rgmii"; 557 558 fixed-link { 559 speed = <1000>; 560 full-duplex; 561 pause; 562 }; 563 }; 564 }; 565 }; 566}; 567 568&mdio1 { 569 rgmii_phy1: ethernet-phy@0 { 570 compatible = "ethernet-phy-ieee802.3-c22"; 571 reg = <0x0>; 572 }; 573}; 574 575&pcie30phy { 576 data-lanes = <1 2>; 577 phy-supply = <&vcc3v3_pi6c_05>; 578 status = "okay"; 579}; 580 581&pcie3x1 { 582 /* M.2 slot */ 583 num-lanes = <1>; 584 pinctrl-names = "default"; 585 pinctrl-0 = <&ngffpcie_reset_h>; 586 reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 587 vpcie3v3-supply = <&vcc3v3_ngff>; 588 status = "okay"; 589}; 590 591&pcie3x2 { 592 /* mPCIe slot */ 593 num-lanes = <1>; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&minipcie_reset_h>; 596 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 597 vpcie3v3-supply = <&vcc3v3_minipcie>; 598 status = "okay"; 599}; 600 601&pinctrl { 602 leds { 603 blue_led_pin: blue-led-pin { 604 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 605 }; 606 green_led_pin: green-led-pin { 607 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 608 }; 609 }; 610 611 hym8563 { 612 hym8563_int: hym8563-int { 613 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 614 }; 615 }; 616 617 pcie { 618 minipcie_enable_h: minipcie-enable-h { 619 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 620 }; 621 622 ngffpcie_enable_h: ngffpcie-enable-h { 623 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 624 }; 625 626 minipcie_reset_h: minipcie-reset-h { 627 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 628 }; 629 630 ngffpcie_reset_h: ngffpcie-reset-h { 631 rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; 632 }; 633 }; 634 635 pmic { 636 pmic_int: pmic_int { 637 rockchip,pins = 638 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 639 }; 640 }; 641 642 usb { 643 vcc5v0_usb_host_en: vcc5v0_usb_host_en { 644 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 645 }; 646 647 vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { 648 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 649 }; 650 }; 651}; 652 653&pmu_io_domains { 654 pmuio1-supply = <&vcc3v3_pmu>; 655 pmuio2-supply = <&vcc3v3_pmu>; 656 vccio1-supply = <&vccio_acodec>; 657 vccio3-supply = <&vccio_sd>; 658 vccio4-supply = <&vcc_3v3>; 659 vccio5-supply = <&vcc_3v3>; 660 vccio6-supply = <&vcc_1v8>; 661 vccio7-supply = <&vcc_3v3>; 662 status = "okay"; 663}; 664 665&pwm8 { 666 /* fan 5v - gnd - pwm */ 667 status = "okay"; 668}; 669 670&pwm10 { 671 /* pin 7 of header con2 */ 672 status = "disabled"; 673}; 674 675&pwm11 { 676 /* pin 15 of header con2 */ 677 status = "disabled"; 678}; 679 680&pwm12 { 681 /* pin 21 of header con2 */ 682 /* shared with uart9 + spi3 */ 683 pinctrl-0 = <&pwm12m1_pins>; 684 status = "disabled"; 685}; 686 687&pwm13 { 688 /* pin 24 of header con2 */ 689 /* shared with uart9 */ 690 pinctrl-0 = <&pwm13m1_pins>; 691 status = "disabled"; 692}; 693 694&pwm14 { 695 /* pin 23 of header con2 */ 696 /* shared with spi3 */ 697 pinctrl-0 = <&pwm14m1_pins>; 698 status = "disabled"; 699}; 700 701&pwm15 { 702 /* pin 19 of header con2 */ 703 /* shared with spi3 */ 704 pinctrl-0 = <&pwm15m1_pins>; 705 status = "disabled"; 706}; 707 708&saradc { 709 vref-supply = <&vcca_1v8>; 710 status = "okay"; 711}; 712 713&sata2 { 714 status = "okay"; 715}; 716 717&sdhci { 718 bus-width = <8>; 719 max-frequency = <200000000>; 720 non-removable; 721 pinctrl-names = "default"; 722 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 723 status = "okay"; 724}; 725 726&sdmmc0 { 727 bus-width = <4>; 728 cap-sd-highspeed; 729 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 730 disable-wp; 731 pinctrl-names = "default"; 732 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 733 sd-uhs-sdr104; 734 vmmc-supply = <&vcc3v3_sd>; 735 vqmmc-supply = <&vccio_sd>; 736 status = "okay"; 737}; 738 739&spi3 { 740 /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ 741 /* shared with pwm12/14/15 and uart9 */ 742 pinctrl-0 = <&spi3m1_pins>; 743 status = "disabled"; 744}; 745 746&tsadc { 747 rockchip,hw-tshut-mode = <1>; 748 rockchip,hw-tshut-polarity = <0>; 749 status = "okay"; 750}; 751 752&uart0 { 753 /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ 754 status = "disabled"; 755}; 756 757&uart2 { 758 /* debug-uart */ 759 status = "okay"; 760}; 761 762&uart7 { 763 /* pin 11 (TX) + 13 (RX) of header con2 */ 764 pinctrl-0 = <&uart7m1_xfer>; 765 status = "disabled"; 766}; 767 768&uart9 { 769 /* pin 21 (TX) + 24 (RX) of header con2 */ 770 /* shared with pwm13 and pwm12/spi3 */ 771 pinctrl-0 = <&uart9m1_xfer>; 772 status = "disabled"; 773}; 774 775&usb_host0_ehci { 776 status = "okay"; 777}; 778 779&usb_host0_ohci { 780 status = "okay"; 781}; 782 783&usb_host0_xhci { 784 dr_mode = "host"; 785 status = "okay"; 786}; 787 788&usb_host1_ehci { 789 status = "okay"; 790}; 791 792&usb_host1_ohci { 793 status = "okay"; 794}; 795 796&usb_host1_xhci { 797 status = "okay"; 798}; 799 800&usb2phy0 { 801 status = "okay"; 802}; 803 804&usb2phy0_host { 805 phy-supply = <&vcc5v0_usb_host>; 806 status = "okay"; 807}; 808 809&usb2phy0_otg { 810 phy-supply = <&vcc5v0_usb_otg>; 811 status = "okay"; 812}; 813 814&usb2phy1 { 815 /* USB for PCIe/M2 */ 816 status = "okay"; 817}; 818 819&usb2phy1_host { 820 status = "okay"; 821}; 822 823&usb2phy1_otg { 824 status = "okay"; 825}; 826 827&vop { 828 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 829 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 830 status = "okay"; 831}; 832 833&vop_mmu { 834 status = "okay"; 835}; 836 837&vp0 { 838 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 839 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 840 remote-endpoint = <&hdmi_in_vp0>; 841 }; 842}; 843