1*2822c791SNishanth Menon// SPDX-License-Identifier: GPL-2.0-only OR MIT
2d0a064beSNishanth Menon/*
3*2822c791SNishanth Menon * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
4d0a064beSNishanth Menon */
5d0a064beSNishanth Menon
6d0a064beSNishanth Menon/dts-v1/;
7d0a064beSNishanth Menon
8d0a064beSNishanth Menon#include "k3-am654.dtsi"
9c67f7388SKeerthy#include <dt-bindings/input/input.h>
109ba5a8a5SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
11d0a064beSNishanth Menon
12d0a064beSNishanth Menon/ {
13d0a064beSNishanth Menon	compatible = "ti,am654-evm", "ti,am654";
14d0a064beSNishanth Menon	model = "Texas Instruments AM654 Base Board";
15d0a064beSNishanth Menon
16692e8888SNishanth Menon	aliases {
17692e8888SNishanth Menon		serial0 = &wkup_uart0;
18692e8888SNishanth Menon		serial1 = &mcu_uart0;
19692e8888SNishanth Menon		serial2 = &main_uart0;
20692e8888SNishanth Menon		i2c0 = &wkup_i2c0;
21692e8888SNishanth Menon		i2c1 = &mcu_i2c0;
22692e8888SNishanth Menon		i2c2 = &main_i2c0;
23692e8888SNishanth Menon		i2c3 = &main_i2c1;
24692e8888SNishanth Menon		i2c4 = &main_i2c2;
25692e8888SNishanth Menon		ethernet0 = &cpsw_port1;
26692e8888SNishanth Menon		mmc0 = &sdhci0;
27692e8888SNishanth Menon		mmc1 = &sdhci1;
28692e8888SNishanth Menon	};
29692e8888SNishanth Menon
30d0a064beSNishanth Menon	chosen {
31d0a064beSNishanth Menon		stdout-path = "serial2:115200n8";
32d0a064beSNishanth Menon	};
33d0a064beSNishanth Menon
34d0a064beSNishanth Menon	memory@80000000 {
35d0a064beSNishanth Menon		device_type = "memory";
36d0a064beSNishanth Menon		/* 4G RAM */
37d0a064beSNishanth Menon		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
38d0a064beSNishanth Menon		      <0x00000008 0x80000000 0x00000000 0x80000000>;
39d0a064beSNishanth Menon	};
40d0a064beSNishanth Menon
41d0a064beSNishanth Menon	reserved-memory {
42d0a064beSNishanth Menon		#address-cells = <2>;
43d0a064beSNishanth Menon		#size-cells = <2>;
44d0a064beSNishanth Menon		ranges;
45954ec513SSuman Anna
46e5c956c4SNishanth Menon		secure_ddr: secure-ddr@9e800000 {
47d0a064beSNishanth Menon			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
48d0a064beSNishanth Menon			alignment = <0x1000>;
49d0a064beSNishanth Menon			no-map;
50d0a064beSNishanth Menon		};
51954ec513SSuman Anna
52954ec513SSuman Anna		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
53954ec513SSuman Anna			compatible = "shared-dma-pool";
54954ec513SSuman Anna			reg = <0 0xa0000000 0 0x100000>;
55954ec513SSuman Anna			no-map;
56954ec513SSuman Anna		};
57954ec513SSuman Anna
58954ec513SSuman Anna		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
59954ec513SSuman Anna			compatible = "shared-dma-pool";
60954ec513SSuman Anna			reg = <0 0xa0100000 0 0xf00000>;
61954ec513SSuman Anna			no-map;
62954ec513SSuman Anna		};
63954ec513SSuman Anna
64954ec513SSuman Anna		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
65954ec513SSuman Anna			compatible = "shared-dma-pool";
66954ec513SSuman Anna			reg = <0 0xa1000000 0 0x100000>;
67954ec513SSuman Anna			no-map;
68954ec513SSuman Anna		};
69954ec513SSuman Anna
70954ec513SSuman Anna		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
71954ec513SSuman Anna			compatible = "shared-dma-pool";
72954ec513SSuman Anna			reg = <0 0xa1100000 0 0xf00000>;
73954ec513SSuman Anna			no-map;
74954ec513SSuman Anna		};
75f82c5e0aSSuman Anna
76f82c5e0aSSuman Anna		rtos_ipc_memory_region: ipc-memories@a2000000 {
77f82c5e0aSSuman Anna			reg = <0x00 0xa2000000 0x00 0x00100000>;
78f82c5e0aSSuman Anna			alignment = <0x1000>;
79f82c5e0aSSuman Anna			no-map;
80f82c5e0aSSuman Anna		};
81d0a064beSNishanth Menon	};
82c67f7388SKeerthy
83c67f7388SKeerthy	gpio-keys {
84c67f7388SKeerthy		compatible = "gpio-keys";
85c67f7388SKeerthy		autorepeat;
86c67f7388SKeerthy		pinctrl-names = "default";
87c67f7388SKeerthy		pinctrl-0 = <&push_button_pins_default>;
88c67f7388SKeerthy
8985423386SKrzysztof Kozlowski		switch-5 {
90c67f7388SKeerthy			label = "GPIO Key USER1";
91c67f7388SKeerthy			linux,code = <BTN_0>;
92c67f7388SKeerthy			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
93c67f7388SKeerthy		};
94c67f7388SKeerthy
9585423386SKrzysztof Kozlowski		switch-6 {
96c67f7388SKeerthy			label = "GPIO Key USER2";
97c67f7388SKeerthy			linux,code = <BTN_1>;
98c67f7388SKeerthy			gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
99c67f7388SKeerthy		};
100c67f7388SKeerthy	};
10179b08ae7SAswath Govindraju
102ec1b5482SNishanth Menon	evm_12v0: regulator-0 {
10379b08ae7SAswath Govindraju		/* main supply */
10479b08ae7SAswath Govindraju		compatible = "regulator-fixed";
10579b08ae7SAswath Govindraju		regulator-name = "evm_12v0";
10679b08ae7SAswath Govindraju		regulator-min-microvolt = <12000000>;
10779b08ae7SAswath Govindraju		regulator-max-microvolt = <12000000>;
10879b08ae7SAswath Govindraju		regulator-always-on;
10979b08ae7SAswath Govindraju		regulator-boot-on;
11079b08ae7SAswath Govindraju	};
11179b08ae7SAswath Govindraju
112ec1b5482SNishanth Menon	vcc3v3_io: regulator-1 {
11379b08ae7SAswath Govindraju		/* Output of TPS54334 */
11479b08ae7SAswath Govindraju		compatible = "regulator-fixed";
11579b08ae7SAswath Govindraju		regulator-name = "vcc3v3_io";
11679b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
11779b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
11879b08ae7SAswath Govindraju		regulator-always-on;
11979b08ae7SAswath Govindraju		regulator-boot-on;
12079b08ae7SAswath Govindraju		vin-supply = <&evm_12v0>;
12179b08ae7SAswath Govindraju	};
12279b08ae7SAswath Govindraju
123ec1b5482SNishanth Menon	vdd_mmc1_sd: regulator-2 {
12479b08ae7SAswath Govindraju		compatible = "regulator-fixed";
12579b08ae7SAswath Govindraju		regulator-name = "vdd_mmc1_sd";
12679b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
12779b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
12879b08ae7SAswath Govindraju		regulator-boot-on;
12979b08ae7SAswath Govindraju		enable-active-high;
13079b08ae7SAswath Govindraju		vin-supply = <&vcc3v3_io>;
13179b08ae7SAswath Govindraju		gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
13279b08ae7SAswath Govindraju	};
1335292f504SNishanth Menon
1345292f504SNishanth Menon	vtt_supply: regulator-3 {
1355292f504SNishanth Menon		compatible = "regulator-fixed";
1365292f504SNishanth Menon		regulator-name = "vtt";
1375292f504SNishanth Menon		pinctrl-names = "default";
1385292f504SNishanth Menon		pinctrl-0 = <&ddr_vtt_pins_default>;
1395292f504SNishanth Menon		regulator-min-microvolt = <3300000>;
1405292f504SNishanth Menon		regulator-max-microvolt = <3300000>;
1415292f504SNishanth Menon		enable-active-high;
1425292f504SNishanth Menon		regulator-always-on;
1435292f504SNishanth Menon		regulator-boot-on;
1445292f504SNishanth Menon		vin-supply = <&vcc3v3_io>;
1455292f504SNishanth Menon		gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
1465292f504SNishanth Menon	};
147d0a064beSNishanth Menon};
1484201af25SNishanth Menon
14919a1768fSVignesh R&wkup_pmx0 {
150a4956811STony Lindgren	wkup_uart0_pins_default: wkup-uart0-default-pins {
1513ae28642SNishanth Menon		pinctrl-single,pins = <
1523ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0)	/* (AB1) WKUP_UART0_RXD */
1533ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0)	/* (AB5) WKUP_UART0_TXD */
1543ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1)	/* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
1553ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1)	/* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
1563ae28642SNishanth Menon		>;
1573ae28642SNishanth Menon	};
1583ae28642SNishanth Menon
159a4956811STony Lindgren	ddr_vtt_pins_default: ddr-vtt-default-pins {
1605292f504SNishanth Menon		pinctrl-single,pins = <
1615292f504SNishanth Menon			AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7)	/* WKUP_GPIO0_28 */
1625292f504SNishanth Menon		>;
1635292f504SNishanth Menon	};
1645292f504SNishanth Menon
165a4956811STony Lindgren	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
16619a1768fSVignesh R		pinctrl-single,pins = <
16719a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
16819a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
16919a1768fSVignesh R		>;
17019a1768fSVignesh R	};
171c67f7388SKeerthy
172a4956811STony Lindgren	push_button_pins_default: push-button-default-pins {
173c67f7388SKeerthy		pinctrl-single,pins = <
174c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
175c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
176c67f7388SKeerthy		>;
177c67f7388SKeerthy	};
17807481770SVignesh Raghavendra
179a4956811STony Lindgren	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
18007481770SVignesh Raghavendra		pinctrl-single,pins = <
18107481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
18207481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
18307481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
18407481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
18507481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
18607481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
18707481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
18807481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
18907481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
19007481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
19107481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
19207481770SVignesh Raghavendra		>;
19307481770SVignesh Raghavendra	};
194ca3be22dSVignesh Raghavendra
1957a649518SNishanth Menon	wkup_pca554_default: wkup-pca554-default-pins {
196ca3be22dSVignesh Raghavendra		pinctrl-single,pins = <
197ca3be22dSVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
1989ba5a8a5SGrygorii Strashko		>;
1999ba5a8a5SGrygorii Strashko	};
200ca3be22dSVignesh Raghavendra
201a4956811STony Lindgren	mcu_uart0_pins_default: mcu-uart0-default-pins {
2023ae28642SNishanth Menon		pinctrl-single,pins = <
2033ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4)	/* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
2043ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4)	/* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
2053ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)	/* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
2063ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4)	/* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
2073ae28642SNishanth Menon		>;
2083ae28642SNishanth Menon	};
2093ae28642SNishanth Menon
210a4956811STony Lindgren	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
2119ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
2129ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
2139ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
2149ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
2159ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
2169ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
2179ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
2189ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
2199ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
2209ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
2219ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
22269db725cSGrygorii Strashko			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
2239ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
2249ba5a8a5SGrygorii Strashko		>;
2259ba5a8a5SGrygorii Strashko	};
2269ba5a8a5SGrygorii Strashko
227a4956811STony Lindgren	mcu_mdio_pins_default: mcu-mdio1-default-pins {
2289ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
2299ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
2309ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
231ca3be22dSVignesh Raghavendra		>;
232ca3be22dSVignesh Raghavendra	};
2333ae28642SNishanth Menon
234a4956811STony Lindgren	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
2353ae28642SNishanth Menon		pinctrl-single,pins = <
2363ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT,  0) /* (AD8) MCU_I2C0_SCL */
2373ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT,  0) /* (AD7) MCU_I2C0_SDA */
2383ae28642SNishanth Menon		>;
2393ae28642SNishanth Menon	};
24019a1768fSVignesh R};
24119a1768fSVignesh R
2423f94859fSVignesh R&main_pmx0 {
243a4956811STony Lindgren	main_uart0_pins_default: main-uart0-default-pins {
2443f94859fSVignesh R		pinctrl-single,pins = <
2453f94859fSVignesh R			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
2463f94859fSVignesh R			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
2473f94859fSVignesh R			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
2483f94859fSVignesh R			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
2493f94859fSVignesh R		>;
2503f94859fSVignesh R	};
25119a1768fSVignesh R
252a4956811STony Lindgren	main_i2c2_pins_default: main-i2c2-default-pins {
25319a1768fSVignesh R		pinctrl-single,pins = <
25419a1768fSVignesh R			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
25519a1768fSVignesh R			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
25619a1768fSVignesh R		>;
25719a1768fSVignesh R	};
2585da94b50SVignesh R
259a4956811STony Lindgren	main_spi0_pins_default: main-spi0-default-pins {
2605da94b50SVignesh R		pinctrl-single,pins = <
2615da94b50SVignesh R			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
2625da94b50SVignesh R			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
2635da94b50SVignesh R			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
2645da94b50SVignesh R			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
2655da94b50SVignesh R		>;
2665da94b50SVignesh R	};
267fd58466aSFaiz Abbas
268a4956811STony Lindgren	main_mmc0_pins_default: main-mmc0-default-pins {
269fd58466aSFaiz Abbas		pinctrl-single,pins = <
270fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
271fd58466aSFaiz Abbas			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
272fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
273fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
274fd58466aSFaiz Abbas			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
275fd58466aSFaiz Abbas			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
276fd58466aSFaiz Abbas			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
277fd58466aSFaiz Abbas			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
278fd58466aSFaiz Abbas			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
279fd58466aSFaiz Abbas			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
280fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
281fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
282fd58466aSFaiz Abbas		>;
283fd58466aSFaiz Abbas	};
2847e7e7dd5SRoger Quadros
285a4956811STony Lindgren	main_mmc1_pins_default: main-mmc1-default-pins {
28613f74fc6SFaiz Abbas		pinctrl-single,pins = <
28713f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
28813f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
28913f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
29013f74fc6SFaiz Abbas			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
29113f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
29213f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
29313f74fc6SFaiz Abbas			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
29413f74fc6SFaiz Abbas			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
29513f74fc6SFaiz Abbas		>;
29613f74fc6SFaiz Abbas	};
29713f74fc6SFaiz Abbas
298a4956811STony Lindgren	usb1_pins_default: usb1-default-pins {
2997e7e7dd5SRoger Quadros		pinctrl-single,pins = <
3007e7e7dd5SRoger Quadros			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
3017e7e7dd5SRoger Quadros		>;
3027e7e7dd5SRoger Quadros	};
30319a1768fSVignesh R};
30419a1768fSVignesh R
30519a1768fSVignesh R&main_pmx1 {
306a4956811STony Lindgren	main_i2c0_pins_default: main-i2c0-default-pins {
30719a1768fSVignesh R		pinctrl-single,pins = <
30819a1768fSVignesh R			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
30919a1768fSVignesh R			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
31019a1768fSVignesh R		>;
31119a1768fSVignesh R	};
31219a1768fSVignesh R
313a4956811STony Lindgren	main_i2c1_pins_default: main-i2c1-default-pins {
31419a1768fSVignesh R		pinctrl-single,pins = <
31519a1768fSVignesh R			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
31619a1768fSVignesh R			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
31719a1768fSVignesh R		>;
31819a1768fSVignesh R	};
319e577d794SVignesh R
320a4956811STony Lindgren	ecap0_pins_default: ecap0-default-pins {
321e577d794SVignesh R		pinctrl-single,pins = <
322e577d794SVignesh R			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
323e577d794SVignesh R		>;
324e577d794SVignesh R	};
3253f94859fSVignesh R};
3263f94859fSVignesh R
3274201af25SNishanth Menon&wkup_uart0 {
3284201af25SNishanth Menon	/* Wakeup UART is used by System firmware */
3294cc34aa8SNishanth Menon	status = "reserved";
3303ae28642SNishanth Menon	pinctrl-names = "default";
3313ae28642SNishanth Menon	pinctrl-0 = <&wkup_uart0_pins_default>;
3324201af25SNishanth Menon};
3333f94859fSVignesh R
33465e8781aSAndrew Davis&mcu_uart0 {
33565e8781aSAndrew Davis	status = "okay";
3363ae28642SNishanth Menon	pinctrl-names = "default";
3373ae28642SNishanth Menon	pinctrl-0 = <&mcu_uart0_pins_default>;
33865e8781aSAndrew Davis};
33965e8781aSAndrew Davis
3403f94859fSVignesh R&main_uart0 {
34165e8781aSAndrew Davis	status = "okay";
3423f94859fSVignesh R	pinctrl-names = "default";
3433f94859fSVignesh R	pinctrl-0 = <&main_uart0_pins_default>;
344c68272cbSLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
3453f94859fSVignesh R};
34619a1768fSVignesh R
34719a1768fSVignesh R&wkup_i2c0 {
348c0a5ba87SAndrew Davis	status = "okay";
34919a1768fSVignesh R	pinctrl-names = "default";
35019a1768fSVignesh R	pinctrl-0 = <&wkup_i2c0_pins_default>;
35119a1768fSVignesh R	clock-frequency = <400000>;
35219a1768fSVignesh R
353895e2f4fSNishanth Menon	eeprom@50 {
354895e2f4fSNishanth Menon		/* AT24CM01 */
355895e2f4fSNishanth Menon		compatible = "atmel,24c1024";
356895e2f4fSNishanth Menon		reg = <0x50>;
357895e2f4fSNishanth Menon	};
358895e2f4fSNishanth Menon
359282621edSNishanth Menon	vdd_mpu: regulator@60 {
360282621edSNishanth Menon		compatible = "ti,tps62363";
361282621edSNishanth Menon		reg = <0x60>;
362282621edSNishanth Menon		regulator-name = "VDD_MPU";
363282621edSNishanth Menon		regulator-min-microvolt = <500000>;
364282621edSNishanth Menon		regulator-max-microvolt = <1770000>;
365282621edSNishanth Menon		regulator-always-on;
366282621edSNishanth Menon		regulator-boot-on;
367282621edSNishanth Menon		ti,vsel0-state-high;
368282621edSNishanth Menon		ti,vsel1-state-high;
369282621edSNishanth Menon		ti,enable-vout-discharge;
370282621edSNishanth Menon	};
371282621edSNishanth Menon
3722f40c6dfSRavi Gunasekaran	gpio@38 {
3732f40c6dfSRavi Gunasekaran		compatible = "nxp,pca9554";
3742f40c6dfSRavi Gunasekaran		reg = <0x38>;
3752f40c6dfSRavi Gunasekaran		gpio-controller;
3762f40c6dfSRavi Gunasekaran		#gpio-cells = <2>;
3772f40c6dfSRavi Gunasekaran	};
3782f40c6dfSRavi Gunasekaran
37919a1768fSVignesh R	pca9554: gpio@39 {
38019a1768fSVignesh R		compatible = "nxp,pca9554";
38119a1768fSVignesh R		reg = <0x39>;
38219a1768fSVignesh R		gpio-controller;
38319a1768fSVignesh R		#gpio-cells = <2>;
384ca3be22dSVignesh Raghavendra		pinctrl-names = "default";
385ca3be22dSVignesh Raghavendra		pinctrl-0 = <&wkup_pca554_default>;
386ca3be22dSVignesh Raghavendra		interrupt-parent = <&wkup_gpio0>;
387ca3be22dSVignesh Raghavendra		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
388ca3be22dSVignesh Raghavendra		interrupt-controller;
389ca3be22dSVignesh Raghavendra		#interrupt-cells = <2>;
39019a1768fSVignesh R	};
39119a1768fSVignesh R};
39219a1768fSVignesh R
393c0a5ba87SAndrew Davis&mcu_i2c0 {
394c0a5ba87SAndrew Davis	status = "okay";
3953ae28642SNishanth Menon	pinctrl-names = "default";
3963ae28642SNishanth Menon	pinctrl-0 = <&mcu_i2c0_pins_default>;
3973ae28642SNishanth Menon	clock-frequency = <400000>;
398c0a5ba87SAndrew Davis};
399c0a5ba87SAndrew Davis
40019a1768fSVignesh R&main_i2c0 {
401c0a5ba87SAndrew Davis	status = "okay";
40219a1768fSVignesh R	pinctrl-names = "default";
40319a1768fSVignesh R	pinctrl-0 = <&main_i2c0_pins_default>;
40419a1768fSVignesh R	clock-frequency = <400000>;
40519a1768fSVignesh R
40619a1768fSVignesh R	pca9555: gpio@21 {
40719a1768fSVignesh R		compatible = "nxp,pca9555";
40819a1768fSVignesh R		reg = <0x21>;
40919a1768fSVignesh R		gpio-controller;
41019a1768fSVignesh R		#gpio-cells = <2>;
41119a1768fSVignesh R	};
41219a1768fSVignesh R};
41319a1768fSVignesh R
41419a1768fSVignesh R&main_i2c1 {
415c0a5ba87SAndrew Davis	status = "okay";
41619a1768fSVignesh R	pinctrl-names = "default";
41719a1768fSVignesh R	pinctrl-0 = <&main_i2c1_pins_default>;
41819a1768fSVignesh R	clock-frequency = <400000>;
41919a1768fSVignesh R};
42019a1768fSVignesh R
42119a1768fSVignesh R&main_i2c2 {
422c0a5ba87SAndrew Davis	status = "okay";
42319a1768fSVignesh R	pinctrl-names = "default";
42419a1768fSVignesh R	pinctrl-0 = <&main_i2c2_pins_default>;
42519a1768fSVignesh R	clock-frequency = <400000>;
42619a1768fSVignesh R};
427e577d794SVignesh R
428e577d794SVignesh R&ecap0 {
429c1d1189eSAndrew Davis	status = "okay";
430e577d794SVignesh R	pinctrl-names = "default";
431e577d794SVignesh R	pinctrl-0 = <&ecap0_pins_default>;
432e577d794SVignesh R};
4335da94b50SVignesh R
4345da94b50SVignesh R&main_spi0 {
4351c49cbb1SAndrew Davis	status = "okay";
4365da94b50SVignesh R	pinctrl-names = "default";
4375da94b50SVignesh R	pinctrl-0 = <&main_spi0_pins_default>;
4385da94b50SVignesh R	#address-cells = <1>;
4395da94b50SVignesh R	#size-cells = <0>;
4404f76ea7bSAswath Govindraju	ti,pindir-d0-out-d1-in;
4415da94b50SVignesh R
4425da94b50SVignesh R	flash@0 {
4435da94b50SVignesh R		compatible = "jedec,spi-nor";
4445da94b50SVignesh R		reg = <0x0>;
4455da94b50SVignesh R		spi-tx-bus-width = <1>;
4465da94b50SVignesh R		spi-rx-bus-width = <1>;
4475da94b50SVignesh R		spi-max-frequency = <48000000>;
4485da94b50SVignesh R	};
4495da94b50SVignesh R};
450fd58466aSFaiz Abbas
451fd58466aSFaiz Abbas&sdhci0 {
452006d9351SAndrew Davis	status = "okay";
453fd58466aSFaiz Abbas	pinctrl-names = "default";
454fd58466aSFaiz Abbas	pinctrl-0 = <&main_mmc0_pins_default>;
455fd58466aSFaiz Abbas	bus-width = <8>;
456fd58466aSFaiz Abbas	non-removable;
457fd58466aSFaiz Abbas	ti,driver-strength-ohm = <50>;
458337c4a88SFaiz Abbas	disable-wp;
459fd58466aSFaiz Abbas};
4607e7e7dd5SRoger Quadros
46113f74fc6SFaiz Abbas/*
46213f74fc6SFaiz Abbas * Because of erratas i2025 and i2026 for silicon revision 1.0, the
46313f74fc6SFaiz Abbas * SD card interface might fail. Boards with sr1.0 are recommended to
46413f74fc6SFaiz Abbas * disable sdhci1
46513f74fc6SFaiz Abbas */
46613f74fc6SFaiz Abbas&sdhci1 {
467006d9351SAndrew Davis	status = "okay";
46879b08ae7SAswath Govindraju	vmmc-supply = <&vdd_mmc1_sd>;
46913f74fc6SFaiz Abbas	pinctrl-names = "default";
47013f74fc6SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
47113f74fc6SFaiz Abbas	ti,driver-strength-ohm = <50>;
47213f74fc6SFaiz Abbas	disable-wp;
47313f74fc6SFaiz Abbas};
47413f74fc6SFaiz Abbas
4757e7e7dd5SRoger Quadros&usb1 {
4767e7e7dd5SRoger Quadros	pinctrl-names = "default";
4777e7e7dd5SRoger Quadros	pinctrl-0 = <&usb1_pins_default>;
4787e7e7dd5SRoger Quadros	dr_mode = "otg";
4797e7e7dd5SRoger Quadros};
4807e7e7dd5SRoger Quadros
4817e7e7dd5SRoger Quadros&dwc3_0 {
4827e7e7dd5SRoger Quadros	status = "disabled";
4837e7e7dd5SRoger Quadros};
4847e7e7dd5SRoger Quadros
4857e7e7dd5SRoger Quadros&usb0_phy {
4867e7e7dd5SRoger Quadros	status = "disabled";
4877e7e7dd5SRoger Quadros};
488aa6eaaa2SVignesh R
489aa6eaaa2SVignesh R&tscadc0 {
4901228242dSAndrew Davis	status = "okay";
491aa6eaaa2SVignesh R	adc {
492aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
493aa6eaaa2SVignesh R	};
494aa6eaaa2SVignesh R};
495aa6eaaa2SVignesh R
496aa6eaaa2SVignesh R&tscadc1 {
4971228242dSAndrew Davis	status = "okay";
498aa6eaaa2SVignesh R	adc {
499aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
500aa6eaaa2SVignesh R	};
501aa6eaaa2SVignesh R};
5021b89dc93SKishon Vijay Abraham I
5031b89dc93SKishon Vijay Abraham I&serdes0 {
5041b89dc93SKishon Vijay Abraham I	status = "disabled";
5051b89dc93SKishon Vijay Abraham I};
5061b89dc93SKishon Vijay Abraham I
5071b89dc93SKishon Vijay Abraham I&serdes1 {
5081b89dc93SKishon Vijay Abraham I	status = "disabled";
5091b89dc93SKishon Vijay Abraham I};
5101b89dc93SKishon Vijay Abraham I
51143570f78SSuman Anna&mailbox0_cluster0 {
5123f9089eaSAndrew Davis	status = "okay";
513fef84512SLokesh Vutla	interrupts = <436>;
51443570f78SSuman Anna
51543570f78SSuman Anna	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
51643570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
51743570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
51843570f78SSuman Anna	};
51943570f78SSuman Anna};
52043570f78SSuman Anna
52143570f78SSuman Anna&mailbox0_cluster1 {
5223f9089eaSAndrew Davis	status = "okay";
523fef84512SLokesh Vutla	interrupts = <432>;
52443570f78SSuman Anna
52543570f78SSuman Anna	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
52643570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
52743570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
52843570f78SSuman Anna	};
52943570f78SSuman Anna};
53043570f78SSuman Anna
53110332cd6SSuman Anna&mcu_r5fss0_core0 {
532954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
533954ec513SSuman Anna			<&mcu_r5fss0_core0_memory_region>;
5346d1ffc18SAndrew Davis	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
53510332cd6SSuman Anna};
53610332cd6SSuman Anna
53710332cd6SSuman Anna&mcu_r5fss0_core1 {
538954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
539954ec513SSuman Anna			<&mcu_r5fss0_core1_memory_region>;
5406d1ffc18SAndrew Davis	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
54110332cd6SSuman Anna};
54210332cd6SSuman Anna
54307481770SVignesh Raghavendra&ospi0 {
54446d0c519SAndrew Davis	status = "okay";
54507481770SVignesh Raghavendra	pinctrl-names = "default";
54607481770SVignesh Raghavendra	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
54707481770SVignesh Raghavendra
54807481770SVignesh Raghavendra	flash@0 {
54907481770SVignesh Raghavendra		compatible = "jedec,spi-nor";
55007481770SVignesh Raghavendra		reg = <0x0>;
5517c172b30SPratyush Yadav		spi-tx-bus-width = <8>;
55207481770SVignesh Raghavendra		spi-rx-bus-width = <8>;
5537c172b30SPratyush Yadav		spi-max-frequency = <25000000>;
55407481770SVignesh Raghavendra		cdns,tshsl-ns = <60>;
55507481770SVignesh Raghavendra		cdns,tsd2d-ns = <60>;
55607481770SVignesh Raghavendra		cdns,tchsh-ns = <60>;
55707481770SVignesh Raghavendra		cdns,tslch-ns = <60>;
55807481770SVignesh Raghavendra		cdns,read-delay = <0>;
559c08cb9ceSVaishnav Achath
560c08cb9ceSVaishnav Achath		partitions {
561c08cb9ceSVaishnav Achath			compatible = "fixed-partitions";
562c08cb9ceSVaishnav Achath			#address-cells = <1>;
563c08cb9ceSVaishnav Achath			#size-cells = <1>;
564c08cb9ceSVaishnav Achath
565c08cb9ceSVaishnav Achath			partition@0 {
566c08cb9ceSVaishnav Achath				label = "ospi.tiboot3";
567c08cb9ceSVaishnav Achath				reg = <0x0 0x80000>;
568c08cb9ceSVaishnav Achath			};
569c08cb9ceSVaishnav Achath
570c08cb9ceSVaishnav Achath			partition@80000 {
571c08cb9ceSVaishnav Achath				label = "ospi.tispl";
572c08cb9ceSVaishnav Achath				reg = <0x80000 0x200000>;
573c08cb9ceSVaishnav Achath			};
574c08cb9ceSVaishnav Achath
575c08cb9ceSVaishnav Achath			partition@280000 {
576c08cb9ceSVaishnav Achath				label = "ospi.u-boot";
577c08cb9ceSVaishnav Achath				reg = <0x280000 0x400000>;
578c08cb9ceSVaishnav Achath			};
579c08cb9ceSVaishnav Achath
580c08cb9ceSVaishnav Achath			partition@680000 {
581c08cb9ceSVaishnav Achath				label = "ospi.env";
582c08cb9ceSVaishnav Achath				reg = <0x680000 0x20000>;
583c08cb9ceSVaishnav Achath			};
584c08cb9ceSVaishnav Achath
585c08cb9ceSVaishnav Achath			partition@6a0000 {
586c08cb9ceSVaishnav Achath				label = "ospi.env.backup";
587c08cb9ceSVaishnav Achath				reg = <0x6a0000 0x20000>;
588c08cb9ceSVaishnav Achath			};
589c08cb9ceSVaishnav Achath
590c08cb9ceSVaishnav Achath			partition@6c0000 {
591c08cb9ceSVaishnav Achath				label = "ospi.sysfw";
592c08cb9ceSVaishnav Achath				reg = <0x6c0000 0x100000>;
593c08cb9ceSVaishnav Achath			};
594c08cb9ceSVaishnav Achath
595c08cb9ceSVaishnav Achath			partition@800000 {
596c08cb9ceSVaishnav Achath				label = "ospi.rootfs";
597c08cb9ceSVaishnav Achath				reg = <0x800000 0x37c0000>;
598c08cb9ceSVaishnav Achath			};
599c08cb9ceSVaishnav Achath
600c08cb9ceSVaishnav Achath			partition@3fe0000 {
601c08cb9ceSVaishnav Achath				label = "ospi.phypattern";
602c08cb9ceSVaishnav Achath				reg = <0x3fe0000 0x20000>;
603c08cb9ceSVaishnav Achath			};
604c08cb9ceSVaishnav Achath		};
60507481770SVignesh Raghavendra	};
60607481770SVignesh Raghavendra};
607be28d4daSBenoit Parrot
6089ba5a8a5SGrygorii Strashko&mcu_cpsw {
6099ba5a8a5SGrygorii Strashko	pinctrl-names = "default";
6100edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_cpsw_pins_default>;
6119ba5a8a5SGrygorii Strashko};
6129ba5a8a5SGrygorii Strashko
6139ba5a8a5SGrygorii Strashko&davinci_mdio {
614c75c5c0bSAndrew Davis	status = "okay";
6150edd6d7eSAndrew Davis	pinctrl-names = "default";
6160edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_mdio_pins_default>;
6170edd6d7eSAndrew Davis
6189ba5a8a5SGrygorii Strashko	phy0: ethernet-phy@0 {
6199ba5a8a5SGrygorii Strashko		reg = <0>;
6209ba5a8a5SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
6219ba5a8a5SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
6229ba5a8a5SGrygorii Strashko	};
6239ba5a8a5SGrygorii Strashko};
6249ba5a8a5SGrygorii Strashko
6259ba5a8a5SGrygorii Strashko&cpsw_port1 {
6269ba5a8a5SGrygorii Strashko	phy-mode = "rgmii-rxid";
6279ba5a8a5SGrygorii Strashko	phy-handle = <&phy0>;
6289ba5a8a5SGrygorii Strashko};
629af03de2bSNishanth Menon
630af03de2bSNishanth Menon&dss {
631af03de2bSNishanth Menon	status = "disabled";
632af03de2bSNishanth Menon};
633