xref: /linux/arch/arm64/include/asm/kernel-pgtable.h (revision 6c8c1406)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Kernel page table mapping
4  *
5  * Copyright (C) 2015 ARM Ltd.
6  */
7 
8 #ifndef __ASM_KERNEL_PGTABLE_H
9 #define __ASM_KERNEL_PGTABLE_H
10 
11 #include <asm/boot.h>
12 #include <asm/pgtable-hwdef.h>
13 #include <asm/sparsemem.h>
14 
15 /*
16  * The linear mapping and the start of memory are both 2M aligned (per
17  * the arm64 booting.txt requirements). Hence we can use section mapping
18  * with 4K (section size = 2M) but not with 16K (section size = 32M) or
19  * 64K (section size = 512M).
20  */
21 #ifdef CONFIG_ARM64_4K_PAGES
22 #define ARM64_KERNEL_USES_PMD_MAPS 1
23 #else
24 #define ARM64_KERNEL_USES_PMD_MAPS 0
25 #endif
26 
27 /*
28  * The idmap and swapper page tables need some space reserved in the kernel
29  * image. Both require pgd, pud (4 levels only) and pmd tables to (section)
30  * map the kernel. With the 64K page configuration, swapper and idmap need to
31  * map to pte level. The swapper also maps the FDT (see __create_page_tables
32  * for more information). Note that the number of ID map translation levels
33  * could be increased on the fly if system RAM is out of reach for the default
34  * VA range, so pages required to map highest possible PA are reserved in all
35  * cases.
36  */
37 #if ARM64_KERNEL_USES_PMD_MAPS
38 #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)
39 #else
40 #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)
41 #endif
42 
43 
44 /*
45  * If KASLR is enabled, then an offset K is added to the kernel address
46  * space. The bottom 21 bits of this offset are zero to guarantee 2MB
47  * alignment for PA and VA.
48  *
49  * For each pagetable level of the swapper, we know that the shift will
50  * be larger than 21 (for the 4KB granule case we use section maps thus
51  * the smallest shift is actually 30) thus there is the possibility that
52  * KASLR can increase the number of pagetable entries by 1, so we make
53  * room for this extra entry.
54  *
55  * Note KASLR cannot increase the number of required entries for a level
56  * by more than one because it increments both the virtual start and end
57  * addresses equally (the extra entry comes from the case where the end
58  * address is just pushed over a boundary and the start address isn't).
59  */
60 
61 #ifdef CONFIG_RANDOMIZE_BASE
62 #define EARLY_KASLR	(1)
63 #else
64 #define EARLY_KASLR	(0)
65 #endif
66 
67 #define EARLY_ENTRIES(vstart, vend, shift, add) \
68 	((((vend) - 1) >> (shift)) - ((vstart) >> (shift)) + 1 + add)
69 
70 #define EARLY_PGDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT, add))
71 
72 #if SWAPPER_PGTABLE_LEVELS > 3
73 #define EARLY_PUDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT, add))
74 #else
75 #define EARLY_PUDS(vstart, vend, add) (0)
76 #endif
77 
78 #if SWAPPER_PGTABLE_LEVELS > 2
79 #define EARLY_PMDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT, add))
80 #else
81 #define EARLY_PMDS(vstart, vend, add) (0)
82 #endif
83 
84 #define EARLY_PAGES(vstart, vend, add) ( 1 			/* PGDIR page */				\
85 			+ EARLY_PGDS((vstart), (vend), add) 	/* each PGDIR needs a next level page table */	\
86 			+ EARLY_PUDS((vstart), (vend), add)	/* each PUD needs a next level page table */	\
87 			+ EARLY_PMDS((vstart), (vend), add))	/* each PMD needs a next level page table */
88 #define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR, _end, EARLY_KASLR))
89 
90 /* the initial ID map may need two extra pages if it needs to be extended */
91 #if VA_BITS < 48
92 #define INIT_IDMAP_DIR_SIZE	((INIT_IDMAP_DIR_PAGES + 2) * PAGE_SIZE)
93 #else
94 #define INIT_IDMAP_DIR_SIZE	(INIT_IDMAP_DIR_PAGES * PAGE_SIZE)
95 #endif
96 #define INIT_IDMAP_DIR_PAGES	EARLY_PAGES(KIMAGE_VADDR, _end + MAX_FDT_SIZE + SWAPPER_BLOCK_SIZE, 1)
97 
98 /* Initial memory map size */
99 #if ARM64_KERNEL_USES_PMD_MAPS
100 #define SWAPPER_BLOCK_SHIFT	PMD_SHIFT
101 #define SWAPPER_BLOCK_SIZE	PMD_SIZE
102 #define SWAPPER_TABLE_SHIFT	PUD_SHIFT
103 #else
104 #define SWAPPER_BLOCK_SHIFT	PAGE_SHIFT
105 #define SWAPPER_BLOCK_SIZE	PAGE_SIZE
106 #define SWAPPER_TABLE_SHIFT	PMD_SHIFT
107 #endif
108 
109 /*
110  * Initial memory map attributes.
111  */
112 #define SWAPPER_PTE_FLAGS	(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
113 #define SWAPPER_PMD_FLAGS	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
114 
115 #if ARM64_KERNEL_USES_PMD_MAPS
116 #define SWAPPER_RW_MMUFLAGS	(PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
117 #define SWAPPER_RX_MMUFLAGS	(SWAPPER_RW_MMUFLAGS | PMD_SECT_RDONLY)
118 #else
119 #define SWAPPER_RW_MMUFLAGS	(PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
120 #define SWAPPER_RX_MMUFLAGS	(SWAPPER_RW_MMUFLAGS | PTE_RDONLY)
121 #endif
122 
123 /*
124  * To make optimal use of block mappings when laying out the linear
125  * mapping, round down the base of physical memory to a size that can
126  * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE
127  * (64k granule), or a multiple that can be mapped using contiguous bits
128  * in the page tables: 32 * PMD_SIZE (16k granule)
129  */
130 #if defined(CONFIG_ARM64_4K_PAGES)
131 #define ARM64_MEMSTART_SHIFT		PUD_SHIFT
132 #elif defined(CONFIG_ARM64_16K_PAGES)
133 #define ARM64_MEMSTART_SHIFT		CONT_PMD_SHIFT
134 #else
135 #define ARM64_MEMSTART_SHIFT		PMD_SHIFT
136 #endif
137 
138 /*
139  * sparsemem vmemmap imposes an additional requirement on the alignment of
140  * memstart_addr, due to the fact that the base of the vmemmap region
141  * has a direct correspondence, and needs to appear sufficiently aligned
142  * in the virtual address space.
143  */
144 #if ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS
145 #define ARM64_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
146 #else
147 #define ARM64_MEMSTART_ALIGN	(1UL << ARM64_MEMSTART_SHIFT)
148 #endif
149 
150 #endif	/* __ASM_KERNEL_PGTABLE_H */
151