1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/interrupt-controller/irq.h>
9
10/ {
11	#address-cells = <2>;
12	#size-cells = <2>;
13
14	cpus {
15		#address-cells = <1>;
16		#size-cells = <0>;
17
18		cpu0: cpu@0 {
19			compatible = "loongson,la264";
20			device_type = "cpu";
21			reg = <0x0>;
22			clocks = <&cpu_clk>;
23		};
24	};
25
26	cpu_clk: cpu-clk {
27		compatible = "fixed-clock";
28		#clock-cells = <0>;
29		clock-frequency = <500000000>;
30	};
31
32	cpuintc: interrupt-controller {
33		compatible = "loongson,cpu-interrupt-controller";
34		#interrupt-cells = <1>;
35		interrupt-controller;
36	};
37
38	bus@10000000 {
39		compatible = "simple-bus";
40		ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
41			 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
42			 <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
43			 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
44			 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
45		#address-cells = <2>;
46		#size-cells = <2>;
47
48		isa@16400000 {
49			compatible = "isa";
50			#size-cells = <1>;
51			#address-cells = <2>;
52			ranges = <1 0x0 0x0 0x16400000 0x4000>;
53		};
54
55		liointc0: interrupt-controller@1fe11400 {
56			compatible = "loongson,liointc-2.0";
57			reg = <0x0 0x1fe11400 0x0 0x40>,
58			      <0x0 0x1fe11040 0x0 0x8>;
59			reg-names = "main", "isr0";
60
61			interrupt-controller;
62			#interrupt-cells = <2>;
63			interrupt-parent = <&cpuintc>;
64			interrupts = <2>;
65			interrupt-names = "int0";
66
67			loongson,parent_int_map = <0xffffffff>, /* int0 */
68						  <0x00000000>, /* int1 */
69						  <0x00000000>, /* int2 */
70						  <0x00000000>; /* int3 */
71		};
72
73		liointc1: interrupt-controller@1fe11440 {
74			compatible = "loongson,liointc-2.0";
75			reg = <0x0 0x1fe11440 0x0 0x40>,
76			      <0x0 0x1fe11048 0x0 0x8>;
77			reg-names = "main", "isr0";
78
79			interrupt-controller;
80			#interrupt-cells = <2>;
81			interrupt-parent = <&cpuintc>;
82			interrupts = <4>;
83			interrupt-names = "int2";
84
85			loongson,parent_int_map = <0x00000000>, /* int0 */
86						  <0x00000000>, /* int1 */
87						  <0xffffffff>, /* int2 */
88						  <0x00000000>; /* int3 */
89		};
90
91		eiointc: interrupt-controller@1fe11600 {
92			compatible = "loongson,ls2k0500-eiointc";
93			reg = <0x0 0x1fe11600 0x0 0xea00>;
94			interrupt-controller;
95			#interrupt-cells = <1>;
96			interrupt-parent = <&cpuintc>;
97			interrupts = <3>;
98		};
99
100		gmac0: ethernet@1f020000 {
101			compatible = "snps,dwmac-3.70a";
102			reg = <0x0 0x1f020000 0x0 0x10000>;
103			interrupt-parent = <&liointc0>;
104			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
105			interrupt-names = "macirq";
106			status = "disabled";
107		};
108
109		gmac1: ethernet@1f030000 {
110			compatible = "snps,dwmac-3.70a";
111			reg = <0x0 0x1f030000 0x0 0x10000>;
112			interrupt-parent = <&liointc0>;
113			interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
114			interrupt-names = "macirq";
115			status = "disabled";
116		};
117
118		sata: sata@1f040000 {
119			compatible = "snps,spear-ahci";
120			reg = <0x0 0x1f040000 0x0 0x10000>;
121			interrupt-parent = <&eiointc>;
122			interrupts = <75>;
123			status = "disabled";
124		};
125
126		ehci0: usb@1f050000 {
127			compatible = "generic-ehci";
128			reg = <0x0 0x1f050000 0x0 0x8000>;
129			interrupt-parent = <&eiointc>;
130			interrupts = <71>;
131			status = "disabled";
132		};
133
134		ohci0: usb@1f058000 {
135			compatible = "generic-ohci";
136			reg = <0x0 0x1f058000 0x0 0x8000>;
137			interrupt-parent = <&eiointc>;
138			interrupts = <72>;
139			status = "disabled";
140		};
141
142		uart0: serial@1ff40800 {
143			compatible = "ns16550a";
144			reg = <0x0 0x1ff40800 0x0 0x10>;
145			clock-frequency = <100000000>;
146			interrupt-parent = <&eiointc>;
147			interrupts = <2>;
148			no-loopback-test;
149			status = "disabled";
150		};
151
152		i2c0: i2c@1ff48000 {
153			compatible = "loongson,ls2k-i2c";
154			reg = <0x0 0x1ff48000 0x0 0x0800>;
155			interrupt-parent = <&eiointc>;
156			interrupts = <14>;
157			status = "disabled";
158		};
159
160		i2c@1ff48800 {
161			compatible = "loongson,ls2k-i2c";
162			reg = <0x0 0x1ff48800 0x0 0x0800>;
163			interrupt-parent = <&eiointc>;
164			interrupts = <15>;
165			status = "disabled";
166		};
167
168		i2c@1ff49000 {
169			compatible = "loongson,ls2k-i2c";
170			reg = <0x0 0x1ff49000 0x0 0x0800>;
171			interrupt-parent = <&eiointc>;
172			interrupts = <16>;
173			status = "disabled";
174		};
175
176		i2c@1ff49800 {
177			compatible = "loongson,ls2k-i2c";
178			reg = <0x0 0x1ff49800 0x0 0x0800>;
179			interrupt-parent = <&eiointc>;
180			interrupts = <17>;
181			status = "disabled";
182		};
183
184		i2c@1ff4a000 {
185			compatible = "loongson,ls2k-i2c";
186			reg = <0x0 0x1ff4a000 0x0 0x0800>;
187			interrupt-parent = <&eiointc>;
188			interrupts = <18>;
189			status = "disabled";
190		};
191
192		i2c@1ff4a800 {
193			compatible = "loongson,ls2k-i2c";
194			reg = <0x0 0x1ff4a800 0x0 0x0800>;
195			interrupt-parent = <&eiointc>;
196			interrupts = <19>;
197			status = "disabled";
198		};
199
200		pmc: power-management@1ff6c000 {
201			compatible = "loongson,ls2k0500-pmc", "syscon";
202			reg = <0x0 0x1ff6c000 0x0 0x58>;
203			interrupt-parent = <&eiointc>;
204			interrupts = <56>;
205			loongson,suspend-address = <0x0 0x1c000500>;
206
207			syscon-reboot {
208				compatible = "syscon-reboot";
209				offset = <0x30>;
210				mask = <0x1>;
211			};
212
213			syscon-poweroff {
214				compatible = "syscon-poweroff";
215				regmap = <&pmc>;
216				offset = <0x14>;
217				mask = <0x3c00>;
218				value = <0x3c00>;
219			};
220		};
221
222		rtc0: rtc@1ff6c100 {
223			compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
224			reg = <0x0 0x1ff6c100 0x0 0x100>;
225			interrupt-parent = <&eiointc>;
226			interrupts = <35>;
227			status = "disabled";
228		};
229
230		pcie@1a000000 {
231			compatible = "loongson,ls2k-pci";
232			reg = <0x0 0x1a000000 0x0 0x02000000>,
233			      <0xfe 0x0 0x0 0x20000000>;
234			#address-cells = <3>;
235			#size-cells = <2>;
236			device_type = "pci";
237			bus-range = <0x0 0x5>;
238			ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
239				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
240
241			pcie@0,0 {
242				reg = <0x0000 0x0 0x0 0x0 0x0>;
243				#address-cells = <3>;
244				#size-cells = <2>;
245				device_type = "pci";
246				interrupt-parent = <&eiointc>;
247				#interrupt-cells = <1>;
248				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
249				interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
250				ranges;
251			};
252
253			pcie@1,0 {
254				reg = <0x0800 0x0 0x0 0x0 0x0>;
255				#address-cells = <3>;
256				#size-cells = <2>;
257				device_type = "pci";
258				interrupt-parent = <&eiointc>;
259				#interrupt-cells = <1>;
260				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
261				interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
262				ranges;
263			};
264		};
265	};
266};
267