xref: /linux/arch/mips/kernel/cevt-ds1287.c (revision ac8fd122)
116216333SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
26457d9fcSYoichi Yuasa /*
36457d9fcSYoichi Yuasa  *  DS1287 clockevent driver
46457d9fcSYoichi Yuasa  *
5ada8e951SYoichi Yuasa  *  Copyright (C) 2008	Yoichi Yuasa <yuasa@linux-mips.org>
66457d9fcSYoichi Yuasa  */
76457d9fcSYoichi Yuasa #include <linux/clockchips.h>
86457d9fcSYoichi Yuasa #include <linux/init.h>
96457d9fcSYoichi Yuasa #include <linux/interrupt.h>
106457d9fcSYoichi Yuasa #include <linux/mc146818rtc.h>
11ca4d3e67SDavid Howells #include <linux/irq.h>
126457d9fcSYoichi Yuasa 
136457d9fcSYoichi Yuasa #include <asm/time.h>
146457d9fcSYoichi Yuasa 
ds1287_timer_state(void)156457d9fcSYoichi Yuasa int ds1287_timer_state(void)
166457d9fcSYoichi Yuasa {
176457d9fcSYoichi Yuasa 	return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0;
186457d9fcSYoichi Yuasa }
196457d9fcSYoichi Yuasa 
ds1287_set_base_clock(unsigned int hz)206457d9fcSYoichi Yuasa int ds1287_set_base_clock(unsigned int hz)
216457d9fcSYoichi Yuasa {
226457d9fcSYoichi Yuasa 	u8 rate;
236457d9fcSYoichi Yuasa 
246457d9fcSYoichi Yuasa 	switch (hz) {
256457d9fcSYoichi Yuasa 	case 128:
266457d9fcSYoichi Yuasa 		rate = 0x9;
276457d9fcSYoichi Yuasa 		break;
286457d9fcSYoichi Yuasa 	case 256:
296457d9fcSYoichi Yuasa 		rate = 0x8;
306457d9fcSYoichi Yuasa 		break;
316457d9fcSYoichi Yuasa 	case 1024:
326457d9fcSYoichi Yuasa 		rate = 0x6;
336457d9fcSYoichi Yuasa 		break;
346457d9fcSYoichi Yuasa 	default:
356457d9fcSYoichi Yuasa 		return -EINVAL;
366457d9fcSYoichi Yuasa 	}
376457d9fcSYoichi Yuasa 
386457d9fcSYoichi Yuasa 	CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A);
396457d9fcSYoichi Yuasa 
406457d9fcSYoichi Yuasa 	return 0;
416457d9fcSYoichi Yuasa }
426457d9fcSYoichi Yuasa 
ds1287_set_next_event(unsigned long delta,struct clock_event_device * evt)436457d9fcSYoichi Yuasa static int ds1287_set_next_event(unsigned long delta,
446457d9fcSYoichi Yuasa 				 struct clock_event_device *evt)
456457d9fcSYoichi Yuasa {
466457d9fcSYoichi Yuasa 	return -EINVAL;
476457d9fcSYoichi Yuasa }
486457d9fcSYoichi Yuasa 
ds1287_shutdown(struct clock_event_device * evt)499f95618fSViresh Kumar static int ds1287_shutdown(struct clock_event_device *evt)
506457d9fcSYoichi Yuasa {
516457d9fcSYoichi Yuasa 	u8 val;
526457d9fcSYoichi Yuasa 
536457d9fcSYoichi Yuasa 	spin_lock(&rtc_lock);
546457d9fcSYoichi Yuasa 
556457d9fcSYoichi Yuasa 	val = CMOS_READ(RTC_REG_B);
566457d9fcSYoichi Yuasa 	val &= ~RTC_PIE;
576457d9fcSYoichi Yuasa 	CMOS_WRITE(val, RTC_REG_B);
586457d9fcSYoichi Yuasa 
596457d9fcSYoichi Yuasa 	spin_unlock(&rtc_lock);
609f95618fSViresh Kumar 	return 0;
619f95618fSViresh Kumar }
629f95618fSViresh Kumar 
ds1287_set_periodic(struct clock_event_device * evt)639f95618fSViresh Kumar static int ds1287_set_periodic(struct clock_event_device *evt)
649f95618fSViresh Kumar {
659f95618fSViresh Kumar 	u8 val;
669f95618fSViresh Kumar 
679f95618fSViresh Kumar 	spin_lock(&rtc_lock);
689f95618fSViresh Kumar 
699f95618fSViresh Kumar 	val = CMOS_READ(RTC_REG_B);
709f95618fSViresh Kumar 	val |= RTC_PIE;
719f95618fSViresh Kumar 	CMOS_WRITE(val, RTC_REG_B);
729f95618fSViresh Kumar 
739f95618fSViresh Kumar 	spin_unlock(&rtc_lock);
749f95618fSViresh Kumar 	return 0;
756457d9fcSYoichi Yuasa }
766457d9fcSYoichi Yuasa 
ds1287_event_handler(struct clock_event_device * dev)776457d9fcSYoichi Yuasa static void ds1287_event_handler(struct clock_event_device *dev)
786457d9fcSYoichi Yuasa {
796457d9fcSYoichi Yuasa }
806457d9fcSYoichi Yuasa 
816457d9fcSYoichi Yuasa static struct clock_event_device ds1287_clockevent = {
826457d9fcSYoichi Yuasa 	.name			= "ds1287",
836457d9fcSYoichi Yuasa 	.features		= CLOCK_EVT_FEAT_PERIODIC,
846457d9fcSYoichi Yuasa 	.set_next_event		= ds1287_set_next_event,
859f95618fSViresh Kumar 	.set_state_shutdown	= ds1287_shutdown,
869f95618fSViresh Kumar 	.set_state_periodic	= ds1287_set_periodic,
879f95618fSViresh Kumar 	.tick_resume		= ds1287_shutdown,
886457d9fcSYoichi Yuasa 	.event_handler		= ds1287_event_handler,
896457d9fcSYoichi Yuasa };
906457d9fcSYoichi Yuasa 
ds1287_interrupt(int irq,void * dev_id)916457d9fcSYoichi Yuasa static irqreturn_t ds1287_interrupt(int irq, void *dev_id)
926457d9fcSYoichi Yuasa {
936457d9fcSYoichi Yuasa 	struct clock_event_device *cd = &ds1287_clockevent;
946457d9fcSYoichi Yuasa 
956457d9fcSYoichi Yuasa 	/* Ack the RTC interrupt. */
966457d9fcSYoichi Yuasa 	CMOS_READ(RTC_REG_C);
976457d9fcSYoichi Yuasa 
986457d9fcSYoichi Yuasa 	cd->event_handler(cd);
996457d9fcSYoichi Yuasa 
1006457d9fcSYoichi Yuasa 	return IRQ_HANDLED;
1016457d9fcSYoichi Yuasa }
1026457d9fcSYoichi Yuasa 
ds1287_clockevent_init(int irq)1036457d9fcSYoichi Yuasa int __init ds1287_clockevent_init(int irq)
1046457d9fcSYoichi Yuasa {
105*ac8fd122Safzal mohammed 	unsigned long flags = IRQF_PERCPU | IRQF_TIMER;
1066457d9fcSYoichi Yuasa 	struct clock_event_device *cd;
1076457d9fcSYoichi Yuasa 
1086457d9fcSYoichi Yuasa 	cd = &ds1287_clockevent;
1096457d9fcSYoichi Yuasa 	cd->rating = 100;
1106457d9fcSYoichi Yuasa 	cd->irq = irq;
1116457d9fcSYoichi Yuasa 	clockevent_set_clock(cd, 32768);
1126457d9fcSYoichi Yuasa 	cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
113e4db9253SNicolai Stange 	cd->max_delta_ticks = 0x7fffffff;
1146457d9fcSYoichi Yuasa 	cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
115e4db9253SNicolai Stange 	cd->min_delta_ticks = 0x300;
116320ab2b0SRusty Russell 	cd->cpumask = cpumask_of(0);
1176457d9fcSYoichi Yuasa 
1186457d9fcSYoichi Yuasa 	clockevents_register_device(&ds1287_clockevent);
1196457d9fcSYoichi Yuasa 
120*ac8fd122Safzal mohammed 	return request_irq(irq, ds1287_interrupt, flags, "ds1287", NULL);
1216457d9fcSYoichi Yuasa }
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