xref: /linux/arch/powerpc/include/asm/ps3.h (revision 2da68a77)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  PS3 platform declarations.
4  *
5  *  Copyright (C) 2006 Sony Computer Entertainment Inc.
6  *  Copyright 2006 Sony Corp.
7  */
8 
9 #if !defined(_ASM_POWERPC_PS3_H)
10 #define _ASM_POWERPC_PS3_H
11 
12 #include <linux/types.h>
13 #include <linux/device.h>
14 #include <asm/cell-pmu.h>
15 
16 union ps3_firmware_version {
17 	u64 raw;
18 	struct {
19 		u16 pad;
20 		u16 major;
21 		u16 minor;
22 		u16 rev;
23 	};
24 };
25 
26 void ps3_get_firmware_version(union ps3_firmware_version *v);
27 int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev);
28 
29 /* 'Other OS' area */
30 
31 enum ps3_param_av_multi_out {
32 	PS3_PARAM_AV_MULTI_OUT_NTSC = 0,
33 	PS3_PARAM_AV_MULTI_OUT_PAL_RGB = 1,
34 	PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR = 2,
35 	PS3_PARAM_AV_MULTI_OUT_SECAM = 3,
36 };
37 
38 enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void);
39 
40 extern u64 ps3_os_area_get_rtc_diff(void);
41 extern void ps3_os_area_set_rtc_diff(u64 rtc_diff);
42 
43 struct ps3_os_area_flash_ops {
44 	ssize_t (*read)(void *buf, size_t count, loff_t pos);
45 	ssize_t (*write)(const void *buf, size_t count, loff_t pos);
46 };
47 
48 extern void ps3_os_area_flash_register(const struct ps3_os_area_flash_ops *ops);
49 
50 /* dma routines */
51 
52 enum ps3_dma_page_size {
53 	PS3_DMA_4K = 12U,
54 	PS3_DMA_64K = 16U,
55 	PS3_DMA_1M = 20U,
56 	PS3_DMA_16M = 24U,
57 };
58 
59 enum ps3_dma_region_type {
60 	PS3_DMA_OTHER = 0,
61 	PS3_DMA_INTERNAL = 2,
62 };
63 
64 struct ps3_dma_region_ops;
65 
66 /**
67  * struct ps3_dma_region - A per device dma state variables structure
68  * @did: The HV device id.
69  * @page_size: The ioc pagesize.
70  * @region_type: The HV region type.
71  * @bus_addr: The 'translated' bus address of the region.
72  * @len: The length in bytes of the region.
73  * @offset: The offset from the start of memory of the region.
74  * @dma_mask: Device dma_mask.
75  * @ioid: The IOID of the device who owns this region
76  * @chunk_list: Opaque variable used by the ioc page manager.
77  * @region_ops: struct ps3_dma_region_ops - dma region operations
78  */
79 
80 struct ps3_dma_region {
81 	struct ps3_system_bus_device *dev;
82 	/* device variables */
83 	const struct ps3_dma_region_ops *region_ops;
84 	unsigned char ioid;
85 	enum ps3_dma_page_size page_size;
86 	enum ps3_dma_region_type region_type;
87 	unsigned long len;
88 	unsigned long offset;
89 	u64 dma_mask;
90 
91 	/* driver variables  (set by ps3_dma_region_create) */
92 	unsigned long bus_addr;
93 	struct {
94 		spinlock_t lock;
95 		struct list_head head;
96 	} chunk_list;
97 };
98 
99 struct ps3_dma_region_ops {
100 	int (*create)(struct ps3_dma_region *);
101 	int (*free)(struct ps3_dma_region *);
102 	int (*map)(struct ps3_dma_region *,
103 		   unsigned long virt_addr,
104 		   unsigned long len,
105 		   dma_addr_t *bus_addr,
106 		   u64 iopte_pp);
107 	int (*unmap)(struct ps3_dma_region *,
108 		     dma_addr_t bus_addr,
109 		     unsigned long len);
110 };
111 /**
112  * struct ps3_dma_region_init - Helper to initialize structure variables
113  *
114  * Helper to properly initialize variables prior to calling
115  * ps3_system_bus_device_register.
116  */
117 
118 struct ps3_system_bus_device;
119 
120 int ps3_dma_region_init(struct ps3_system_bus_device *dev,
121 	struct ps3_dma_region *r, enum ps3_dma_page_size page_size,
122 	enum ps3_dma_region_type region_type, void *addr, unsigned long len);
123 int ps3_dma_region_create(struct ps3_dma_region *r);
124 int ps3_dma_region_free(struct ps3_dma_region *r);
125 int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr,
126 	unsigned long len, dma_addr_t *bus_addr,
127 	u64 iopte_pp);
128 int ps3_dma_unmap(struct ps3_dma_region *r, dma_addr_t bus_addr,
129 	unsigned long len);
130 
131 /* mmio routines */
132 
133 enum ps3_mmio_page_size {
134 	PS3_MMIO_4K = 12U,
135 	PS3_MMIO_64K = 16U
136 };
137 
138 struct ps3_mmio_region_ops;
139 /**
140  * struct ps3_mmio_region - a per device mmio state variables structure
141  *
142  * Current systems can be supported with a single region per device.
143  */
144 
145 struct ps3_mmio_region {
146 	struct ps3_system_bus_device *dev;
147 	const struct ps3_mmio_region_ops *mmio_ops;
148 	unsigned long bus_addr;
149 	unsigned long len;
150 	enum ps3_mmio_page_size page_size;
151 	unsigned long lpar_addr;
152 };
153 
154 struct ps3_mmio_region_ops {
155 	int (*create)(struct ps3_mmio_region *);
156 	int (*free)(struct ps3_mmio_region *);
157 };
158 /**
159  * struct ps3_mmio_region_init - Helper to initialize structure variables
160  *
161  * Helper to properly initialize variables prior to calling
162  * ps3_system_bus_device_register.
163  */
164 
165 int ps3_mmio_region_init(struct ps3_system_bus_device *dev,
166 	struct ps3_mmio_region *r, unsigned long bus_addr, unsigned long len,
167 	enum ps3_mmio_page_size page_size);
168 int ps3_mmio_region_create(struct ps3_mmio_region *r);
169 int ps3_free_mmio_region(struct ps3_mmio_region *r);
170 unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr);
171 
172 /* inrerrupt routines */
173 
174 enum ps3_cpu_binding {
175 	PS3_BINDING_CPU_ANY = -1,
176 	PS3_BINDING_CPU_0 = 0,
177 	PS3_BINDING_CPU_1 = 1,
178 };
179 
180 int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
181 	unsigned int *virq);
182 int ps3_irq_plug_destroy(unsigned int virq);
183 int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu, unsigned int *virq);
184 int ps3_event_receive_port_destroy(unsigned int virq);
185 int ps3_send_event_locally(unsigned int virq);
186 
187 int ps3_io_irq_setup(enum ps3_cpu_binding cpu, unsigned int interrupt_id,
188 	unsigned int *virq);
189 int ps3_io_irq_destroy(unsigned int virq);
190 int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu, void* virt_addr_bmp,
191 	unsigned int *virq);
192 int ps3_vuart_irq_destroy(unsigned int virq);
193 int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id,
194 	unsigned int class, unsigned int *virq);
195 int ps3_spe_irq_destroy(unsigned int virq);
196 
197 int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev,
198 	enum ps3_cpu_binding cpu, unsigned int *virq);
199 int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev,
200 	unsigned int virq);
201 
202 /* lv1 result codes */
203 
204 enum lv1_result {
205 	LV1_SUCCESS                     = 0,
206 	/* not used                       -1 */
207 	LV1_RESOURCE_SHORTAGE           = -2,
208 	LV1_NO_PRIVILEGE                = -3,
209 	LV1_DENIED_BY_POLICY            = -4,
210 	LV1_ACCESS_VIOLATION            = -5,
211 	LV1_NO_ENTRY                    = -6,
212 	LV1_DUPLICATE_ENTRY             = -7,
213 	LV1_TYPE_MISMATCH               = -8,
214 	LV1_BUSY                        = -9,
215 	LV1_EMPTY                       = -10,
216 	LV1_WRONG_STATE                 = -11,
217 	/* not used                       -12 */
218 	LV1_NO_MATCH                    = -13,
219 	LV1_ALREADY_CONNECTED           = -14,
220 	LV1_UNSUPPORTED_PARAMETER_VALUE = -15,
221 	LV1_CONDITION_NOT_SATISFIED     = -16,
222 	LV1_ILLEGAL_PARAMETER_VALUE     = -17,
223 	LV1_BAD_OPTION                  = -18,
224 	LV1_IMPLEMENTATION_LIMITATION   = -19,
225 	LV1_NOT_IMPLEMENTED             = -20,
226 	LV1_INVALID_CLASS_ID            = -21,
227 	LV1_CONSTRAINT_NOT_SATISFIED    = -22,
228 	LV1_ALIGNMENT_ERROR             = -23,
229 	LV1_HARDWARE_ERROR              = -24,
230 	LV1_INVALID_DATA_FORMAT         = -25,
231 	LV1_INVALID_OPERATION           = -26,
232 	LV1_INTERNAL_ERROR              = -32768,
233 };
234 
235 static inline const char* ps3_result(int result)
236 {
237 #if defined(DEBUG) || defined(PS3_VERBOSE_RESULT) || defined(CONFIG_PS3_VERBOSE_RESULT)
238 	switch (result) {
239 	case LV1_SUCCESS:
240 		return "LV1_SUCCESS (0)";
241 	case -1:
242 		return "** unknown result ** (-1)";
243 	case LV1_RESOURCE_SHORTAGE:
244 		return "LV1_RESOURCE_SHORTAGE (-2)";
245 	case LV1_NO_PRIVILEGE:
246 		return "LV1_NO_PRIVILEGE (-3)";
247 	case LV1_DENIED_BY_POLICY:
248 		return "LV1_DENIED_BY_POLICY (-4)";
249 	case LV1_ACCESS_VIOLATION:
250 		return "LV1_ACCESS_VIOLATION (-5)";
251 	case LV1_NO_ENTRY:
252 		return "LV1_NO_ENTRY (-6)";
253 	case LV1_DUPLICATE_ENTRY:
254 		return "LV1_DUPLICATE_ENTRY (-7)";
255 	case LV1_TYPE_MISMATCH:
256 		return "LV1_TYPE_MISMATCH (-8)";
257 	case LV1_BUSY:
258 		return "LV1_BUSY (-9)";
259 	case LV1_EMPTY:
260 		return "LV1_EMPTY (-10)";
261 	case LV1_WRONG_STATE:
262 		return "LV1_WRONG_STATE (-11)";
263 	case -12:
264 		return "** unknown result ** (-12)";
265 	case LV1_NO_MATCH:
266 		return "LV1_NO_MATCH (-13)";
267 	case LV1_ALREADY_CONNECTED:
268 		return "LV1_ALREADY_CONNECTED (-14)";
269 	case LV1_UNSUPPORTED_PARAMETER_VALUE:
270 		return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)";
271 	case LV1_CONDITION_NOT_SATISFIED:
272 		return "LV1_CONDITION_NOT_SATISFIED (-16)";
273 	case LV1_ILLEGAL_PARAMETER_VALUE:
274 		return "LV1_ILLEGAL_PARAMETER_VALUE (-17)";
275 	case LV1_BAD_OPTION:
276 		return "LV1_BAD_OPTION (-18)";
277 	case LV1_IMPLEMENTATION_LIMITATION:
278 		return "LV1_IMPLEMENTATION_LIMITATION (-19)";
279 	case LV1_NOT_IMPLEMENTED:
280 		return "LV1_NOT_IMPLEMENTED (-20)";
281 	case LV1_INVALID_CLASS_ID:
282 		return "LV1_INVALID_CLASS_ID (-21)";
283 	case LV1_CONSTRAINT_NOT_SATISFIED:
284 		return "LV1_CONSTRAINT_NOT_SATISFIED (-22)";
285 	case LV1_ALIGNMENT_ERROR:
286 		return "LV1_ALIGNMENT_ERROR (-23)";
287 	case LV1_HARDWARE_ERROR:
288 		return "LV1_HARDWARE_ERROR (-24)";
289 	case LV1_INVALID_DATA_FORMAT:
290 		return "LV1_INVALID_DATA_FORMAT (-25)";
291 	case LV1_INVALID_OPERATION:
292 		return "LV1_INVALID_OPERATION (-26)";
293 	case LV1_INTERNAL_ERROR:
294 		return "LV1_INTERNAL_ERROR (-32768)";
295 	default:
296 		BUG();
297 		return "** unknown result **";
298 	};
299 #else
300 	return "";
301 #endif
302 }
303 
304 /* system bus routines */
305 
306 enum ps3_match_id {
307 	PS3_MATCH_ID_EHCI		= 1,
308 	PS3_MATCH_ID_OHCI		= 2,
309 	PS3_MATCH_ID_GELIC		= 3,
310 	PS3_MATCH_ID_AV_SETTINGS	= 4,
311 	PS3_MATCH_ID_SYSTEM_MANAGER	= 5,
312 	PS3_MATCH_ID_STOR_DISK		= 6,
313 	PS3_MATCH_ID_STOR_ROM		= 7,
314 	PS3_MATCH_ID_STOR_FLASH		= 8,
315 	PS3_MATCH_ID_SOUND		= 9,
316 	PS3_MATCH_ID_GPU		= 10,
317 	PS3_MATCH_ID_LPM		= 11,
318 };
319 
320 enum ps3_match_sub_id {
321 	PS3_MATCH_SUB_ID_GPU_FB		= 1,
322 	PS3_MATCH_SUB_ID_GPU_RAMDISK	= 2,
323 };
324 
325 #define PS3_MODULE_ALIAS_EHCI		"ps3:1:0"
326 #define PS3_MODULE_ALIAS_OHCI		"ps3:2:0"
327 #define PS3_MODULE_ALIAS_GELIC		"ps3:3:0"
328 #define PS3_MODULE_ALIAS_AV_SETTINGS	"ps3:4:0"
329 #define PS3_MODULE_ALIAS_SYSTEM_MANAGER	"ps3:5:0"
330 #define PS3_MODULE_ALIAS_STOR_DISK	"ps3:6:0"
331 #define PS3_MODULE_ALIAS_STOR_ROM	"ps3:7:0"
332 #define PS3_MODULE_ALIAS_STOR_FLASH	"ps3:8:0"
333 #define PS3_MODULE_ALIAS_SOUND		"ps3:9:0"
334 #define PS3_MODULE_ALIAS_GPU_FB		"ps3:10:1"
335 #define PS3_MODULE_ALIAS_GPU_RAMDISK	"ps3:10:2"
336 #define PS3_MODULE_ALIAS_LPM		"ps3:11:0"
337 
338 enum ps3_system_bus_device_type {
339 	PS3_DEVICE_TYPE_IOC0 = 1,
340 	PS3_DEVICE_TYPE_SB,
341 	PS3_DEVICE_TYPE_VUART,
342 	PS3_DEVICE_TYPE_LPM,
343 };
344 
345 /**
346  * struct ps3_system_bus_device - a device on the system bus
347  */
348 
349 struct ps3_system_bus_device {
350 	enum ps3_match_id match_id;
351 	enum ps3_match_sub_id match_sub_id;
352 	enum ps3_system_bus_device_type dev_type;
353 
354 	u64 bus_id;                       /* SB */
355 	u64 dev_id;                       /* SB */
356 	unsigned int interrupt_id;        /* SB */
357 	struct ps3_dma_region *d_region;  /* SB, IOC0 */
358 	struct ps3_mmio_region *m_region; /* SB, IOC0*/
359 	unsigned int port_number;         /* VUART */
360 	struct {                          /* LPM */
361 		u64 node_id;
362 		u64 pu_id;
363 		u64 rights;
364 	} lpm;
365 
366 /*	struct iommu_table *iommu_table; -- waiting for BenH's cleanups */
367 	struct device core;
368 	void *driver_priv; /* private driver variables */
369 };
370 
371 int ps3_open_hv_device(struct ps3_system_bus_device *dev);
372 int ps3_close_hv_device(struct ps3_system_bus_device *dev);
373 
374 /**
375  * struct ps3_system_bus_driver - a driver for a device on the system bus
376  */
377 
378 struct ps3_system_bus_driver {
379 	enum ps3_match_id match_id;
380 	enum ps3_match_sub_id match_sub_id;
381 	struct device_driver core;
382 	int (*probe)(struct ps3_system_bus_device *);
383 	void (*remove)(struct ps3_system_bus_device *);
384 	void (*shutdown)(struct ps3_system_bus_device *);
385 /*	int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */
386 /*	int (*resume)(struct ps3_system_bus_device *); */
387 };
388 
389 int ps3_system_bus_device_register(struct ps3_system_bus_device *dev);
390 int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv);
391 void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv);
392 
393 static inline struct ps3_system_bus_driver *ps3_drv_to_system_bus_drv(
394 	struct device_driver *_drv)
395 {
396 	return container_of(_drv, struct ps3_system_bus_driver, core);
397 }
398 static inline struct ps3_system_bus_device *ps3_dev_to_system_bus_dev(
399 	struct device *_dev)
400 {
401 	return container_of(_dev, struct ps3_system_bus_device, core);
402 }
403 static inline struct ps3_system_bus_driver *
404 	ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device *_dev)
405 {
406 	BUG_ON(!_dev);
407 	BUG_ON(!_dev->core.driver);
408 	return ps3_drv_to_system_bus_drv(_dev->core.driver);
409 }
410 
411 /**
412  * ps3_system_bus_set_drvdata -
413  * @dev: device structure
414  * @data: Data to set
415  */
416 
417 static inline void ps3_system_bus_set_drvdata(
418 	struct ps3_system_bus_device *dev, void *data)
419 {
420 	dev_set_drvdata(&dev->core, data);
421 }
422 static inline void *ps3_system_bus_get_drvdata(
423 	struct ps3_system_bus_device *dev)
424 {
425 	return dev_get_drvdata(&dev->core);
426 }
427 
428 /* These two need global scope for get_arch_dma_ops(). */
429 
430 extern struct bus_type ps3_system_bus_type;
431 
432 /* system manager */
433 
434 struct ps3_sys_manager_ops {
435 	struct ps3_system_bus_device *dev;
436 	void (*power_off)(struct ps3_system_bus_device *dev);
437 	void (*restart)(struct ps3_system_bus_device *dev);
438 };
439 
440 void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops);
441 void __noreturn ps3_sys_manager_power_off(void);
442 void __noreturn ps3_sys_manager_restart(void);
443 void __noreturn ps3_sys_manager_halt(void);
444 int ps3_sys_manager_get_wol(void);
445 void ps3_sys_manager_set_wol(int state);
446 
447 struct ps3_prealloc {
448     const char *name;
449     void *address;
450     unsigned long size;
451     unsigned long align;
452 };
453 
454 extern struct ps3_prealloc ps3fb_videomemory;
455 extern struct ps3_prealloc ps3flash_bounce_buffer;
456 
457 /* logical performance monitor */
458 
459 /**
460  * enum ps3_lpm_rights - Rigths granted by the system policy module.
461  *
462  * @PS3_LPM_RIGHTS_USE_LPM: The right to use the lpm.
463  * @PS3_LPM_RIGHTS_USE_TB: The right to use the internal trace buffer.
464  */
465 
466 enum ps3_lpm_rights {
467 	PS3_LPM_RIGHTS_USE_LPM = 0x001,
468 	PS3_LPM_RIGHTS_USE_TB = 0x100,
469 };
470 
471 /**
472  * enum ps3_lpm_tb_type - Type of trace buffer lv1 should use.
473  *
474  * @PS3_LPM_TB_TYPE_NONE: Do not use a trace buffer.
475  * @PS3_LPM_RIGHTS_USE_TB: Use the lv1 internal trace buffer.  Must have
476  *  rights @PS3_LPM_RIGHTS_USE_TB.
477  */
478 
479 enum ps3_lpm_tb_type {
480 	PS3_LPM_TB_TYPE_NONE = 0,
481 	PS3_LPM_TB_TYPE_INTERNAL = 1,
482 };
483 
484 int ps3_lpm_open(enum ps3_lpm_tb_type tb_type, void *tb_cache,
485 	u64 tb_cache_size);
486 int ps3_lpm_close(void);
487 int ps3_lpm_copy_tb(unsigned long offset, void *buf, unsigned long count,
488 	unsigned long *bytes_copied);
489 int ps3_lpm_copy_tb_to_user(unsigned long offset, void __user *buf,
490 	unsigned long count, unsigned long *bytes_copied);
491 void ps3_set_bookmark(u64 bookmark);
492 void ps3_set_pm_bookmark(u64 tag, u64 incident, u64 th_id);
493 int ps3_set_signal(u64 rtas_signal_group, u8 signal_bit, u16 sub_unit,
494 	u8 bus_word);
495 
496 u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr);
497 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
498 u32 ps3_read_ctr(u32 cpu, u32 ctr);
499 void ps3_write_ctr(u32 cpu, u32 ctr, u32 val);
500 
501 u32 ps3_read_pm07_control(u32 cpu, u32 ctr);
502 void ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val);
503 u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg);
504 void ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val);
505 
506 u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr);
507 void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
508 
509 void ps3_enable_pm(u32 cpu);
510 void ps3_disable_pm(u32 cpu);
511 void ps3_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
512 void ps3_disable_pm_interrupts(u32 cpu);
513 
514 u32 ps3_get_and_clear_pm_interrupts(u32 cpu);
515 void ps3_sync_irq(int node);
516 u32 ps3_get_hw_thread_id(int cpu);
517 u64 ps3_get_spe_id(void *arg);
518 
519 void ps3_early_mm_init(void);
520 
521 #endif
522