1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * arch/powerpc/platforms/83xx/mpc832x_rdb.c 4 * 5 * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved. 6 * 7 * Description: 8 * MPC832x RDB board specific routines. 9 * This file is based on mpc832x_mds.c and mpc8313_rdb.c 10 * Author: Michael Barkowski <michael.barkowski@freescale.com> 11 */ 12 13 #include <linux/pci.h> 14 #include <linux/interrupt.h> 15 #include <linux/spi/spi.h> 16 #include <linux/spi/mmc_spi.h> 17 #include <linux/mmc/host.h> 18 #include <linux/of_platform.h> 19 #include <linux/fsl_devices.h> 20 21 #include <asm/time.h> 22 #include <asm/ipic.h> 23 #include <asm/udbg.h> 24 #include <soc/fsl/qe/qe.h> 25 #include <soc/fsl/qe/qe_ic.h> 26 #include <sysdev/fsl_soc.h> 27 #include <sysdev/fsl_pci.h> 28 29 #include "mpc83xx.h" 30 31 #undef DEBUG 32 #ifdef DEBUG 33 #define DBG(fmt...) udbg_printf(fmt) 34 #else 35 #define DBG(fmt...) 36 #endif 37 38 #ifdef CONFIG_QUICC_ENGINE 39 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, 40 struct spi_board_info *board_infos, 41 unsigned int num_board_infos, 42 void (*cs_control)(struct spi_device *dev, 43 bool on)) 44 { 45 struct device_node *np; 46 unsigned int i = 0; 47 48 for_each_compatible_node(np, type, compatible) { 49 int ret; 50 unsigned int j; 51 const void *prop; 52 struct resource res[2]; 53 struct platform_device *pdev; 54 struct fsl_spi_platform_data pdata = { 55 .cs_control = cs_control, 56 }; 57 58 memset(res, 0, sizeof(res)); 59 60 pdata.sysclk = sysclk; 61 62 prop = of_get_property(np, "reg", NULL); 63 if (!prop) 64 goto err; 65 pdata.bus_num = *(u32 *)prop; 66 67 prop = of_get_property(np, "cell-index", NULL); 68 if (prop) 69 i = *(u32 *)prop; 70 71 prop = of_get_property(np, "mode", NULL); 72 if (prop && !strcmp(prop, "cpu-qe")) 73 pdata.flags = SPI_QE_CPU_MODE; 74 75 for (j = 0; j < num_board_infos; j++) { 76 if (board_infos[j].bus_num == pdata.bus_num) 77 pdata.max_chipselect++; 78 } 79 80 if (!pdata.max_chipselect) 81 continue; 82 83 ret = of_address_to_resource(np, 0, &res[0]); 84 if (ret) 85 goto err; 86 87 ret = of_irq_to_resource(np, 0, &res[1]); 88 if (ret <= 0) 89 goto err; 90 91 pdev = platform_device_alloc("mpc83xx_spi", i); 92 if (!pdev) 93 goto err; 94 95 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata)); 96 if (ret) 97 goto unreg; 98 99 ret = platform_device_add_resources(pdev, res, 100 ARRAY_SIZE(res)); 101 if (ret) 102 goto unreg; 103 104 ret = platform_device_add(pdev); 105 if (ret) 106 goto unreg; 107 108 goto next; 109 unreg: 110 platform_device_del(pdev); 111 err: 112 pr_err("%pOF: registration failed\n", np); 113 next: 114 i++; 115 } 116 117 return i; 118 } 119 120 static int __init fsl_spi_init(struct spi_board_info *board_infos, 121 unsigned int num_board_infos, 122 void (*cs_control)(struct spi_device *spi, 123 bool on)) 124 { 125 u32 sysclk = -1; 126 int ret; 127 128 /* SPI controller is either clocked from QE or SoC clock */ 129 sysclk = get_brgfreq(); 130 if (sysclk == -1) { 131 sysclk = fsl_get_sys_freq(); 132 if (sysclk == -1) 133 return -ENODEV; 134 } 135 136 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, 137 num_board_infos, cs_control); 138 if (!ret) 139 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos, 140 num_board_infos, cs_control); 141 142 return spi_register_board_info(board_infos, num_board_infos); 143 } 144 145 static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on) 146 { 147 pr_debug("%s %d %d\n", __func__, spi->chip_select, on); 148 par_io_data_set(3, 13, on); 149 } 150 151 static struct mmc_spi_platform_data mpc832x_mmc_pdata = { 152 .ocr_mask = MMC_VDD_33_34, 153 }; 154 155 static struct spi_board_info mpc832x_spi_boardinfo = { 156 .bus_num = 0x4c0, 157 .chip_select = 0, 158 .max_speed_hz = 50000000, 159 .modalias = "mmc_spi", 160 .platform_data = &mpc832x_mmc_pdata, 161 }; 162 163 static int __init mpc832x_spi_init(void) 164 { 165 par_io_config_pin(3, 0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */ 166 par_io_config_pin(3, 1, 3, 0, 1, 0); /* SPI1 MISO, I/O */ 167 par_io_config_pin(3, 2, 3, 0, 1, 0); /* SPI1 CLK, I/O */ 168 par_io_config_pin(3, 3, 2, 0, 1, 0); /* SPI1 SEL, I */ 169 170 par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS, O */ 171 par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */ 172 par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */ 173 174 /* 175 * Don't bother with legacy stuff when device tree contains 176 * mmc-spi-slot node. 177 */ 178 if (of_find_compatible_node(NULL, NULL, "mmc-spi-slot")) 179 return 0; 180 return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control); 181 } 182 machine_device_initcall(mpc832x_rdb, mpc832x_spi_init); 183 #endif /* CONFIG_QUICC_ENGINE */ 184 185 /* ************************************************************************ 186 * 187 * Setup the architecture 188 * 189 */ 190 static void __init mpc832x_rdb_setup_arch(void) 191 { 192 #if defined(CONFIG_QUICC_ENGINE) 193 struct device_node *np; 194 #endif 195 196 mpc83xx_setup_arch(); 197 198 #ifdef CONFIG_QUICC_ENGINE 199 if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { 200 par_io_init(np); 201 of_node_put(np); 202 203 for_each_node_by_name(np, "ucc") 204 par_io_of_config(np); 205 } 206 #endif /* CONFIG_QUICC_ENGINE */ 207 } 208 209 machine_device_initcall(mpc832x_rdb, mpc83xx_declare_of_platform_devices); 210 211 /* 212 * Called very early, MMU is off, device-tree isn't unflattened 213 */ 214 static int __init mpc832x_rdb_probe(void) 215 { 216 return of_machine_is_compatible("MPC832xRDB"); 217 } 218 219 define_machine(mpc832x_rdb) { 220 .name = "MPC832x RDB", 221 .probe = mpc832x_rdb_probe, 222 .setup_arch = mpc832x_rdb_setup_arch, 223 .init_IRQ = mpc83xx_ipic_and_qe_init_IRQ, 224 .get_irq = ipic_get_irq, 225 .restart = mpc83xx_restart, 226 .time_init = mpc83xx_time_init, 227 .calibrate_decr = generic_calibrate_decr, 228 .progress = udbg_progress, 229 }; 230