xref: /linux/arch/riscv/include/asm/cacheinfo.h (revision 38f5bd23)
1087958a1SYash Shah /* SPDX-License-Identifier: GPL-2.0 */
2*38f5bd23SZong Li /*
3*38f5bd23SZong Li  * Copyright (C) 2020 SiFive
4*38f5bd23SZong Li  */
5087958a1SYash Shah 
6087958a1SYash Shah #ifndef _ASM_RISCV_CACHEINFO_H
7087958a1SYash Shah #define _ASM_RISCV_CACHEINFO_H
8087958a1SYash Shah 
9087958a1SYash Shah #include <linux/cacheinfo.h>
10087958a1SYash Shah 
11087958a1SYash Shah struct riscv_cacheinfo_ops {
12087958a1SYash Shah 	const struct attribute_group * (*get_priv_group)(struct cacheinfo
13087958a1SYash Shah 							*this_leaf);
14087958a1SYash Shah };
15087958a1SYash Shah 
16087958a1SYash Shah void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops);
17*38f5bd23SZong Li uintptr_t get_cache_size(u32 level, enum cache_type type);
18*38f5bd23SZong Li uintptr_t get_cache_geometry(u32 level, enum cache_type type);
19087958a1SYash Shah 
20087958a1SYash Shah #endif /* _ASM_RISCV_CACHEINFO_H */
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