xref: /linux/arch/riscv/include/asm/gdb_xml.h (revision 2da68a77)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __ASM_GDB_XML_H_
4 #define __ASM_GDB_XML_H_
5 
6 const char riscv_gdb_stub_feature[64] =
7 			"PacketSize=800;qXfer:features:read+;";
8 
9 static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:";
10 
11 #ifdef CONFIG_64BIT
12 static const char gdb_xfer_read_cpuxml[39] =
13 			"qXfer:features:read:riscv-64bit-cpu.xml";
14 
15 static const char riscv_gdb_stub_target_desc[256] =
16 "l<?xml version=\"1.0\"?>"
17 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
18 "<target>"
19 "<xi:include href=\"riscv-64bit-cpu.xml\"/>"
20 "</target>";
21 
22 static const char riscv_gdb_stub_cpuxml[2048] =
23 "l<?xml version=\"1.0\"?>"
24 "<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">"
25 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
26 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>"
27 "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>"
28 "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>"
29 "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>"
30 "<reg name=\""DBG_REG_TP"\" bitsize=\"64\" type=\"data_ptr\"/>"
31 "<reg name=\""DBG_REG_T0"\" bitsize=\"64\" type=\"int\"/>"
32 "<reg name=\""DBG_REG_T1"\" bitsize=\"64\" type=\"int\"/>"
33 "<reg name=\""DBG_REG_T2"\" bitsize=\"64\" type=\"int\"/>"
34 "<reg name=\""DBG_REG_FP"\" bitsize=\"64\" type=\"data_ptr\"/>"
35 "<reg name=\""DBG_REG_S1"\" bitsize=\"64\" type=\"int\"/>"
36 "<reg name=\""DBG_REG_A0"\" bitsize=\"64\" type=\"int\"/>"
37 "<reg name=\""DBG_REG_A1"\" bitsize=\"64\" type=\"int\"/>"
38 "<reg name=\""DBG_REG_A2"\" bitsize=\"64\" type=\"int\"/>"
39 "<reg name=\""DBG_REG_A3"\" bitsize=\"64\" type=\"int\"/>"
40 "<reg name=\""DBG_REG_A4"\" bitsize=\"64\" type=\"int\"/>"
41 "<reg name=\""DBG_REG_A5"\" bitsize=\"64\" type=\"int\"/>"
42 "<reg name=\""DBG_REG_A6"\" bitsize=\"64\" type=\"int\"/>"
43 "<reg name=\""DBG_REG_A7"\" bitsize=\"64\" type=\"int\"/>"
44 "<reg name=\""DBG_REG_S2"\" bitsize=\"64\" type=\"int\"/>"
45 "<reg name=\""DBG_REG_S3"\" bitsize=\"64\" type=\"int\"/>"
46 "<reg name=\""DBG_REG_S4"\" bitsize=\"64\" type=\"int\"/>"
47 "<reg name=\""DBG_REG_S5"\" bitsize=\"64\" type=\"int\"/>"
48 "<reg name=\""DBG_REG_S6"\" bitsize=\"64\" type=\"int\"/>"
49 "<reg name=\""DBG_REG_S7"\" bitsize=\"64\" type=\"int\"/>"
50 "<reg name=\""DBG_REG_S8"\" bitsize=\"64\" type=\"int\"/>"
51 "<reg name=\""DBG_REG_S9"\" bitsize=\"64\" type=\"int\"/>"
52 "<reg name=\""DBG_REG_S10"\" bitsize=\"64\" type=\"int\"/>"
53 "<reg name=\""DBG_REG_S11"\" bitsize=\"64\" type=\"int\"/>"
54 "<reg name=\""DBG_REG_T3"\" bitsize=\"64\" type=\"int\"/>"
55 "<reg name=\""DBG_REG_T4"\" bitsize=\"64\" type=\"int\"/>"
56 "<reg name=\""DBG_REG_T5"\" bitsize=\"64\" type=\"int\"/>"
57 "<reg name=\""DBG_REG_T6"\" bitsize=\"64\" type=\"int\"/>"
58 "<reg name=\""DBG_REG_EPC"\" bitsize=\"64\" type=\"code_ptr\"/>"
59 "<reg name=\""DBG_REG_STATUS"\" bitsize=\"64\" type=\"int\"/>"
60 "<reg name=\""DBG_REG_BADADDR"\" bitsize=\"64\" type=\"int\"/>"
61 "<reg name=\""DBG_REG_CAUSE"\" bitsize=\"64\" type=\"int\"/>"
62 "</feature>";
63 #else
64 static const char gdb_xfer_read_cpuxml[39] =
65 			"qXfer:features:read:riscv-32bit-cpu.xml";
66 
67 static const char riscv_gdb_stub_target_desc[256] =
68 "l<?xml version=\"1.0\"?>"
69 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
70 "<target>"
71 "<xi:include href=\"riscv-32bit-cpu.xml\"/>"
72 "</target>";
73 
74 static const char riscv_gdb_stub_cpuxml[2048] =
75 "l<?xml version=\"1.0\"?>"
76 "<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">"
77 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
78 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"32\" type=\"int\" regnum=\"0\"/>"
79 "<reg name=\""DBG_REG_RA"\" bitsize=\"32\" type=\"code_ptr\"/>"
80 "<reg name=\""DBG_REG_SP"\" bitsize=\"32\" type=\"data_ptr\"/>"
81 "<reg name=\""DBG_REG_GP"\" bitsize=\"32\" type=\"data_ptr\"/>"
82 "<reg name=\""DBG_REG_TP"\" bitsize=\"32\" type=\"data_ptr\"/>"
83 "<reg name=\""DBG_REG_T0"\" bitsize=\"32\" type=\"int\"/>"
84 "<reg name=\""DBG_REG_T1"\" bitsize=\"32\" type=\"int\"/>"
85 "<reg name=\""DBG_REG_T2"\" bitsize=\"32\" type=\"int\"/>"
86 "<reg name=\""DBG_REG_FP"\" bitsize=\"32\" type=\"data_ptr\"/>"
87 "<reg name=\""DBG_REG_S1"\" bitsize=\"32\" type=\"int\"/>"
88 "<reg name=\""DBG_REG_A0"\" bitsize=\"32\" type=\"int\"/>"
89 "<reg name=\""DBG_REG_A1"\" bitsize=\"32\" type=\"int\"/>"
90 "<reg name=\""DBG_REG_A2"\" bitsize=\"32\" type=\"int\"/>"
91 "<reg name=\""DBG_REG_A3"\" bitsize=\"32\" type=\"int\"/>"
92 "<reg name=\""DBG_REG_A4"\" bitsize=\"32\" type=\"int\"/>"
93 "<reg name=\""DBG_REG_A5"\" bitsize=\"32\" type=\"int\"/>"
94 "<reg name=\""DBG_REG_A6"\" bitsize=\"32\" type=\"int\"/>"
95 "<reg name=\""DBG_REG_A7"\" bitsize=\"32\" type=\"int\"/>"
96 "<reg name=\""DBG_REG_S2"\" bitsize=\"32\" type=\"int\"/>"
97 "<reg name=\""DBG_REG_S3"\" bitsize=\"32\" type=\"int\"/>"
98 "<reg name=\""DBG_REG_S4"\" bitsize=\"32\" type=\"int\"/>"
99 "<reg name=\""DBG_REG_S5"\" bitsize=\"32\" type=\"int\"/>"
100 "<reg name=\""DBG_REG_S6"\" bitsize=\"32\" type=\"int\"/>"
101 "<reg name=\""DBG_REG_S7"\" bitsize=\"32\" type=\"int\"/>"
102 "<reg name=\""DBG_REG_S8"\" bitsize=\"32\" type=\"int\"/>"
103 "<reg name=\""DBG_REG_S9"\" bitsize=\"32\" type=\"int\"/>"
104 "<reg name=\""DBG_REG_S10"\" bitsize=\"32\" type=\"int\"/>"
105 "<reg name=\""DBG_REG_S11"\" bitsize=\"32\" type=\"int\"/>"
106 "<reg name=\""DBG_REG_T3"\" bitsize=\"32\" type=\"int\"/>"
107 "<reg name=\""DBG_REG_T4"\" bitsize=\"32\" type=\"int\"/>"
108 "<reg name=\""DBG_REG_T5"\" bitsize=\"32\" type=\"int\"/>"
109 "<reg name=\""DBG_REG_T6"\" bitsize=\"32\" type=\"int\"/>"
110 "<reg name=\""DBG_REG_EPC"\" bitsize=\"32\" type=\"code_ptr\"/>"
111 "<reg name=\""DBG_REG_STATUS"\" bitsize=\"32\" type=\"int\"/>"
112 "<reg name=\""DBG_REG_BADADDR"\" bitsize=\"32\" type=\"int\"/>"
113 "<reg name=\""DBG_REG_CAUSE"\" bitsize=\"32\" type=\"int\"/>"
114 "</feature>";
115 #endif
116 #endif
117