1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 7 #ifndef _ASM_RISCV_IRQFLAGS_H 8 #define _ASM_RISCV_IRQFLAGS_H 9 10 #include <asm/processor.h> 11 #include <asm/csr.h> 12 13 /* read interrupt enabled status */ 14 static inline unsigned long arch_local_save_flags(void) 15 { 16 return csr_read(CSR_SSTATUS); 17 } 18 19 /* unconditionally enable interrupts */ 20 static inline void arch_local_irq_enable(void) 21 { 22 csr_set(CSR_SSTATUS, SR_SIE); 23 } 24 25 /* unconditionally disable interrupts */ 26 static inline void arch_local_irq_disable(void) 27 { 28 csr_clear(CSR_SSTATUS, SR_SIE); 29 } 30 31 /* get status and disable interrupts */ 32 static inline unsigned long arch_local_irq_save(void) 33 { 34 return csr_read_clear(CSR_SSTATUS, SR_SIE); 35 } 36 37 /* test flags */ 38 static inline int arch_irqs_disabled_flags(unsigned long flags) 39 { 40 return !(flags & SR_SIE); 41 } 42 43 /* test hardware interrupt enable bit */ 44 static inline int arch_irqs_disabled(void) 45 { 46 return arch_irqs_disabled_flags(arch_local_save_flags()); 47 } 48 49 /* set interrupt enabled status */ 50 static inline void arch_local_irq_restore(unsigned long flags) 51 { 52 csr_set(CSR_SSTATUS, flags & SR_SIE); 53 } 54 55 #endif /* _ASM_RISCV_IRQFLAGS_H */ 56