xref: /linux/arch/riscv/kernel/smp.c (revision 84b9b44b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * SMP initialisation and IPI support
4  * Based on arch/arm64/kernel/smp.c
5  *
6  * Copyright (C) 2012 ARM Ltd.
7  * Copyright (C) 2015 Regents of the University of California
8  * Copyright (C) 2017 SiFive
9  */
10 
11 #include <linux/cpu.h>
12 #include <linux/clockchips.h>
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/kexec.h>
16 #include <linux/percpu.h>
17 #include <linux/profile.h>
18 #include <linux/smp.h>
19 #include <linux/sched.h>
20 #include <linux/seq_file.h>
21 #include <linux/delay.h>
22 #include <linux/irq.h>
23 #include <linux/irq_work.h>
24 
25 #include <asm/tlbflush.h>
26 #include <asm/cacheflush.h>
27 #include <asm/cpu_ops.h>
28 
29 enum ipi_message_type {
30 	IPI_RESCHEDULE,
31 	IPI_CALL_FUNC,
32 	IPI_CPU_STOP,
33 	IPI_CPU_CRASH_STOP,
34 	IPI_IRQ_WORK,
35 	IPI_TIMER,
36 	IPI_MAX
37 };
38 
39 unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
40 	[0 ... NR_CPUS-1] = INVALID_HARTID
41 };
42 
43 void __init smp_setup_processor_id(void)
44 {
45 	cpuid_to_hartid_map(0) = boot_cpu_hartid;
46 }
47 
48 static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
49 static int ipi_virq_base __ro_after_init;
50 static int nr_ipi __ro_after_init = IPI_MAX;
51 static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
52 
53 int riscv_hartid_to_cpuid(unsigned long hartid)
54 {
55 	int i;
56 
57 	for (i = 0; i < NR_CPUS; i++)
58 		if (cpuid_to_hartid_map(i) == hartid)
59 			return i;
60 
61 	pr_err("Couldn't find cpu id for hartid [%lu]\n", hartid);
62 	return -ENOENT;
63 }
64 
65 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
66 {
67 	return phys_id == cpuid_to_hartid_map(cpu);
68 }
69 
70 static void ipi_stop(void)
71 {
72 	set_cpu_online(smp_processor_id(), false);
73 	while (1)
74 		wait_for_interrupt();
75 }
76 
77 #ifdef CONFIG_KEXEC_CORE
78 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
79 
80 static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
81 {
82 	crash_save_cpu(regs, cpu);
83 
84 	atomic_dec(&waiting_for_crash_ipi);
85 
86 	local_irq_disable();
87 
88 #ifdef CONFIG_HOTPLUG_CPU
89 	if (cpu_has_hotplug(cpu))
90 		cpu_ops[cpu]->cpu_stop();
91 #endif
92 
93 	for(;;)
94 		wait_for_interrupt();
95 }
96 #else
97 static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
98 {
99 	unreachable();
100 }
101 #endif
102 
103 static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
104 {
105 	__ipi_send_mask(ipi_desc[op], mask);
106 }
107 
108 static void send_ipi_single(int cpu, enum ipi_message_type op)
109 {
110 	__ipi_send_mask(ipi_desc[op], cpumask_of(cpu));
111 }
112 
113 #ifdef CONFIG_IRQ_WORK
114 void arch_irq_work_raise(void)
115 {
116 	send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
117 }
118 #endif
119 
120 static irqreturn_t handle_IPI(int irq, void *data)
121 {
122 	int ipi = irq - ipi_virq_base;
123 
124 	switch (ipi) {
125 	case IPI_RESCHEDULE:
126 		scheduler_ipi();
127 		break;
128 	case IPI_CALL_FUNC:
129 		generic_smp_call_function_interrupt();
130 		break;
131 	case IPI_CPU_STOP:
132 		ipi_stop();
133 		break;
134 	case IPI_CPU_CRASH_STOP:
135 		ipi_cpu_crash_stop(smp_processor_id(), get_irq_regs());
136 		break;
137 	case IPI_IRQ_WORK:
138 		irq_work_run();
139 		break;
140 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
141 	case IPI_TIMER:
142 		tick_receive_broadcast();
143 		break;
144 #endif
145 	default:
146 		pr_warn("CPU%d: unhandled IPI%d\n", smp_processor_id(), ipi);
147 		break;
148 	}
149 
150 	return IRQ_HANDLED;
151 }
152 
153 void riscv_ipi_enable(void)
154 {
155 	int i;
156 
157 	if (WARN_ON_ONCE(!ipi_virq_base))
158 		return;
159 
160 	for (i = 0; i < nr_ipi; i++)
161 		enable_percpu_irq(ipi_virq_base + i, 0);
162 }
163 
164 void riscv_ipi_disable(void)
165 {
166 	int i;
167 
168 	if (WARN_ON_ONCE(!ipi_virq_base))
169 		return;
170 
171 	for (i = 0; i < nr_ipi; i++)
172 		disable_percpu_irq(ipi_virq_base + i);
173 }
174 
175 bool riscv_ipi_have_virq_range(void)
176 {
177 	return (ipi_virq_base) ? true : false;
178 }
179 
180 DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
181 EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
182 
183 void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
184 {
185 	int i, err;
186 
187 	if (WARN_ON(ipi_virq_base))
188 		return;
189 
190 	WARN_ON(nr < IPI_MAX);
191 	nr_ipi = min(nr, IPI_MAX);
192 	ipi_virq_base = virq;
193 
194 	/* Request IPIs */
195 	for (i = 0; i < nr_ipi; i++) {
196 		err = request_percpu_irq(ipi_virq_base + i, handle_IPI,
197 					 "IPI", &ipi_dummy_dev);
198 		WARN_ON(err);
199 
200 		ipi_desc[i] = irq_to_desc(ipi_virq_base + i);
201 		irq_set_status_flags(ipi_virq_base + i, IRQ_HIDDEN);
202 	}
203 
204 	/* Enabled IPIs for boot CPU immediately */
205 	riscv_ipi_enable();
206 
207 	/* Update RFENCE static key */
208 	if (use_for_rfence)
209 		static_branch_enable(&riscv_ipi_for_rfence);
210 	else
211 		static_branch_disable(&riscv_ipi_for_rfence);
212 }
213 
214 static const char * const ipi_names[] = {
215 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
216 	[IPI_CALL_FUNC]		= "Function call interrupts",
217 	[IPI_CPU_STOP]		= "CPU stop interrupts",
218 	[IPI_CPU_CRASH_STOP]	= "CPU stop (for crash dump) interrupts",
219 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
220 	[IPI_TIMER]		= "Timer broadcast interrupts",
221 };
222 
223 void show_ipi_stats(struct seq_file *p, int prec)
224 {
225 	unsigned int cpu, i;
226 
227 	for (i = 0; i < IPI_MAX; i++) {
228 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
229 			   prec >= 4 ? " " : "");
230 		for_each_online_cpu(cpu)
231 			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
232 		seq_printf(p, " %s\n", ipi_names[i]);
233 	}
234 }
235 
236 void arch_send_call_function_ipi_mask(struct cpumask *mask)
237 {
238 	send_ipi_mask(mask, IPI_CALL_FUNC);
239 }
240 
241 void arch_send_call_function_single_ipi(int cpu)
242 {
243 	send_ipi_single(cpu, IPI_CALL_FUNC);
244 }
245 
246 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
247 void tick_broadcast(const struct cpumask *mask)
248 {
249 	send_ipi_mask(mask, IPI_TIMER);
250 }
251 #endif
252 
253 void smp_send_stop(void)
254 {
255 	unsigned long timeout;
256 
257 	if (num_online_cpus() > 1) {
258 		cpumask_t mask;
259 
260 		cpumask_copy(&mask, cpu_online_mask);
261 		cpumask_clear_cpu(smp_processor_id(), &mask);
262 
263 		if (system_state <= SYSTEM_RUNNING)
264 			pr_crit("SMP: stopping secondary CPUs\n");
265 		send_ipi_mask(&mask, IPI_CPU_STOP);
266 	}
267 
268 	/* Wait up to one second for other CPUs to stop */
269 	timeout = USEC_PER_SEC;
270 	while (num_online_cpus() > 1 && timeout--)
271 		udelay(1);
272 
273 	if (num_online_cpus() > 1)
274 		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
275 			   cpumask_pr_args(cpu_online_mask));
276 }
277 
278 #ifdef CONFIG_KEXEC_CORE
279 /*
280  * The number of CPUs online, not counting this CPU (which may not be
281  * fully online and so not counted in num_online_cpus()).
282  */
283 static inline unsigned int num_other_online_cpus(void)
284 {
285 	unsigned int this_cpu_online = cpu_online(smp_processor_id());
286 
287 	return num_online_cpus() - this_cpu_online;
288 }
289 
290 void crash_smp_send_stop(void)
291 {
292 	static int cpus_stopped;
293 	cpumask_t mask;
294 	unsigned long timeout;
295 
296 	/*
297 	 * This function can be called twice in panic path, but obviously
298 	 * we execute this only once.
299 	 */
300 	if (cpus_stopped)
301 		return;
302 
303 	cpus_stopped = 1;
304 
305 	/*
306 	 * If this cpu is the only one alive at this point in time, online or
307 	 * not, there are no stop messages to be sent around, so just back out.
308 	 */
309 	if (num_other_online_cpus() == 0)
310 		return;
311 
312 	cpumask_copy(&mask, cpu_online_mask);
313 	cpumask_clear_cpu(smp_processor_id(), &mask);
314 
315 	atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
316 
317 	pr_crit("SMP: stopping secondary CPUs\n");
318 	send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
319 
320 	/* Wait up to one second for other CPUs to stop */
321 	timeout = USEC_PER_SEC;
322 	while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
323 		udelay(1);
324 
325 	if (atomic_read(&waiting_for_crash_ipi) > 0)
326 		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
327 			cpumask_pr_args(&mask));
328 }
329 
330 bool smp_crash_stop_failed(void)
331 {
332 	return (atomic_read(&waiting_for_crash_ipi) > 0);
333 }
334 #endif
335 
336 void arch_smp_send_reschedule(int cpu)
337 {
338 	send_ipi_single(cpu, IPI_RESCHEDULE);
339 }
340 EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
341