xref: /linux/arch/x86/kernel/vmlinux.lds.S (revision 9a6b55ac)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
7 * Modernisation, unification and other changes and fixes:
8 *   Copyright (C) 2007-2009  Sam Ravnborg <sam@ravnborg.org>
9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#ifdef CONFIG_X86_32
19#define LOAD_OFFSET __PAGE_OFFSET
20#else
21#define LOAD_OFFSET __START_KERNEL_map
22#endif
23
24#define EMITS_PT_NOTE
25#define RO_EXCEPTION_TABLE_ALIGN	16
26
27#include <asm-generic/vmlinux.lds.h>
28#include <asm/asm-offsets.h>
29#include <asm/thread_info.h>
30#include <asm/page_types.h>
31#include <asm/orc_lookup.h>
32#include <asm/cache.h>
33#include <asm/boot.h>
34
35#undef i386     /* in case the preprocessor is a 32bit one */
36
37OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
38
39#ifdef CONFIG_X86_32
40OUTPUT_ARCH(i386)
41ENTRY(phys_startup_32)
42jiffies = jiffies_64;
43#else
44OUTPUT_ARCH(i386:x86-64)
45ENTRY(phys_startup_64)
46jiffies_64 = jiffies;
47#endif
48
49#if defined(CONFIG_X86_64)
50/*
51 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
52 * boundaries spanning kernel text, rodata and data sections.
53 *
54 * However, kernel identity mappings will have different RWX permissions
55 * to the pages mapping to text and to the pages padding (which are freed) the
56 * text section. Hence kernel identity mappings will be broken to smaller
57 * pages. For 64-bit, kernel text and kernel identity mappings are different,
58 * so we can enable protection checks as well as retain 2MB large page
59 * mappings for kernel text.
60 */
61#define X86_ALIGN_RODATA_BEGIN	. = ALIGN(HPAGE_SIZE);
62
63#define X86_ALIGN_RODATA_END					\
64		. = ALIGN(HPAGE_SIZE);				\
65		__end_rodata_hpage_align = .;			\
66		__end_rodata_aligned = .;
67
68#define ALIGN_ENTRY_TEXT_BEGIN	. = ALIGN(PMD_SIZE);
69#define ALIGN_ENTRY_TEXT_END	. = ALIGN(PMD_SIZE);
70
71/*
72 * This section contains data which will be mapped as decrypted. Memory
73 * encryption operates on a page basis. Make this section PMD-aligned
74 * to avoid splitting the pages while mapping the section early.
75 *
76 * Note: We use a separate section so that only this section gets
77 * decrypted to avoid exposing more than we wish.
78 */
79#define BSS_DECRYPTED						\
80	. = ALIGN(PMD_SIZE);					\
81	__start_bss_decrypted = .;				\
82	*(.bss..decrypted);					\
83	. = ALIGN(PAGE_SIZE);					\
84	__start_bss_decrypted_unused = .;			\
85	. = ALIGN(PMD_SIZE);					\
86	__end_bss_decrypted = .;				\
87
88#else
89
90#define X86_ALIGN_RODATA_BEGIN
91#define X86_ALIGN_RODATA_END					\
92		. = ALIGN(PAGE_SIZE);				\
93		__end_rodata_aligned = .;
94
95#define ALIGN_ENTRY_TEXT_BEGIN
96#define ALIGN_ENTRY_TEXT_END
97#define BSS_DECRYPTED
98
99#endif
100
101PHDRS {
102	text PT_LOAD FLAGS(5);          /* R_E */
103	data PT_LOAD FLAGS(6);          /* RW_ */
104#ifdef CONFIG_X86_64
105#ifdef CONFIG_SMP
106	percpu PT_LOAD FLAGS(6);        /* RW_ */
107#endif
108	init PT_LOAD FLAGS(7);          /* RWE */
109#endif
110	note PT_NOTE FLAGS(0);          /* ___ */
111}
112
113SECTIONS
114{
115#ifdef CONFIG_X86_32
116	. = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
117	phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
118#else
119	. = __START_KERNEL;
120	phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
121#endif
122
123	/* Text and read-only data */
124	.text :  AT(ADDR(.text) - LOAD_OFFSET) {
125		_text = .;
126		_stext = .;
127		/* bootstrapping code */
128		HEAD_TEXT
129		TEXT_TEXT
130		SCHED_TEXT
131		CPUIDLE_TEXT
132		LOCK_TEXT
133		KPROBES_TEXT
134		ALIGN_ENTRY_TEXT_BEGIN
135		ENTRY_TEXT
136		IRQENTRY_TEXT
137		ALIGN_ENTRY_TEXT_END
138		SOFTIRQENTRY_TEXT
139		*(.fixup)
140		*(.gnu.warning)
141
142#ifdef CONFIG_RETPOLINE
143		__indirect_thunk_start = .;
144		*(.text.__x86.indirect_thunk)
145		__indirect_thunk_end = .;
146#endif
147	} :text =0xcccc
148
149	/* End of text section, which should occupy whole number of pages */
150	_etext = .;
151	. = ALIGN(PAGE_SIZE);
152
153	X86_ALIGN_RODATA_BEGIN
154	RO_DATA(PAGE_SIZE)
155	X86_ALIGN_RODATA_END
156
157	/* Data */
158	.data : AT(ADDR(.data) - LOAD_OFFSET) {
159		/* Start of data section */
160		_sdata = .;
161
162		/* init_task */
163		INIT_TASK_DATA(THREAD_SIZE)
164
165#ifdef CONFIG_X86_32
166		/* 32 bit has nosave before _edata */
167		NOSAVE_DATA
168#endif
169
170		PAGE_ALIGNED_DATA(PAGE_SIZE)
171
172		CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
173
174		DATA_DATA
175		CONSTRUCTORS
176
177		/* rarely changed data like cpu maps */
178		READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
179
180		/* End of data section */
181		_edata = .;
182	} :data
183
184	BUG_TABLE
185
186	ORC_UNWIND_TABLE
187
188	. = ALIGN(PAGE_SIZE);
189	__vvar_page = .;
190
191	.vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
192		/* work around gold bug 13023 */
193		__vvar_beginning_hack = .;
194
195		/* Place all vvars at the offsets in asm/vvar.h. */
196#define EMIT_VVAR(name, offset) 			\
197		. = __vvar_beginning_hack + offset;	\
198		*(.vvar_ ## name)
199#define __VVAR_KERNEL_LDS
200#include <asm/vvar.h>
201#undef __VVAR_KERNEL_LDS
202#undef EMIT_VVAR
203
204		/*
205		 * Pad the rest of the page with zeros.  Otherwise the loader
206		 * can leave garbage here.
207		 */
208		. = __vvar_beginning_hack + PAGE_SIZE;
209	} :data
210
211	. = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
212
213	/* Init code and data - will be freed after init */
214	. = ALIGN(PAGE_SIZE);
215	.init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
216		__init_begin = .; /* paired with __init_end */
217	}
218
219#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
220	/*
221	 * percpu offsets are zero-based on SMP.  PERCPU_VADDR() changes the
222	 * output PHDR, so the next output section - .init.text - should
223	 * start another segment - init.
224	 */
225	PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
226	ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
227	       "per-CPU data too large - increase CONFIG_PHYSICAL_START")
228#endif
229
230	INIT_TEXT_SECTION(PAGE_SIZE)
231#ifdef CONFIG_X86_64
232	:init
233#endif
234
235	/*
236	 * Section for code used exclusively before alternatives are run. All
237	 * references to such code must be patched out by alternatives, normally
238	 * by using X86_FEATURE_ALWAYS CPU feature bit.
239	 *
240	 * See static_cpu_has() for an example.
241	 */
242	.altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
243		*(.altinstr_aux)
244	}
245
246	INIT_DATA_SECTION(16)
247
248	.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
249		__x86_cpu_dev_start = .;
250		*(.x86_cpu_dev.init)
251		__x86_cpu_dev_end = .;
252	}
253
254#ifdef CONFIG_X86_INTEL_MID
255	.x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
256								LOAD_OFFSET) {
257		__x86_intel_mid_dev_start = .;
258		*(.x86_intel_mid_dev.init)
259		__x86_intel_mid_dev_end = .;
260	}
261#endif
262
263	/*
264	 * start address and size of operations which during runtime
265	 * can be patched with virtualization friendly instructions or
266	 * baremetal native ones. Think page table operations.
267	 * Details in paravirt_types.h
268	 */
269	. = ALIGN(8);
270	.parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
271		__parainstructions = .;
272		*(.parainstructions)
273		__parainstructions_end = .;
274	}
275
276	/*
277	 * struct alt_inst entries. From the header (alternative.h):
278	 * "Alternative instructions for different CPU types or capabilities"
279	 * Think locking instructions on spinlocks.
280	 */
281	. = ALIGN(8);
282	.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
283		__alt_instructions = .;
284		*(.altinstructions)
285		__alt_instructions_end = .;
286	}
287
288	/*
289	 * And here are the replacement instructions. The linker sticks
290	 * them as binary blobs. The .altinstructions has enough data to
291	 * get the address and the length of them to patch the kernel safely.
292	 */
293	.altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
294		*(.altinstr_replacement)
295	}
296
297	/*
298	 * struct iommu_table_entry entries are injected in this section.
299	 * It is an array of IOMMUs which during run time gets sorted depending
300	 * on its dependency order. After rootfs_initcall is complete
301	 * this section can be safely removed.
302	 */
303	.iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
304		__iommu_table = .;
305		*(.iommu_table)
306		__iommu_table_end = .;
307	}
308
309	. = ALIGN(8);
310	.apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
311		__apicdrivers = .;
312		*(.apicdrivers);
313		__apicdrivers_end = .;
314	}
315
316	. = ALIGN(8);
317	/*
318	 * .exit.text is discard at runtime, not link time, to deal with
319	 *  references from .altinstructions and .eh_frame
320	 */
321	.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
322		EXIT_TEXT
323	}
324
325	.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
326		EXIT_DATA
327	}
328
329#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
330	PERCPU_SECTION(INTERNODE_CACHE_BYTES)
331#endif
332
333	. = ALIGN(PAGE_SIZE);
334
335	/* freed after init ends here */
336	.init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
337		__init_end = .;
338	}
339
340	/*
341	 * smp_locks might be freed after init
342	 * start/end must be page aligned
343	 */
344	. = ALIGN(PAGE_SIZE);
345	.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
346		__smp_locks = .;
347		*(.smp_locks)
348		. = ALIGN(PAGE_SIZE);
349		__smp_locks_end = .;
350	}
351
352#ifdef CONFIG_X86_64
353	.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
354		NOSAVE_DATA
355	}
356#endif
357
358	/* BSS */
359	. = ALIGN(PAGE_SIZE);
360	.bss : AT(ADDR(.bss) - LOAD_OFFSET) {
361		__bss_start = .;
362		*(.bss..page_aligned)
363		*(BSS_MAIN)
364		BSS_DECRYPTED
365		. = ALIGN(PAGE_SIZE);
366		__bss_stop = .;
367	}
368
369	/*
370	 * The memory occupied from _text to here, __end_of_kernel_reserve, is
371	 * automatically reserved in setup_arch(). Anything after here must be
372	 * explicitly reserved using memblock_reserve() or it will be discarded
373	 * and treated as available memory.
374	 */
375	__end_of_kernel_reserve = .;
376
377	. = ALIGN(PAGE_SIZE);
378	.brk : AT(ADDR(.brk) - LOAD_OFFSET) {
379		__brk_base = .;
380		. += 64 * 1024;		/* 64k alignment slop space */
381		*(.brk_reservation)	/* areas brk users have reserved */
382		__brk_limit = .;
383	}
384
385	. = ALIGN(PAGE_SIZE);		/* keep VO_INIT_SIZE page aligned */
386	_end = .;
387
388#ifdef CONFIG_AMD_MEM_ENCRYPT
389	/*
390	 * Early scratch/workarea section: Lives outside of the kernel proper
391	 * (_text - _end).
392	 *
393	 * Resides after _end because even though the .brk section is after
394	 * __end_of_kernel_reserve, the .brk section is later reserved as a
395	 * part of the kernel. Since it is located after __end_of_kernel_reserve
396	 * it will be discarded and become part of the available memory. As
397	 * such, it can only be used by very early boot code and must not be
398	 * needed afterwards.
399	 *
400	 * Currently used by SME for performing in-place encryption of the
401	 * kernel during boot. Resides on a 2MB boundary to simplify the
402	 * pagetable setup used for SME in-place encryption.
403	 */
404	. = ALIGN(HPAGE_SIZE);
405	.init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
406		__init_scratch_begin = .;
407		*(.init.scratch)
408		. = ALIGN(HPAGE_SIZE);
409		__init_scratch_end = .;
410	}
411#endif
412
413	STABS_DEBUG
414	DWARF_DEBUG
415
416	DISCARDS
417	/DISCARD/ : {
418		*(.eh_frame)
419	}
420}
421
422
423#ifdef CONFIG_X86_32
424/*
425 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
426 */
427. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
428	   "kernel image bigger than KERNEL_IMAGE_SIZE");
429#else
430/*
431 * Per-cpu symbols which need to be offset from __per_cpu_load
432 * for the boot processor.
433 */
434#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
435INIT_PER_CPU(gdt_page);
436INIT_PER_CPU(fixed_percpu_data);
437INIT_PER_CPU(irq_stack_backing_store);
438
439/*
440 * Build-time check on the image size:
441 */
442. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
443	   "kernel image bigger than KERNEL_IMAGE_SIZE");
444
445#ifdef CONFIG_SMP
446. = ASSERT((fixed_percpu_data == 0),
447           "fixed_percpu_data is not at start of per-cpu area");
448#endif
449
450#endif /* CONFIG_X86_32 */
451
452#ifdef CONFIG_KEXEC_CORE
453#include <asm/kexec.h>
454
455. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
456           "kexec control code size is too big");
457#endif
458
459