1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2020 MediaTek Inc. 4 * Copyright (c) 2020 BayLibre, SAS 5 * Author: James Liao <jamesjj.liao@mediatek.com> 6 * Fabien Parent <fparent@baylibre.com> 7 */ 8 9 #include <linux/clk-provider.h> 10 #include <linux/of.h> 11 #include <linux/of_address.h> 12 #include <linux/of_device.h> 13 #include <linux/platform_device.h> 14 15 #include "clk-mtk.h" 16 #include "clk-gate.h" 17 18 #include <dt-bindings/clock/mt8167-clk.h> 19 20 static const struct mtk_gate_regs img_cg_regs = { 21 .set_ofs = 0x4, 22 .clr_ofs = 0x8, 23 .sta_ofs = 0x0, 24 }; 25 26 #define GATE_IMG(_id, _name, _parent, _shift) { \ 27 .id = _id, \ 28 .name = _name, \ 29 .parent_name = _parent, \ 30 .regs = &img_cg_regs, \ 31 .shift = _shift, \ 32 .ops = &mtk_clk_gate_ops_setclr, \ 33 } 34 35 static const struct mtk_gate img_clks[] __initconst = { 36 GATE_IMG(CLK_IMG_LARB1_SMI, "img_larb1_smi", "smi_mm", 0), 37 GATE_IMG(CLK_IMG_CAM_SMI, "img_cam_smi", "smi_mm", 5), 38 GATE_IMG(CLK_IMG_CAM_CAM, "img_cam_cam", "smi_mm", 6), 39 GATE_IMG(CLK_IMG_SEN_TG, "img_sen_tg", "cam_mm", 7), 40 GATE_IMG(CLK_IMG_SEN_CAM, "img_sen_cam", "smi_mm", 8), 41 GATE_IMG(CLK_IMG_VENC, "img_venc", "smi_mm", 9), 42 }; 43 44 static void __init mtk_imgsys_init(struct device_node *node) 45 { 46 struct clk_hw_onecell_data *clk_data; 47 int r; 48 49 clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK); 50 51 mtk_clk_register_gates(NULL, node, img_clks, ARRAY_SIZE(img_clks), clk_data); 52 53 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); 54 55 if (r) 56 pr_err("%s(): could not register clock provider: %d\n", 57 __func__, r); 58 59 } 60 CLK_OF_DECLARE(mtk_imgsys, "mediatek,mt8167-imgsys", mtk_imgsys_init); 61