1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * comedi/drivers/ni_routing/ni_device_routes/pci-6713.c 4 * List of valid routes for specific NI boards. 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 /* 21 * The contents of this file are generated using the tools in 22 * comedi/drivers/ni_routing/tools 23 * 24 * Please use those tools to help maintain the contents of this file. 25 */ 26 27 #include "../ni_device_routes.h" 28 #include "all.h" 29 30 struct ni_device_routes ni_pci_6713_device_routes = { 31 .device = "pci-6713", 32 .routes = (struct ni_route_set[]){ 33 { 34 .dest = NI_PFI(3), 35 .src = (int[]){ 36 NI_CtrSource(1), 37 0, /* Termination */ 38 } 39 }, 40 { 41 .dest = NI_PFI(4), 42 .src = (int[]){ 43 NI_CtrGate(1), 44 0, /* Termination */ 45 } 46 }, 47 { 48 .dest = NI_PFI(5), 49 .src = (int[]){ 50 NI_AO_SampleClock, 51 0, /* Termination */ 52 } 53 }, 54 { 55 .dest = NI_PFI(6), 56 .src = (int[]){ 57 NI_AO_StartTrigger, 58 0, /* Termination */ 59 } 60 }, 61 { 62 .dest = NI_PFI(8), 63 .src = (int[]){ 64 NI_CtrSource(0), 65 0, /* Termination */ 66 } 67 }, 68 { 69 .dest = NI_PFI(9), 70 .src = (int[]){ 71 NI_CtrGate(0), 72 0, /* Termination */ 73 } 74 }, 75 { 76 .dest = TRIGGER_LINE(0), 77 .src = (int[]){ 78 NI_CtrSource(0), 79 NI_CtrGate(0), 80 NI_CtrInternalOutput(0), 81 NI_CtrOut(0), 82 NI_AO_SampleClock, 83 NI_AO_StartTrigger, 84 0, /* Termination */ 85 } 86 }, 87 { 88 .dest = TRIGGER_LINE(1), 89 .src = (int[]){ 90 NI_CtrSource(0), 91 NI_CtrGate(0), 92 NI_CtrInternalOutput(0), 93 NI_CtrOut(0), 94 NI_AO_SampleClock, 95 NI_AO_StartTrigger, 96 0, /* Termination */ 97 } 98 }, 99 { 100 .dest = TRIGGER_LINE(2), 101 .src = (int[]){ 102 NI_CtrSource(0), 103 NI_CtrGate(0), 104 NI_CtrInternalOutput(0), 105 NI_CtrOut(0), 106 NI_AO_SampleClock, 107 NI_AO_StartTrigger, 108 0, /* Termination */ 109 } 110 }, 111 { 112 .dest = TRIGGER_LINE(3), 113 .src = (int[]){ 114 NI_CtrSource(0), 115 NI_CtrGate(0), 116 NI_CtrInternalOutput(0), 117 NI_CtrOut(0), 118 NI_AO_SampleClock, 119 NI_AO_StartTrigger, 120 0, /* Termination */ 121 } 122 }, 123 { 124 .dest = TRIGGER_LINE(4), 125 .src = (int[]){ 126 NI_CtrSource(0), 127 NI_CtrGate(0), 128 NI_CtrInternalOutput(0), 129 NI_CtrOut(0), 130 NI_AO_SampleClock, 131 NI_AO_StartTrigger, 132 0, /* Termination */ 133 } 134 }, 135 { 136 .dest = TRIGGER_LINE(5), 137 .src = (int[]){ 138 NI_CtrSource(0), 139 NI_CtrGate(0), 140 NI_CtrInternalOutput(0), 141 NI_CtrOut(0), 142 NI_AO_SampleClock, 143 NI_AO_StartTrigger, 144 0, /* Termination */ 145 } 146 }, 147 { 148 .dest = TRIGGER_LINE(6), 149 .src = (int[]){ 150 NI_CtrSource(0), 151 NI_CtrGate(0), 152 NI_CtrInternalOutput(0), 153 NI_CtrOut(0), 154 NI_AO_SampleClock, 155 NI_AO_StartTrigger, 156 0, /* Termination */ 157 } 158 }, 159 { 160 .dest = TRIGGER_LINE(7), 161 .src = (int[]){ 162 NI_20MHzTimebase, 163 0, /* Termination */ 164 } 165 }, 166 { 167 .dest = NI_CtrSource(0), 168 .src = (int[]){ 169 NI_PFI(0), 170 NI_PFI(1), 171 NI_PFI(2), 172 NI_PFI(3), 173 NI_PFI(4), 174 NI_PFI(5), 175 NI_PFI(6), 176 NI_PFI(7), 177 NI_PFI(8), 178 NI_PFI(9), 179 TRIGGER_LINE(0), 180 TRIGGER_LINE(1), 181 TRIGGER_LINE(2), 182 TRIGGER_LINE(3), 183 TRIGGER_LINE(4), 184 TRIGGER_LINE(5), 185 TRIGGER_LINE(6), 186 TRIGGER_LINE(7), 187 NI_MasterTimebase, 188 NI_20MHzTimebase, 189 NI_100kHzTimebase, 190 0, /* Termination */ 191 } 192 }, 193 { 194 .dest = NI_CtrSource(1), 195 .src = (int[]){ 196 NI_PFI(0), 197 NI_PFI(1), 198 NI_PFI(2), 199 NI_PFI(3), 200 NI_PFI(4), 201 NI_PFI(5), 202 NI_PFI(6), 203 NI_PFI(7), 204 NI_PFI(8), 205 NI_PFI(9), 206 TRIGGER_LINE(0), 207 TRIGGER_LINE(1), 208 TRIGGER_LINE(2), 209 TRIGGER_LINE(3), 210 TRIGGER_LINE(4), 211 TRIGGER_LINE(5), 212 TRIGGER_LINE(6), 213 TRIGGER_LINE(7), 214 NI_MasterTimebase, 215 NI_20MHzTimebase, 216 NI_100kHzTimebase, 217 0, /* Termination */ 218 } 219 }, 220 { 221 .dest = NI_CtrGate(0), 222 .src = (int[]){ 223 NI_PFI(0), 224 NI_PFI(1), 225 NI_PFI(2), 226 NI_PFI(3), 227 NI_PFI(4), 228 NI_PFI(5), 229 NI_PFI(6), 230 NI_PFI(7), 231 NI_PFI(8), 232 NI_PFI(9), 233 TRIGGER_LINE(0), 234 TRIGGER_LINE(1), 235 TRIGGER_LINE(2), 236 TRIGGER_LINE(3), 237 TRIGGER_LINE(4), 238 TRIGGER_LINE(5), 239 TRIGGER_LINE(6), 240 NI_CtrInternalOutput(1), 241 0, /* Termination */ 242 } 243 }, 244 { 245 .dest = NI_CtrGate(1), 246 .src = (int[]){ 247 NI_PFI(0), 248 NI_PFI(1), 249 NI_PFI(2), 250 NI_PFI(3), 251 NI_PFI(4), 252 NI_PFI(5), 253 NI_PFI(6), 254 NI_PFI(7), 255 NI_PFI(8), 256 NI_PFI(9), 257 TRIGGER_LINE(0), 258 TRIGGER_LINE(1), 259 TRIGGER_LINE(2), 260 TRIGGER_LINE(3), 261 TRIGGER_LINE(4), 262 TRIGGER_LINE(5), 263 TRIGGER_LINE(6), 264 NI_CtrInternalOutput(0), 265 0, /* Termination */ 266 } 267 }, 268 { 269 .dest = NI_CtrOut(0), 270 .src = (int[]){ 271 TRIGGER_LINE(0), 272 TRIGGER_LINE(1), 273 TRIGGER_LINE(2), 274 TRIGGER_LINE(3), 275 TRIGGER_LINE(4), 276 TRIGGER_LINE(5), 277 TRIGGER_LINE(6), 278 NI_CtrInternalOutput(0), 279 0, /* Termination */ 280 } 281 }, 282 { 283 .dest = NI_CtrOut(1), 284 .src = (int[]){ 285 NI_CtrInternalOutput(1), 286 0, /* Termination */ 287 } 288 }, 289 { 290 .dest = NI_AO_SampleClock, 291 .src = (int[]){ 292 NI_PFI(0), 293 NI_PFI(1), 294 NI_PFI(2), 295 NI_PFI(3), 296 NI_PFI(4), 297 NI_PFI(5), 298 NI_PFI(6), 299 NI_PFI(7), 300 NI_PFI(8), 301 NI_PFI(9), 302 TRIGGER_LINE(0), 303 TRIGGER_LINE(1), 304 TRIGGER_LINE(2), 305 TRIGGER_LINE(3), 306 TRIGGER_LINE(4), 307 TRIGGER_LINE(5), 308 TRIGGER_LINE(6), 309 NI_CtrInternalOutput(1), 310 NI_AO_SampleClockTimebase, 311 0, /* Termination */ 312 } 313 }, 314 { 315 .dest = NI_AO_SampleClockTimebase, 316 .src = (int[]){ 317 NI_PFI(0), 318 NI_PFI(1), 319 NI_PFI(2), 320 NI_PFI(3), 321 NI_PFI(4), 322 NI_PFI(5), 323 NI_PFI(6), 324 NI_PFI(7), 325 NI_PFI(8), 326 NI_PFI(9), 327 TRIGGER_LINE(0), 328 TRIGGER_LINE(1), 329 TRIGGER_LINE(2), 330 TRIGGER_LINE(3), 331 TRIGGER_LINE(4), 332 TRIGGER_LINE(5), 333 TRIGGER_LINE(6), 334 TRIGGER_LINE(7), 335 NI_MasterTimebase, 336 NI_20MHzTimebase, 337 NI_100kHzTimebase, 338 0, /* Termination */ 339 } 340 }, 341 { 342 .dest = NI_AO_StartTrigger, 343 .src = (int[]){ 344 NI_PFI(0), 345 NI_PFI(1), 346 NI_PFI(2), 347 NI_PFI(3), 348 NI_PFI(4), 349 NI_PFI(5), 350 NI_PFI(6), 351 NI_PFI(7), 352 NI_PFI(8), 353 NI_PFI(9), 354 TRIGGER_LINE(0), 355 TRIGGER_LINE(1), 356 TRIGGER_LINE(2), 357 TRIGGER_LINE(3), 358 TRIGGER_LINE(4), 359 TRIGGER_LINE(5), 360 TRIGGER_LINE(6), 361 0, /* Termination */ 362 } 363 }, 364 { 365 .dest = NI_AO_PauseTrigger, 366 .src = (int[]){ 367 NI_PFI(0), 368 NI_PFI(1), 369 NI_PFI(2), 370 NI_PFI(3), 371 NI_PFI(4), 372 NI_PFI(5), 373 NI_PFI(6), 374 NI_PFI(7), 375 NI_PFI(8), 376 NI_PFI(9), 377 TRIGGER_LINE(0), 378 TRIGGER_LINE(1), 379 TRIGGER_LINE(2), 380 TRIGGER_LINE(3), 381 TRIGGER_LINE(4), 382 TRIGGER_LINE(5), 383 TRIGGER_LINE(6), 384 0, /* Termination */ 385 } 386 }, 387 { 388 .dest = NI_MasterTimebase, 389 .src = (int[]){ 390 TRIGGER_LINE(7), 391 NI_20MHzTimebase, 392 0, /* Termination */ 393 } 394 }, 395 { /* Termination of list */ 396 .dest = 0, 397 }, 398 }, 399 }; 400