1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2016 Linaro.
4  * Viresh Kumar <viresh.kumar@linaro.org>
5  */
6 
7 #include <linux/err.h>
8 #include <linux/of.h>
9 #include <linux/of_device.h>
10 #include <linux/platform_device.h>
11 
12 #include "cpufreq-dt.h"
13 
14 /*
15  * Machines for which the cpufreq device is *always* created, mostly used for
16  * platforms using "operating-points" (V1) property.
17  */
18 static const struct of_device_id whitelist[] __initconst = {
19 	{ .compatible = "allwinner,sun4i-a10", },
20 	{ .compatible = "allwinner,sun5i-a10s", },
21 	{ .compatible = "allwinner,sun5i-a13", },
22 	{ .compatible = "allwinner,sun5i-r8", },
23 	{ .compatible = "allwinner,sun6i-a31", },
24 	{ .compatible = "allwinner,sun6i-a31s", },
25 	{ .compatible = "allwinner,sun7i-a20", },
26 	{ .compatible = "allwinner,sun8i-a23", },
27 	{ .compatible = "allwinner,sun8i-a83t", },
28 	{ .compatible = "allwinner,sun8i-h3", },
29 
30 	{ .compatible = "apm,xgene-shadowcat", },
31 
32 	{ .compatible = "arm,integrator-ap", },
33 	{ .compatible = "arm,integrator-cp", },
34 
35 	{ .compatible = "hisilicon,hi3660", },
36 
37 	{ .compatible = "fsl,imx27", },
38 	{ .compatible = "fsl,imx51", },
39 	{ .compatible = "fsl,imx53", },
40 	{ .compatible = "fsl,imx7d", },
41 
42 	{ .compatible = "marvell,berlin", },
43 	{ .compatible = "marvell,pxa250", },
44 	{ .compatible = "marvell,pxa270", },
45 
46 	{ .compatible = "samsung,exynos3250", },
47 	{ .compatible = "samsung,exynos4210", },
48 	{ .compatible = "samsung,exynos5250", },
49 #ifndef CONFIG_BL_SWITCHER
50 	{ .compatible = "samsung,exynos5800", },
51 #endif
52 
53 	{ .compatible = "renesas,emev2", },
54 	{ .compatible = "renesas,r7s72100", },
55 	{ .compatible = "renesas,r8a73a4", },
56 	{ .compatible = "renesas,r8a7740", },
57 	{ .compatible = "renesas,r8a7743", },
58 	{ .compatible = "renesas,r8a7744", },
59 	{ .compatible = "renesas,r8a7745", },
60 	{ .compatible = "renesas,r8a7778", },
61 	{ .compatible = "renesas,r8a7779", },
62 	{ .compatible = "renesas,r8a7790", },
63 	{ .compatible = "renesas,r8a7791", },
64 	{ .compatible = "renesas,r8a7792", },
65 	{ .compatible = "renesas,r8a7793", },
66 	{ .compatible = "renesas,r8a7794", },
67 	{ .compatible = "renesas,sh73a0", },
68 
69 	{ .compatible = "rockchip,rk2928", },
70 	{ .compatible = "rockchip,rk3036", },
71 	{ .compatible = "rockchip,rk3066a", },
72 	{ .compatible = "rockchip,rk3066b", },
73 	{ .compatible = "rockchip,rk3188", },
74 	{ .compatible = "rockchip,rk3228", },
75 	{ .compatible = "rockchip,rk3288", },
76 	{ .compatible = "rockchip,rk3328", },
77 	{ .compatible = "rockchip,rk3366", },
78 	{ .compatible = "rockchip,rk3368", },
79 	{ .compatible = "rockchip,rk3399",
80 	  .data = &(struct cpufreq_dt_platform_data)
81 		{ .have_governor_per_policy = true, },
82 	},
83 
84 	{ .compatible = "st-ericsson,u8500", },
85 	{ .compatible = "st-ericsson,u8540", },
86 	{ .compatible = "st-ericsson,u9500", },
87 	{ .compatible = "st-ericsson,u9540", },
88 
89 	{ .compatible = "ti,omap2", },
90 	{ .compatible = "ti,omap3", },
91 	{ .compatible = "ti,omap4", },
92 	{ .compatible = "ti,omap5", },
93 
94 	{ .compatible = "xlnx,zynq-7000", },
95 	{ .compatible = "xlnx,zynqmp", },
96 
97 	{ }
98 };
99 
100 /*
101  * Machines for which the cpufreq device is *not* created, mostly used for
102  * platforms using "operating-points-v2" property.
103  */
104 static const struct of_device_id blacklist[] __initconst = {
105 	{ .compatible = "calxeda,highbank", },
106 	{ .compatible = "calxeda,ecx-2000", },
107 
108 	{ .compatible = "marvell,armadaxp", },
109 
110 	{ .compatible = "mediatek,mt2701", },
111 	{ .compatible = "mediatek,mt2712", },
112 	{ .compatible = "mediatek,mt7622", },
113 	{ .compatible = "mediatek,mt7623", },
114 	{ .compatible = "mediatek,mt817x", },
115 	{ .compatible = "mediatek,mt8173", },
116 	{ .compatible = "mediatek,mt8176", },
117 
118 	{ .compatible = "nvidia,tegra124", },
119 	{ .compatible = "nvidia,tegra210", },
120 
121 	{ .compatible = "qcom,apq8096", },
122 	{ .compatible = "qcom,msm8996", },
123 
124 	{ .compatible = "st,stih407", },
125 	{ .compatible = "st,stih410", },
126 
127 	{ .compatible = "sigma,tango4", },
128 
129 	{ .compatible = "ti,am33xx", },
130 	{ .compatible = "ti,am43", },
131 	{ .compatible = "ti,dra7", },
132 
133 	{ }
134 };
135 
136 static bool __init cpu0_node_has_opp_v2_prop(void)
137 {
138 	struct device_node *np = of_cpu_device_node_get(0);
139 	bool ret = false;
140 
141 	if (of_get_property(np, "operating-points-v2", NULL))
142 		ret = true;
143 
144 	of_node_put(np);
145 	return ret;
146 }
147 
148 static int __init cpufreq_dt_platdev_init(void)
149 {
150 	struct device_node *np = of_find_node_by_path("/");
151 	const struct of_device_id *match;
152 	const void *data = NULL;
153 
154 	if (!np)
155 		return -ENODEV;
156 
157 	match = of_match_node(whitelist, np);
158 	if (match) {
159 		data = match->data;
160 		goto create_pdev;
161 	}
162 
163 	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
164 		goto create_pdev;
165 
166 	of_node_put(np);
167 	return -ENODEV;
168 
169 create_pdev:
170 	of_node_put(np);
171 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
172 			       -1, data,
173 			       sizeof(struct cpufreq_dt_platform_data)));
174 }
175 device_initcall(cpufreq_dt_platdev_init);
176