1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019 HiSilicon Limited. */ 3 #ifndef __HISI_HPRE_H 4 #define __HISI_HPRE_H 5 6 #include <linux/list.h> 7 #include "../qm.h" 8 9 #define HPRE_SQE_SIZE sizeof(struct hpre_sqe) 10 #define HPRE_PF_DEF_Q_NUM 64 11 #define HPRE_PF_DEF_Q_BASE 0 12 13 enum { 14 HPRE_CLUSTER0, 15 HPRE_CLUSTER1, 16 HPRE_CLUSTER2, 17 HPRE_CLUSTER3, 18 HPRE_CLUSTERS_NUM, 19 }; 20 21 enum hpre_ctrl_dbgfs_file { 22 HPRE_CURRENT_QM, 23 HPRE_CLEAR_ENABLE, 24 HPRE_CLUSTER_CTRL, 25 HPRE_DEBUG_FILE_NUM, 26 }; 27 28 #define HPRE_DEBUGFS_FILE_NUM (HPRE_DEBUG_FILE_NUM + HPRE_CLUSTERS_NUM - 1) 29 30 struct hpre_debugfs_file { 31 int index; 32 enum hpre_ctrl_dbgfs_file type; 33 spinlock_t lock; 34 struct hpre_debug *debug; 35 }; 36 37 /* 38 * One HPRE controller has one PF and multiple VFs, some global configurations 39 * which PF has need this structure. 40 * Just relevant for PF. 41 */ 42 struct hpre_debug { 43 struct dentry *debug_root; 44 struct hpre_debugfs_file files[HPRE_DEBUGFS_FILE_NUM]; 45 }; 46 47 struct hpre { 48 struct hisi_qm qm; 49 struct list_head list; 50 struct hpre_debug debug; 51 u32 num_vfs; 52 unsigned long status; 53 }; 54 55 enum hpre_alg_type { 56 HPRE_ALG_NC_NCRT = 0x0, 57 HPRE_ALG_NC_CRT = 0x1, 58 HPRE_ALG_KG_STD = 0x2, 59 HPRE_ALG_KG_CRT = 0x3, 60 HPRE_ALG_DH_G2 = 0x4, 61 HPRE_ALG_DH = 0x5, 62 }; 63 64 struct hpre_sqe { 65 __le32 dw0; 66 __u8 task_len1; 67 __u8 task_len2; 68 __u8 mrttest_num; 69 __u8 resv1; 70 __le64 key; 71 __le64 in; 72 __le64 out; 73 __le16 tag; 74 __le16 resv2; 75 #define _HPRE_SQE_ALIGN_EXT 7 76 __le32 rsvd1[_HPRE_SQE_ALIGN_EXT]; 77 }; 78 79 struct hpre *hpre_find_device(int node); 80 int hpre_algs_register(void); 81 void hpre_algs_unregister(void); 82 83 #endif 84