1bf0a60b7SAlex Deucher /*
2bf0a60b7SAlex Deucher * Copyright 2018 Advanced Micro Devices, Inc.
3bf0a60b7SAlex Deucher *
4bf0a60b7SAlex Deucher * Permission is hereby granted, free of charge, to any person obtaining a
5bf0a60b7SAlex Deucher * copy of this software and associated documentation files (the "Software"),
6bf0a60b7SAlex Deucher * to deal in the Software without restriction, including without limitation
7bf0a60b7SAlex Deucher * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8bf0a60b7SAlex Deucher * and/or sell copies of the Software, and to permit persons to whom the
9bf0a60b7SAlex Deucher * Software is furnished to do so, subject to the following conditions:
10bf0a60b7SAlex Deucher *
11bf0a60b7SAlex Deucher * The above copyright notice and this permission notice shall be included in
12bf0a60b7SAlex Deucher * all copies or substantial portions of the Software.
13bf0a60b7SAlex Deucher *
14bf0a60b7SAlex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15bf0a60b7SAlex Deucher * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16bf0a60b7SAlex Deucher * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17bf0a60b7SAlex Deucher * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18bf0a60b7SAlex Deucher * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19bf0a60b7SAlex Deucher * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20bf0a60b7SAlex Deucher * OTHER DEALINGS IN THE SOFTWARE.
21bf0a60b7SAlex Deucher *
22bf0a60b7SAlex Deucher */
23bf0a60b7SAlex Deucher #include "amdgpu.h"
24bf0a60b7SAlex Deucher #include "gfxhub_v1_1.h"
25bf0a60b7SAlex Deucher
26bf0a60b7SAlex Deucher #include "gc/gc_9_2_1_offset.h"
27bf0a60b7SAlex Deucher #include "gc/gc_9_2_1_sh_mask.h"
28bf0a60b7SAlex Deucher
29bf0a60b7SAlex Deucher #include "soc15_common.h"
30bf0a60b7SAlex Deucher
313cbb3a97SRajneesh Bhardwaj #define mmMC_VM_XGMI_LFB_CNTL_ALDE 0x0978
323cbb3a97SRajneesh Bhardwaj #define mmMC_VM_XGMI_LFB_CNTL_ALDE_BASE_IDX 0
333cbb3a97SRajneesh Bhardwaj #define mmMC_VM_XGMI_LFB_SIZE_ALDE 0x0979
343cbb3a97SRajneesh Bhardwaj #define mmMC_VM_XGMI_LFB_SIZE_ALDE_BASE_IDX 0
353cbb3a97SRajneesh Bhardwaj //MC_VM_XGMI_LFB_CNTL
363cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_CNTL_ALDE__PF_LFB_REGION__SHIFT 0x0
373cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_CNTL_ALDE__PF_MAX_REGION__SHIFT 0x4
383cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_CNTL_ALDE__PF_LFB_REGION_MASK 0x0000000FL
393cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_CNTL_ALDE__PF_MAX_REGION_MASK 0x000000F0L
403cbb3a97SRajneesh Bhardwaj //MC_VM_XGMI_LFB_SIZE
413cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_SIZE_ALDE__PF_LFB_SIZE__SHIFT 0x0
423cbb3a97SRajneesh Bhardwaj #define MC_VM_XGMI_LFB_SIZE_ALDE__PF_LFB_SIZE_MASK 0x0001FFFFL
433cbb3a97SRajneesh Bhardwaj
gfxhub_v1_1_get_xgmi_info(struct amdgpu_device * adev)4421470d97SKevin Wang int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev)
45bf0a60b7SAlex Deucher {
463cbb3a97SRajneesh Bhardwaj u32 max_num_physical_nodes;
473cbb3a97SRajneesh Bhardwaj u32 max_physical_node_id;
483cbb3a97SRajneesh Bhardwaj u32 xgmi_lfb_cntl;
493cbb3a97SRajneesh Bhardwaj u32 max_region;
503cbb3a97SRajneesh Bhardwaj u64 seg_size;
513cbb3a97SRajneesh Bhardwaj
523cbb3a97SRajneesh Bhardwaj if (adev->asic_type == CHIP_ALDEBARAN) {
533cbb3a97SRajneesh Bhardwaj xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL_ALDE);
543cbb3a97SRajneesh Bhardwaj seg_size = REG_GET_FIELD(
553cbb3a97SRajneesh Bhardwaj RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE_ALDE),
563cbb3a97SRajneesh Bhardwaj MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24;
57*72c148d7SOak Zeng max_region =
58*72c148d7SOak Zeng REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, PF_MAX_REGION);
593cbb3a97SRajneesh Bhardwaj } else {
603cbb3a97SRajneesh Bhardwaj xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL);
613cbb3a97SRajneesh Bhardwaj seg_size = REG_GET_FIELD(
623cbb3a97SRajneesh Bhardwaj RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE),
633cbb3a97SRajneesh Bhardwaj MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24;
643cbb3a97SRajneesh Bhardwaj max_region =
65bf0a60b7SAlex Deucher REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);
66*72c148d7SOak Zeng }
67*72c148d7SOak Zeng
683cbb3a97SRajneesh Bhardwaj
69f0312f45SJohn Clements
70f0312f45SJohn Clements switch (adev->asic_type) {
71f0312f45SJohn Clements case CHIP_VEGA20:
72f0312f45SJohn Clements max_num_physical_nodes = 4;
73f0312f45SJohn Clements max_physical_node_id = 3;
74f0312f45SJohn Clements break;
75f0312f45SJohn Clements case CHIP_ARCTURUS:
76f0312f45SJohn Clements max_num_physical_nodes = 8;
77f0312f45SJohn Clements max_physical_node_id = 7;
78f0312f45SJohn Clements break;
793cbb3a97SRajneesh Bhardwaj case CHIP_ALDEBARAN:
80f2bd514dSHawking Zhang max_num_physical_nodes = 16;
81f2bd514dSHawking Zhang max_physical_node_id = 15;
823cbb3a97SRajneesh Bhardwaj break;
83f0312f45SJohn Clements default:
84f0312f45SJohn Clements return -EINVAL;
85f0312f45SJohn Clements }
86bf0a60b7SAlex Deucher
87bf0a60b7SAlex Deucher /* PF_MAX_REGION=0 means xgmi is disabled */
883cbb3a97SRajneesh Bhardwaj if (max_region || adev->gmc.xgmi.connected_to_cpu) {
89bf0a60b7SAlex Deucher adev->gmc.xgmi.num_physical_nodes = max_region + 1;
903cbb3a97SRajneesh Bhardwaj
91f0312f45SJohn Clements if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes)
92bf0a60b7SAlex Deucher return -EINVAL;
93bf0a60b7SAlex Deucher
94*72c148d7SOak Zeng if (adev->asic_type == CHIP_ALDEBARAN) {
95*72c148d7SOak Zeng adev->gmc.xgmi.physical_node_id =
96*72c148d7SOak Zeng REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE,
97*72c148d7SOak Zeng PF_LFB_REGION);
98*72c148d7SOak Zeng } else {
99bf0a60b7SAlex Deucher adev->gmc.xgmi.physical_node_id =
1003cbb3a97SRajneesh Bhardwaj REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL,
1013cbb3a97SRajneesh Bhardwaj PF_LFB_REGION);
102*72c148d7SOak Zeng }
1033cbb3a97SRajneesh Bhardwaj
104f0312f45SJohn Clements if (adev->gmc.xgmi.physical_node_id > max_physical_node_id)
105bf0a60b7SAlex Deucher return -EINVAL;
1063cbb3a97SRajneesh Bhardwaj
1073cbb3a97SRajneesh Bhardwaj adev->gmc.xgmi.node_segment_size = seg_size;
108bf0a60b7SAlex Deucher }
109bf0a60b7SAlex Deucher
110bf0a60b7SAlex Deucher return 0;
111bf0a60b7SAlex Deucher }
112