1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include <drm/drm_crtc.h>
27 
28 #include "amdgpu.h"
29 #include "amdgpu_dm.h"
30 #include "dc.h"
31 
32 enum amdgpu_dm_pipe_crc_source {
33 	AMDGPU_DM_PIPE_CRC_SOURCE_NONE = 0,
34 	AMDGPU_DM_PIPE_CRC_SOURCE_AUTO,
35 	AMDGPU_DM_PIPE_CRC_SOURCE_MAX,
36 	AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1,
37 };
38 
39 static enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const char *source)
40 {
41 	if (!source || !strcmp(source, "none"))
42 		return AMDGPU_DM_PIPE_CRC_SOURCE_NONE;
43 	if (!strcmp(source, "auto"))
44 		return AMDGPU_DM_PIPE_CRC_SOURCE_AUTO;
45 
46 	return AMDGPU_DM_PIPE_CRC_SOURCE_INVALID;
47 }
48 
49 int
50 amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
51 				 size_t *values_cnt)
52 {
53 	enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name);
54 
55 	if (source < 0) {
56 		DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
57 				 src_name, crtc->index);
58 		return -EINVAL;
59 	}
60 
61 	*values_cnt = 3;
62 	return 0;
63 }
64 
65 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)
66 {
67 	struct amdgpu_device *adev = crtc->dev->dev_private;
68 	struct dm_crtc_state *crtc_state = to_dm_crtc_state(crtc->state);
69 	struct dc_stream_state *stream_state = crtc_state->stream;
70 	bool enable;
71 
72 	enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name);
73 
74 	if (source < 0) {
75 		DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
76 				 src_name, crtc->index);
77 		return -EINVAL;
78 	}
79 
80 	if (!stream_state) {
81 		DRM_ERROR("No stream state for CRTC%d\n", crtc->index);
82 		return -EINVAL;
83 	}
84 
85 	enable = (source == AMDGPU_DM_PIPE_CRC_SOURCE_AUTO);
86 
87 	mutex_lock(&adev->dm.dc_lock);
88 	if (!dc_stream_configure_crc(stream_state->ctx->dc, stream_state,
89 				     enable, enable)) {
90 		mutex_unlock(&adev->dm.dc_lock);
91 		return -EINVAL;
92 	}
93 
94 	/* When enabling CRC, we should also disable dithering. */
95 	dc_stream_set_dither_option(stream_state,
96 				    enable ? DITHER_OPTION_TRUN8
97 					   : DITHER_OPTION_DEFAULT);
98 
99 	mutex_unlock(&adev->dm.dc_lock);
100 
101 	/*
102 	 * Reading the CRC requires the vblank interrupt handler to be
103 	 * enabled. Keep a reference until CRC capture stops.
104 	 */
105 	if (!crtc_state->crc_enabled && enable)
106 		drm_crtc_vblank_get(crtc);
107 	else if (crtc_state->crc_enabled && !enable)
108 		drm_crtc_vblank_put(crtc);
109 
110 	crtc_state->crc_enabled = enable;
111 
112 	/* Reset crc_skipped on dm state */
113 	crtc_state->crc_skip_count = 0;
114 	return 0;
115 }
116 
117 /**
118  * amdgpu_dm_crtc_handle_crc_irq: Report to DRM the CRC on given CRTC.
119  * @crtc: DRM CRTC object.
120  *
121  * This function should be called at the end of a vblank, when the fb has been
122  * fully processed through the pipe.
123  */
124 void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc)
125 {
126 	struct dm_crtc_state *crtc_state;
127 	struct dc_stream_state *stream_state;
128 	uint32_t crcs[3];
129 
130 	if (crtc == NULL)
131 		return;
132 
133 	crtc_state = to_dm_crtc_state(crtc->state);
134 	stream_state = crtc_state->stream;
135 
136 	/* Early return if CRC capture is not enabled. */
137 	if (!crtc_state->crc_enabled)
138 		return;
139 
140 	/*
141 	 * Since flipping and crc enablement happen asynchronously, we - more
142 	 * often than not - will be returning an 'uncooked' crc on first frame.
143 	 * Probably because hw isn't ready yet. For added security, skip the
144 	 * first two CRC values.
145 	 */
146 	if (crtc_state->crc_skip_count < 2) {
147 		crtc_state->crc_skip_count += 1;
148 		return;
149 	}
150 
151 	if (!dc_stream_get_crc(stream_state->ctx->dc, stream_state,
152 			       &crcs[0], &crcs[1], &crcs[2]))
153 		return;
154 
155 	drm_crtc_add_crc_entry(crtc, true,
156 			       drm_crtc_accurate_vblank_count(crtc), crcs);
157 }
158