1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * This file defines helper functions provided by the Display Manager to 28 * Display Core. 29 */ 30 #ifndef __DM_HELPERS__ 31 #define __DM_HELPERS__ 32 33 #include "dc_types.h" 34 #include "dc.h" 35 36 struct dp_mst_stream_allocation_table; 37 struct aux_payload; 38 enum aux_return_code_type; 39 40 /* 41 * Allocate memory accessible by the GPU 42 * 43 * frame buffer allocations must be aligned to a 4096-byte boundary 44 * 45 * Returns virtual address, sets addr to physical address 46 */ 47 void *dm_helpers_allocate_gpu_mem( 48 struct dc_context *ctx, 49 enum dc_gpu_mem_alloc_type type, 50 size_t size, 51 long long *addr); 52 53 /* 54 * Free the GPU-accessible memory at the virtual address pvMem 55 */ 56 void dm_helpers_free_gpu_mem( 57 struct dc_context *ctx, 58 enum dc_gpu_mem_alloc_type type, 59 void *pvMem); 60 61 enum dc_edid_status dm_helpers_parse_edid_caps( 62 struct dc_link *link, 63 const struct dc_edid *edid, 64 struct dc_edid_caps *edid_caps); 65 66 67 /* 68 * Update DP branch info 69 */ 70 void dm_helpers_dp_update_branch_info( 71 struct dc_context *ctx, 72 const struct dc_link *link); 73 74 /* 75 * Writes payload allocation table in immediate downstream device. 76 */ 77 bool dm_helpers_dp_mst_write_payload_allocation_table( 78 struct dc_context *ctx, 79 const struct dc_stream_state *stream, 80 struct dp_mst_stream_allocation_table *proposed_table, 81 bool enable); 82 83 /* 84 * poll pending down reply 85 */ 86 void dm_helpers_dp_mst_poll_pending_down_reply( 87 struct dc_context *ctx, 88 const struct dc_link *link); 89 90 /* 91 * Clear payload allocation table before enable MST DP link. 92 */ 93 void dm_helpers_dp_mst_clear_payload_allocation_table( 94 struct dc_context *ctx, 95 const struct dc_link *link); 96 97 /* 98 * Polls for ACT (allocation change trigger) handled and 99 */ 100 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger( 101 struct dc_context *ctx, 102 const struct dc_stream_state *stream); 103 /* 104 * Sends ALLOCATE_PAYLOAD message. 105 */ 106 bool dm_helpers_dp_mst_send_payload_allocation( 107 struct dc_context *ctx, 108 const struct dc_stream_state *stream, 109 bool enable); 110 111 bool dm_helpers_dp_mst_start_top_mgr( 112 struct dc_context *ctx, 113 const struct dc_link *link, 114 bool boot); 115 116 bool dm_helpers_dp_mst_stop_top_mgr( 117 struct dc_context *ctx, 118 struct dc_link *link); 119 /** 120 * OS specific aux read callback. 121 */ 122 bool dm_helpers_dp_read_dpcd( 123 struct dc_context *ctx, 124 const struct dc_link *link, 125 uint32_t address, 126 uint8_t *data, 127 uint32_t size); 128 129 /** 130 * OS specific aux write callback. 131 */ 132 bool dm_helpers_dp_write_dpcd( 133 struct dc_context *ctx, 134 const struct dc_link *link, 135 uint32_t address, 136 const uint8_t *data, 137 uint32_t size); 138 139 bool dm_helpers_submit_i2c( 140 struct dc_context *ctx, 141 const struct dc_link *link, 142 struct i2c_command *cmd); 143 144 bool dm_helpers_dp_write_dsc_enable( 145 struct dc_context *ctx, 146 const struct dc_stream_state *stream, 147 bool enable 148 ); 149 bool dm_helpers_is_dp_sink_present( 150 struct dc_link *link); 151 152 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream); 153 154 enum dc_edid_status dm_helpers_read_local_edid( 155 struct dc_context *ctx, 156 struct dc_link *link, 157 struct dc_sink *sink); 158 159 void dm_set_dcn_clocks( 160 struct dc_context *ctx, 161 struct dc_clocks *clks); 162 163 #if defined(CONFIG_DRM_AMD_DC_DCN) 164 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable); 165 #endif 166 167 void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz); 168 169 bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable); 170 171 void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us); 172 173 // 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy 174 #define IS_SMU_TIMEOUT(result) \ 175 (result == 0x0) 176 177 int dm_helper_dmub_aux_transfer_sync( 178 struct dc_context *ctx, 179 const struct dc_link *link, 180 struct aux_payload *payload, 181 enum aux_return_code_type *operation_result); 182 enum set_config_status; 183 int dm_helpers_dmub_set_config_sync(struct dc_context *ctx, 184 const struct dc_link *link, 185 struct set_config_cmd_payload *payload, 186 enum set_config_status *operation_result); 187 188 enum dc_edid_status dm_helpers_get_sbios_edid(struct dc_link *link, struct dc_edid *edid); 189 190 #endif /* __DM_HELPERS__ */ 191