xref: /linux/drivers/gpu/drm/amd/display/dc/dsc/dscc_types.h (revision 0be3ff0c)
1 
2 /*
3  * Copyright 2017 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: AMD
24  *
25  */
26 #ifndef __DSCC_TYPES_H__
27 #define __DSCC_TYPES_H__
28 
29 #include <drm/drm_dsc.h>
30 
31 #ifndef NUM_BUF_RANGES
32 #define NUM_BUF_RANGES 15
33 #endif
34 
35 struct dsc_pps_rc_range {
36 	int range_min_qp;
37 	int range_max_qp;
38 	int range_bpg_offset;
39 };
40 
41 struct dsc_parameters {
42 	struct drm_dsc_config pps;
43 
44 	/* Additional parameters for register programming */
45 	uint32_t bytes_per_pixel; /* In u3.28 format */
46 	uint32_t rc_buffer_model_size;
47 };
48 
49 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params);
50 
51 #endif
52 
53