1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dce110/dce110_hwseq.h" 27 #include "dcn10/dcn10_hwseq.h" 28 #include "dcn20/dcn20_hwseq.h" 29 #include "dcn21/dcn21_hwseq.h" 30 #include "dcn30/dcn30_hwseq.h" 31 #include "dcn301/dcn301_hwseq.h" 32 #include "dcn31/dcn31_hwseq.h" 33 34 #include "dcn31_init.h" 35 36 static const struct hw_sequencer_funcs dcn31_funcs = { 37 .program_gamut_remap = dcn30_program_gamut_remap, 38 .init_hw = dcn31_init_hw, 39 .power_down_on_boot = dcn10_power_down_on_boot, 40 .apply_ctx_to_hw = dce110_apply_ctx_to_hw, 41 .apply_ctx_for_surface = NULL, 42 .program_front_end_for_ctx = dcn20_program_front_end_for_ctx, 43 .wait_for_pending_cleared = dcn10_wait_for_pending_cleared, 44 .post_unlock_program_front_end = dcn20_post_unlock_program_front_end, 45 .update_plane_addr = dcn20_update_plane_addr, 46 .update_dchub = dcn10_update_dchub, 47 .update_pending_status = dcn10_update_pending_status, 48 .program_output_csc = dcn20_program_output_csc, 49 .enable_accelerated_mode = dce110_enable_accelerated_mode, 50 .enable_timing_synchronization = dcn10_enable_timing_synchronization, 51 .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset, 52 .update_info_frame = dcn31_update_info_frame, 53 .send_immediate_sdp_message = dcn10_send_immediate_sdp_message, 54 .enable_stream = dcn20_enable_stream, 55 .disable_stream = dce110_disable_stream, 56 .unblank_stream = dcn20_unblank_stream, 57 .blank_stream = dce110_blank_stream, 58 .enable_audio_stream = dce110_enable_audio_stream, 59 .disable_audio_stream = dce110_disable_audio_stream, 60 .disable_plane = dcn20_disable_plane, 61 .disable_pixel_data = dcn20_disable_pixel_data, 62 .pipe_control_lock = dcn20_pipe_control_lock, 63 .interdependent_update_lock = dcn10_lock_all_pipes, 64 .cursor_lock = dcn10_cursor_lock, 65 .prepare_bandwidth = dcn20_prepare_bandwidth, 66 .optimize_bandwidth = dcn20_optimize_bandwidth, 67 .update_bandwidth = dcn20_update_bandwidth, 68 .set_drr = dcn10_set_drr, 69 .get_position = dcn10_get_position, 70 .set_static_screen_control = dcn31_set_static_screen_control, 71 .setup_stereo = dcn10_setup_stereo, 72 .set_avmute = dcn30_set_avmute, 73 .log_hw_state = dcn10_log_hw_state, 74 .get_hw_state = dcn10_get_hw_state, 75 .clear_status_bits = dcn10_clear_status_bits, 76 .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect, 77 .edp_backlight_control = dce110_edp_backlight_control, 78 .edp_power_control = dce110_edp_power_control, 79 .edp_wait_for_T12 = dce110_edp_wait_for_T12, 80 .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready, 81 .set_cursor_position = dcn10_set_cursor_position, 82 .set_cursor_attribute = dcn10_set_cursor_attribute, 83 .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level, 84 .setup_periodic_interrupt = dcn10_setup_periodic_interrupt, 85 .set_clock = dcn10_set_clock, 86 .get_clock = dcn10_get_clock, 87 .program_triplebuffer = dcn20_program_triple_buffer, 88 .enable_writeback = dcn30_enable_writeback, 89 .disable_writeback = dcn30_disable_writeback, 90 .update_writeback = dcn30_update_writeback, 91 .mmhubbub_warmup = dcn30_mmhubbub_warmup, 92 .dmdata_status_done = dcn20_dmdata_status_done, 93 .program_dmdata_engine = dcn30_program_dmdata_engine, 94 .set_dmdata_attributes = dcn20_set_dmdata_attributes, 95 .init_sys_ctx = dcn31_init_sys_ctx, 96 .init_vm_ctx = dcn20_init_vm_ctx, 97 .set_flip_control_gsl = dcn20_set_flip_control_gsl, 98 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync, 99 .calc_vupdate_position = dcn10_calc_vupdate_position, 100 .power_down = dce110_power_down, 101 .set_backlight_level = dcn21_set_backlight_level, 102 .set_abm_immediate_disable = dcn21_set_abm_immediate_disable, 103 .set_pipe = dcn21_set_pipe, 104 .enable_lvds_link_output = dce110_enable_lvds_link_output, 105 .enable_tmds_link_output = dce110_enable_tmds_link_output, 106 .enable_dp_link_output = dce110_enable_dp_link_output, 107 .disable_link_output = dce110_disable_link_output, 108 .z10_restore = dcn31_z10_restore, 109 .z10_save_init = dcn31_z10_save_init, 110 .set_disp_pattern_generator = dcn30_set_disp_pattern_generator, 111 .optimize_pwr_state = dcn21_optimize_pwr_state, 112 .exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state, 113 .update_visual_confirm_color = dcn10_update_visual_confirm_color, 114 }; 115 116 static const struct hwseq_private_funcs dcn31_private_funcs = { 117 .init_pipes = dcn10_init_pipes, 118 .update_plane_addr = dcn20_update_plane_addr, 119 .plane_atomic_disconnect = dcn10_plane_atomic_disconnect, 120 .update_mpcc = dcn20_update_mpcc, 121 .set_input_transfer_func = dcn30_set_input_transfer_func, 122 .set_output_transfer_func = dcn30_set_output_transfer_func, 123 .power_down = dce110_power_down, 124 .enable_display_power_gating = dcn10_dummy_display_power_gating, 125 .blank_pixel_data = dcn20_blank_pixel_data, 126 .reset_hw_ctx_wrap = dcn31_reset_hw_ctx_wrap, 127 .enable_stream_timing = dcn20_enable_stream_timing, 128 .edp_backlight_control = dce110_edp_backlight_control, 129 .disable_stream_gating = dcn20_disable_stream_gating, 130 .enable_stream_gating = dcn20_enable_stream_gating, 131 .setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt, 132 .did_underflow_occur = dcn10_did_underflow_occur, 133 .init_blank = dcn20_init_blank, 134 .disable_vga = dcn20_disable_vga, 135 .bios_golden_init = dcn10_bios_golden_init, 136 .plane_atomic_disable = dcn20_plane_atomic_disable, 137 .plane_atomic_power_down = dcn10_plane_atomic_power_down, 138 .enable_power_gating_plane = dcn31_enable_power_gating_plane, 139 .hubp_pg_control = dcn31_hubp_pg_control, 140 .program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree, 141 .update_odm = dcn20_update_odm, 142 .dsc_pg_control = dcn31_dsc_pg_control, 143 .set_hdr_multiplier = dcn10_set_hdr_multiplier, 144 .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high, 145 .wait_for_blank_complete = dcn20_wait_for_blank_complete, 146 .dccg_init = dcn20_dccg_init, 147 .set_blend_lut = dcn30_set_blend_lut, 148 .set_shaper_3dlut = dcn20_set_shaper_3dlut, 149 .setup_hpo_hw_control = dcn31_setup_hpo_hw_control, 150 }; 151 152 void dcn31_hw_sequencer_construct(struct dc *dc) 153 { 154 dc->hwss = dcn31_funcs; 155 dc->hwseq->funcs = dcn31_private_funcs; 156 157 } 158