xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h (revision f86fd32d)
1 /* Copyright 2012-17 Advanced Micro Devices, Inc.
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a
4  * copy of this software and associated documentation files (the "Software"),
5  * to deal in the Software without restriction, including without limitation
6  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7  * and/or sell copies of the Software, and to permit persons to whom the
8  * Software is furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19  * OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * Authors: AMD
22  *
23  */
24 
25 #ifndef __DC_DWBC_H__
26 #define __DC_DWBC_H__
27 
28 #include "dc_hw_types.h"
29 
30 
31 #define DWB_SW_V2	1
32 #define DWB_MCIF_BUF_COUNT 4
33 
34 /* forward declaration of mcif_wb struct */
35 struct mcif_wb;
36 
37 enum dce_version;
38 
39 enum dwb_sw_version {
40 	dwb_ver_1_0 = 1,
41 	dwb_ver_2_0 = 2,
42 };
43 
44 enum dwb_source {
45 	dwb_src_scl = 0,	/* for DCE7x/9x, DCN won't support. */
46 	dwb_src_blnd,		/* for DCE7x/9x */
47 	dwb_src_fmt,		/* for DCE7x/9x */
48 	dwb_src_otg0 = 0x100,	/* for DCN1.x/DCN2.x, register: mmDWB_SOURCE_SELECT */
49 	dwb_src_otg1,		/* for DCN1.x/DCN2.x */
50 	dwb_src_otg2,		/* for DCN1.x/DCN2.x */
51 	dwb_src_otg3,		/* for DCN1.x/DCN2.x */
52 };
53 
54 /* DCN1.x, DCN2.x support 2 pipes */
55 enum dwb_pipe {
56 	dwb_pipe0 = 0,
57 #if defined(CONFIG_DRM_AMD_DC_DCN)
58 	dwb_pipe1,
59 #endif
60 	dwb_pipe_max_num,
61 };
62 
63 enum dwb_frame_capture_enable {
64 	DWB_FRAME_CAPTURE_DISABLE = 0,
65 	DWB_FRAME_CAPTURE_ENABLE = 1,
66 };
67 
68 enum wbscl_coef_filter_type_sel {
69 	WBSCL_COEF_LUMA_VERT_FILTER = 0,
70 	WBSCL_COEF_CHROMA_VERT_FILTER = 1,
71 	WBSCL_COEF_LUMA_HORZ_FILTER = 2,
72 	WBSCL_COEF_CHROMA_HORZ_FILTER = 3
73 };
74 
75 
76 struct dwb_warmup_params {
77 	bool	warmup_en;	/* false: normal mode, true: enable pattern generator */
78 	bool	warmup_mode;	/* false: 420, true: 444 */
79 	bool	warmup_depth;	/* false: 8bit, true: 10bit */
80 	int	warmup_data;	/* Data to be sent by pattern generator (same for each pixel component) */
81 	int	warmup_width;	/* Pattern width (pixels) */
82 	int	warmup_height;	/* Pattern height (lines) */
83 };
84 
85 struct dwb_caps {
86 	enum dce_version hw_version;	/* DCN engine version. */
87 	enum dwb_sw_version sw_version;	/* DWB sw implementation version. */
88 	unsigned int	reserved[6];	/* Reserved for future use, MUST BE 0. */
89 	unsigned int	adapter_id;
90 	unsigned int	num_pipes;	/* number of DWB pipes */
91 	struct {
92 		unsigned int support_dwb	:1;
93 		unsigned int support_ogam	:1;
94 		unsigned int support_wbscl	:1;
95 		unsigned int support_ocsc	:1;
96 		unsigned int support_stereo :1;
97 	} caps;
98 	unsigned int	 reserved2[9];	/* Reserved for future use, MUST BE 0. */
99 };
100 
101 struct dwbc {
102 	const struct dwbc_funcs *funcs;
103 	struct dc_context *ctx;
104 	int inst;
105 	struct mcif_wb *mcif;
106 	bool status;
107 	int inputSrcSelect;
108 	bool dwb_output_black;
109 	enum dc_transfer_func_predefined tf;
110 	enum dc_color_space output_color_space;
111 	bool dwb_is_efc_transition;
112 	bool dwb_is_drc;
113 	int wb_src_plane_inst;/*hubp, mpcc, inst*/
114 	bool update_privacymask;
115 	uint32_t mask_id;
116         int otg_inst;
117         bool mvc_cfg;
118 };
119 
120 struct dwbc_funcs {
121 	bool (*get_caps)(
122 		struct dwbc *dwbc,
123 		struct dwb_caps *caps);
124 
125 	bool (*enable)(
126 		struct dwbc *dwbc,
127 		struct dc_dwb_params *params);
128 
129 	bool (*disable)(struct dwbc *dwbc);
130 
131 	bool (*update)(
132 		struct dwbc *dwbc,
133 		struct dc_dwb_params *params);
134 
135 	bool (*is_enabled)(
136 		struct dwbc *dwbc);
137 
138 	void (*set_stereo)(
139 		struct dwbc *dwbc,
140 		struct dwb_stereo_params *stereo_params);
141 
142 	void (*set_new_content)(
143 		struct dwbc *dwbc,
144 		bool is_new_content);
145 
146 
147 	void (*set_warmup)(
148 		struct dwbc *dwbc,
149 		struct dwb_warmup_params *warmup_params);
150 
151 
152 	bool (*get_dwb_status)(
153 		struct dwbc *dwbc);
154 	void (*dwb_set_scaler)(
155 		struct dwbc *dwbc,
156 		struct dc_dwb_params *params);
157 };
158 
159 #endif
160