1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 #ifndef __DAL_MEM_INPUT_H__ 26 #define __DAL_MEM_INPUT_H__ 27 28 #include "dc.h" 29 #include "include/grph_object_id.h" 30 31 #include "dml/display_mode_structs.h" 32 33 struct dchub_init_data; 34 struct cstate_pstate_watermarks_st { 35 uint32_t cstate_exit_ns; 36 uint32_t cstate_enter_plus_exit_ns; 37 uint32_t pstate_change_ns; 38 }; 39 40 struct dcn_watermarks { 41 uint32_t pte_meta_urgent_ns; 42 uint32_t urgent_ns; 43 uint32_t frac_urg_bw_nom; 44 uint32_t frac_urg_bw_flip; 45 int32_t urgent_latency_ns; 46 struct cstate_pstate_watermarks_st cstate_pstate; 47 }; 48 49 struct dcn_watermark_set { 50 struct dcn_watermarks a; 51 struct dcn_watermarks b; 52 struct dcn_watermarks c; 53 struct dcn_watermarks d; 54 }; 55 56 struct dce_watermarks { 57 int a_mark; 58 int b_mark; 59 int c_mark; 60 int d_mark; 61 }; 62 63 struct stutter_modes { 64 bool enhanced; 65 bool quad_dmif_buffer; 66 bool watermark_nb_pstate; 67 }; 68 69 struct mem_input { 70 const struct mem_input_funcs *funcs; 71 struct dc_context *ctx; 72 struct dc_plane_address request_address; 73 struct dc_plane_address current_address; 74 int inst; 75 struct stutter_modes stutter_mode; 76 }; 77 78 struct vm_system_aperture_param { 79 PHYSICAL_ADDRESS_LOC sys_default; 80 PHYSICAL_ADDRESS_LOC sys_low; 81 PHYSICAL_ADDRESS_LOC sys_high; 82 }; 83 84 struct vm_context0_param { 85 PHYSICAL_ADDRESS_LOC pte_base; 86 PHYSICAL_ADDRESS_LOC pte_start; 87 PHYSICAL_ADDRESS_LOC pte_end; 88 PHYSICAL_ADDRESS_LOC fault_default; 89 }; 90 91 struct mem_input_funcs { 92 void (*mem_input_setup)( 93 struct mem_input *mem_input, 94 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 95 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 96 struct _vcs_dpi_display_rq_regs_st *rq_regs, 97 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 98 99 void (*dcc_control)(struct mem_input *mem_input, bool enable, 100 bool independent_64b_blks); 101 void (*mem_program_viewport)( 102 struct mem_input *mem_input, 103 const struct rect *viewport, 104 const struct rect *viewport_c); 105 106 void (*mem_input_program_display_marks)( 107 struct mem_input *mem_input, 108 struct dce_watermarks nbp, 109 struct dce_watermarks stutter, 110 struct dce_watermarks stutter_enter, 111 struct dce_watermarks urgent, 112 uint32_t total_dest_line_time_ns); 113 114 void (*mem_input_program_chroma_display_marks)( 115 struct mem_input *mem_input, 116 struct dce_watermarks nbp, 117 struct dce_watermarks stutter, 118 struct dce_watermarks urgent, 119 uint32_t total_dest_line_time_ns); 120 121 void (*allocate_mem_input)( 122 struct mem_input *mem_input, 123 uint32_t h_total,/* for current target */ 124 uint32_t v_total,/* for current target */ 125 uint32_t pix_clk_khz,/* for current target */ 126 uint32_t total_streams_num); 127 128 void (*free_mem_input)( 129 struct mem_input *mem_input, 130 uint32_t paths_num); 131 132 bool (*mem_input_program_surface_flip_and_addr)( 133 struct mem_input *mem_input, 134 const struct dc_plane_address *address, 135 bool flip_immediate); 136 137 void (*mem_input_program_pte_vm)( 138 struct mem_input *mem_input, 139 enum surface_pixel_format format, 140 union dc_tiling_info *tiling_info, 141 enum dc_rotation_angle rotation); 142 143 void (*mem_input_set_vm_system_aperture_settings)( 144 struct mem_input *mem_input, 145 struct vm_system_aperture_param *apt); 146 147 void (*mem_input_set_vm_context0_settings)( 148 struct mem_input *mem_input, 149 const struct vm_context0_param *vm0); 150 151 void (*mem_input_program_surface_config)( 152 struct mem_input *mem_input, 153 enum surface_pixel_format format, 154 union dc_tiling_info *tiling_info, 155 struct plane_size *plane_size, 156 enum dc_rotation_angle rotation, 157 struct dc_plane_dcc_param *dcc, 158 bool horizontal_mirror); 159 160 bool (*mem_input_is_flip_pending)(struct mem_input *mem_input); 161 162 void (*mem_input_update_dchub)(struct mem_input *mem_input, 163 struct dchub_init_data *dh_data); 164 165 void (*set_blank)(struct mem_input *mi, bool blank); 166 void (*set_hubp_blank_en)(struct mem_input *mi, bool blank); 167 168 void (*set_cursor_attributes)( 169 struct mem_input *mem_input, 170 const struct dc_cursor_attributes *attr); 171 172 void (*set_cursor_position)( 173 struct mem_input *mem_input, 174 const struct dc_cursor_position *pos, 175 const struct dc_cursor_mi_param *param); 176 177 }; 178 179 #endif 180