1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_LOGGER_TYPES_H__ 27 #define __DAL_LOGGER_TYPES_H__ 28 29 #include "os_types.h" 30 31 #define MAX_NAME_LEN 32 32 33 #define DC_LOG_ERROR(...) DRM_ERROR(__VA_ARGS__) 34 #define DC_LOG_WARNING(...) DRM_WARN(__VA_ARGS__) 35 #define DC_LOG_DEBUG(...) DRM_DEBUG_KMS(__VA_ARGS__) 36 #define DC_LOG_DC(...) DRM_DEBUG_KMS(__VA_ARGS__) 37 #define DC_LOG_DTN(...) DRM_DEBUG_KMS(__VA_ARGS__) 38 #define DC_LOG_SURFACE(...) pr_debug("[SURFACE]:"__VA_ARGS__) 39 #define DC_LOG_HW_HOTPLUG(...) DRM_DEBUG_KMS(__VA_ARGS__) 40 #define DC_LOG_HW_LINK_TRAINING(...) pr_debug("[HW_LINK_TRAINING]:"__VA_ARGS__) 41 #define DC_LOG_HW_SET_MODE(...) DRM_DEBUG_KMS(__VA_ARGS__) 42 #define DC_LOG_HW_RESUME_S3(...) DRM_DEBUG_KMS(__VA_ARGS__) 43 #define DC_LOG_HW_AUDIO(...) pr_debug("[HW_AUDIO]:"__VA_ARGS__) 44 #define DC_LOG_HW_HPD_IRQ(...) DRM_DEBUG_KMS(__VA_ARGS__) 45 #define DC_LOG_MST(...) DRM_DEBUG_KMS(__VA_ARGS__) 46 #define DC_LOG_SCALER(...) pr_debug("[SCALER]:"__VA_ARGS__) 47 #define DC_LOG_BIOS(...) pr_debug("[BIOS]:"__VA_ARGS__) 48 #define DC_LOG_BANDWIDTH_CALCS(...) pr_debug("[BANDWIDTH_CALCS]:"__VA_ARGS__) 49 #define DC_LOG_BANDWIDTH_VALIDATION(...) DRM_DEBUG_KMS(__VA_ARGS__) 50 #define DC_LOG_I2C_AUX(...) DRM_DEBUG_KMS(__VA_ARGS__) 51 #define DC_LOG_SYNC(...) DRM_DEBUG_KMS(__VA_ARGS__) 52 #define DC_LOG_BACKLIGHT(...) DRM_DEBUG_KMS(__VA_ARGS__) 53 #define DC_LOG_FEATURE_OVERRIDE(...) DRM_DEBUG_KMS(__VA_ARGS__) 54 #define DC_LOG_DETECTION_EDID_PARSER(...) DRM_DEBUG_KMS(__VA_ARGS__) 55 #define DC_LOG_DETECTION_DP_CAPS(...) DRM_DEBUG_KMS(__VA_ARGS__) 56 #define DC_LOG_RESOURCE(...) DRM_DEBUG_KMS(__VA_ARGS__) 57 #define DC_LOG_DML(...) pr_debug("[DML]:"__VA_ARGS__) 58 #define DC_LOG_EVENT_MODE_SET(...) DRM_DEBUG_KMS(__VA_ARGS__) 59 #define DC_LOG_EVENT_DETECTION(...) DRM_DEBUG_KMS(__VA_ARGS__) 60 #define DC_LOG_EVENT_LINK_TRAINING(...) DRM_DEBUG_KMS(__VA_ARGS__) 61 #define DC_LOG_EVENT_LINK_LOSS(...) DRM_DEBUG_KMS(__VA_ARGS__) 62 #define DC_LOG_EVENT_UNDERFLOW(...) DRM_DEBUG_KMS(__VA_ARGS__) 63 #define DC_LOG_IF_TRACE(...) pr_debug("[IF_TRACE]:"__VA_ARGS__) 64 #define DC_LOG_PERF_TRACE(...) DRM_DEBUG_KMS(__VA_ARGS__) 65 #define DC_LOG_RETIMER_REDRIVER(...) DRM_DEBUG_KMS(__VA_ARGS__) 66 #define DC_LOG_GAMMA(...) pr_debug("[GAMMA]:"__VA_ARGS__) 67 #define DC_LOG_ALL_GAMMA(...) pr_debug("[GAMMA]:"__VA_ARGS__) 68 #define DC_LOG_ALL_TF_CHANNELS(...) pr_debug("[GAMMA]:"__VA_ARGS__) 69 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT 70 #define DC_LOG_DSC(...) DRM_DEBUG_KMS(__VA_ARGS__) 71 #endif 72 #if defined(CONFIG_DRM_AMD_DC_DCN3_0) || defined(CONFIG_DRM_AMD_DC_DCN2_0) 73 #define DC_LOG_DWB(...) DRM_DEBUG_KMS(__VA_ARGS__) 74 #endif 75 76 struct dal_logger; 77 78 struct dc_log_buffer_ctx { 79 char *buf; 80 size_t pos; 81 size_t size; 82 }; 83 84 enum dc_log_type { 85 LOG_ERROR = 0, 86 LOG_WARNING, 87 LOG_DEBUG, 88 LOG_DC, 89 LOG_DTN, 90 LOG_SURFACE, 91 LOG_HW_HOTPLUG, 92 LOG_HW_LINK_TRAINING, 93 LOG_HW_SET_MODE, 94 LOG_HW_RESUME_S3, 95 LOG_HW_AUDIO, 96 LOG_HW_HPD_IRQ, 97 LOG_MST, 98 LOG_SCALER, 99 LOG_BIOS, 100 LOG_BANDWIDTH_CALCS, 101 LOG_BANDWIDTH_VALIDATION, 102 LOG_I2C_AUX, 103 LOG_SYNC, 104 LOG_BACKLIGHT, 105 LOG_FEATURE_OVERRIDE, 106 LOG_DETECTION_EDID_PARSER, 107 LOG_DETECTION_DP_CAPS, 108 LOG_RESOURCE, 109 LOG_DML, 110 LOG_EVENT_MODE_SET, 111 LOG_EVENT_DETECTION, 112 LOG_EVENT_LINK_TRAINING, 113 LOG_EVENT_LINK_LOSS, 114 LOG_EVENT_UNDERFLOW, 115 LOG_IF_TRACE, 116 LOG_PERF_TRACE, 117 LOG_DISPLAYSTATS, 118 LOG_HDMI_RETIMER_REDRIVER, 119 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT 120 LOG_DSC, 121 #endif 122 LOG_DWB, 123 LOG_GAMMA_DEBUG, 124 LOG_MAX_HW_POINTS, 125 LOG_ALL_TF_CHANNELS, 126 LOG_SAMPLE_1DLUT, 127 LOG_SECTION_TOTAL_COUNT 128 }; 129 130 #define DC_MIN_LOG_MASK ((1 << LOG_ERROR) | \ 131 (1 << LOG_DETECTION_EDID_PARSER)) 132 133 #define DC_DEFAULT_LOG_MASK ((1 << LOG_ERROR) | \ 134 (1 << LOG_WARNING) | \ 135 (1 << LOG_EVENT_MODE_SET) | \ 136 (1 << LOG_EVENT_DETECTION) | \ 137 (1 << LOG_EVENT_LINK_TRAINING) | \ 138 (1 << LOG_EVENT_LINK_LOSS) | \ 139 (1 << LOG_EVENT_UNDERFLOW) | \ 140 (1 << LOG_RESOURCE) | \ 141 (1 << LOG_FEATURE_OVERRIDE) | \ 142 (1 << LOG_DETECTION_EDID_PARSER) | \ 143 (1 << LOG_DC) | \ 144 (1 << LOG_HW_HOTPLUG) | \ 145 (1 << LOG_HW_SET_MODE) | \ 146 (1 << LOG_HW_RESUME_S3) | \ 147 (1 << LOG_HW_HPD_IRQ) | \ 148 (1 << LOG_SYNC) | \ 149 (1 << LOG_BANDWIDTH_VALIDATION) | \ 150 (1 << LOG_MST) | \ 151 (1 << LOG_DETECTION_DP_CAPS) | \ 152 (1 << LOG_BACKLIGHT)) | \ 153 (1 << LOG_I2C_AUX) | \ 154 (1 << LOG_IF_TRACE) | \ 155 (1 << LOG_DTN) /* | \ 156 (1 << LOG_DEBUG) | \ 157 (1 << LOG_BIOS) | \ 158 (1 << LOG_SURFACE) | \ 159 (1 << LOG_SCALER) | \ 160 (1 << LOG_DML) | \ 161 (1 << LOG_HW_LINK_TRAINING) | \ 162 (1 << LOG_HW_AUDIO)| \ 163 (1 << LOG_BANDWIDTH_CALCS)*/ 164 165 #endif /* __DAL_LOGGER_TYPES_H__ */ 166