1 /* 2 * Copyright (C) 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21 22 #ifndef _mp_11_0_2_SH_MASK_HEADER 23 #define _mp_11_0_2_SH_MASK_HEADER 24 25 26 // addressBlock: mp_SmuMp0_SmnDec 27 //MP0_SMN_C2PMSG_32 28 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 29 #define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 30 //MP0_SMN_C2PMSG_33 31 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 32 #define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 33 //MP0_SMN_C2PMSG_34 34 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 35 #define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 36 //MP0_SMN_C2PMSG_35 37 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 38 #define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 39 //MP0_SMN_C2PMSG_36 40 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 41 #define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 42 //MP0_SMN_C2PMSG_37 43 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 44 #define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 45 //MP0_SMN_C2PMSG_38 46 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 47 #define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 48 //MP0_SMN_C2PMSG_39 49 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 50 #define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 51 //MP0_SMN_C2PMSG_40 52 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 53 #define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 54 //MP0_SMN_C2PMSG_41 55 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 56 #define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 57 //MP0_SMN_C2PMSG_42 58 #define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 59 #define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 60 //MP0_SMN_C2PMSG_43 61 #define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 62 #define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 63 //MP0_SMN_C2PMSG_44 64 #define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 65 #define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 66 //MP0_SMN_C2PMSG_45 67 #define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 68 #define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 69 //MP0_SMN_C2PMSG_46 70 #define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 71 #define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 72 //MP0_SMN_C2PMSG_47 73 #define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 74 #define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 75 //MP0_SMN_C2PMSG_48 76 #define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 77 #define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 78 //MP0_SMN_C2PMSG_49 79 #define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 80 #define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 81 //MP0_SMN_C2PMSG_50 82 #define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 83 #define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 84 //MP0_SMN_C2PMSG_51 85 #define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 86 #define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 87 //MP0_SMN_C2PMSG_52 88 #define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 89 #define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 90 //MP0_SMN_C2PMSG_53 91 #define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 92 #define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 93 //MP0_SMN_C2PMSG_54 94 #define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 95 #define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 96 //MP0_SMN_C2PMSG_55 97 #define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 98 #define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 99 //MP0_SMN_C2PMSG_56 100 #define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 101 #define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 102 //MP0_SMN_C2PMSG_57 103 #define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 104 #define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 105 //MP0_SMN_C2PMSG_58 106 #define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 107 #define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 108 //MP0_SMN_C2PMSG_59 109 #define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 110 #define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 111 //MP0_SMN_C2PMSG_60 112 #define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 113 #define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 114 //MP0_SMN_C2PMSG_61 115 #define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 116 #define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 117 //MP0_SMN_C2PMSG_62 118 #define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 119 #define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 120 //MP0_SMN_C2PMSG_63 121 #define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 122 #define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 123 //MP0_SMN_C2PMSG_64 124 #define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 125 #define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 126 //MP0_SMN_C2PMSG_65 127 #define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 128 #define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 129 //MP0_SMN_C2PMSG_66 130 #define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 131 #define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 132 //MP0_SMN_C2PMSG_67 133 #define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 134 #define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 135 //MP0_SMN_C2PMSG_68 136 #define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 137 #define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 138 //MP0_SMN_C2PMSG_69 139 #define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 140 #define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 141 //MP0_SMN_C2PMSG_70 142 #define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 143 #define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 144 //MP0_SMN_C2PMSG_71 145 #define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 146 #define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 147 //MP0_SMN_C2PMSG_72 148 #define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 149 #define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 150 //MP0_SMN_C2PMSG_73 151 #define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 152 #define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 153 //MP0_SMN_C2PMSG_74 154 #define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 155 #define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 156 //MP0_SMN_C2PMSG_75 157 #define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 158 #define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 159 //MP0_SMN_C2PMSG_76 160 #define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 161 #define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 162 //MP0_SMN_C2PMSG_77 163 #define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 164 #define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 165 //MP0_SMN_C2PMSG_78 166 #define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 167 #define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 168 //MP0_SMN_C2PMSG_79 169 #define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 170 #define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 171 //MP0_SMN_C2PMSG_80 172 #define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 173 #define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 174 //MP0_SMN_C2PMSG_81 175 #define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 176 #define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 177 //MP0_SMN_C2PMSG_82 178 #define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 179 #define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 180 //MP0_SMN_C2PMSG_83 181 #define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 182 #define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 183 //MP0_SMN_C2PMSG_84 184 #define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 185 #define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 186 //MP0_SMN_C2PMSG_85 187 #define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 188 #define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 189 //MP0_SMN_C2PMSG_86 190 #define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 191 #define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 192 //MP0_SMN_C2PMSG_87 193 #define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 194 #define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 195 //MP0_SMN_C2PMSG_88 196 #define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 197 #define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 198 //MP0_SMN_C2PMSG_89 199 #define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 200 #define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 201 //MP0_SMN_C2PMSG_90 202 #define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 203 #define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 204 //MP0_SMN_C2PMSG_91 205 #define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 206 #define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 207 //MP0_SMN_C2PMSG_92 208 #define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 209 #define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 210 //MP0_SMN_C2PMSG_93 211 #define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 212 #define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 213 //MP0_SMN_C2PMSG_94 214 #define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 215 #define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 216 //MP0_SMN_C2PMSG_95 217 #define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 218 #define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 219 //MP0_SMN_C2PMSG_96 220 #define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 221 #define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 222 //MP0_SMN_C2PMSG_97 223 #define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 224 #define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 225 //MP0_SMN_C2PMSG_98 226 #define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 227 #define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 228 //MP0_SMN_C2PMSG_99 229 #define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 230 #define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 231 //MP0_SMN_C2PMSG_100 232 #define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 233 #define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 234 //MP0_SMN_C2PMSG_101 235 #define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 236 #define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 237 //MP0_SMN_C2PMSG_102 238 #define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 239 #define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 240 //MP0_SMN_C2PMSG_103 241 #define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 242 #define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 243 //MP0_SMN_ACTIVE_FCN_ID 244 #define MP0_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 245 #define MP0_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f 246 #define MP0_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 247 #define MP0_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L 248 //MP0_SMN_IH_CREDIT 249 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 250 #define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 251 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 252 #define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 253 //MP0_SMN_IH_SW_INT 254 #define MP0_SMN_IH_SW_INT__ID__SHIFT 0x0 255 #define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x8 256 #define MP0_SMN_IH_SW_INT__ID_MASK 0x000000FFL 257 #define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000100L 258 //MP0_SMN_IH_SW_INT_CTRL 259 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 260 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 261 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 262 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 263 264 265 //MP1_FIRMWARE_FLAGS 266 #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0 267 #define MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1 268 #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L 269 #define MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL 270 //MP1_PUB_SCRATCH0 271 #define MP1_PUB_SCRATCH0__DATA__SHIFT 0x0 272 #define MP1_PUB_SCRATCH0__DATA_MASK 0xFFFFFFFFL 273 //MP1_PUB_SCRATCH1 274 #define MP1_PUB_SCRATCH1__DATA__SHIFT 0x0 275 #define MP1_PUB_SCRATCH1__DATA_MASK 0xFFFFFFFFL 276 //MP1_PUB_SCRATCH2 277 #define MP1_PUB_SCRATCH2__DATA__SHIFT 0x0 278 #define MP1_PUB_SCRATCH2__DATA_MASK 0xFFFFFFFFL 279 //MP1_PUB_SCRATCH3 280 #define MP1_PUB_SCRATCH3__DATA__SHIFT 0x0 281 #define MP1_PUB_SCRATCH3__DATA_MASK 0xFFFFFFFFL 282 //MP1_C2PMSG_0 283 #define MP1_C2PMSG_0__CONTENT__SHIFT 0x0 284 #define MP1_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 285 //MP1_C2PMSG_1 286 #define MP1_C2PMSG_1__CONTENT__SHIFT 0x0 287 #define MP1_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL 288 //MP1_C2PMSG_2 289 #define MP1_C2PMSG_2__CONTENT__SHIFT 0x0 290 #define MP1_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL 291 //MP1_C2PMSG_3 292 #define MP1_C2PMSG_3__CONTENT__SHIFT 0x0 293 #define MP1_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL 294 //MP1_C2PMSG_4 295 #define MP1_C2PMSG_4__CONTENT__SHIFT 0x0 296 #define MP1_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL 297 //MP1_C2PMSG_5 298 #define MP1_C2PMSG_5__CONTENT__SHIFT 0x0 299 #define MP1_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL 300 //MP1_C2PMSG_6 301 #define MP1_C2PMSG_6__CONTENT__SHIFT 0x0 302 #define MP1_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL 303 //MP1_C2PMSG_7 304 #define MP1_C2PMSG_7__CONTENT__SHIFT 0x0 305 #define MP1_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL 306 //MP1_C2PMSG_8 307 #define MP1_C2PMSG_8__CONTENT__SHIFT 0x0 308 #define MP1_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL 309 //MP1_C2PMSG_9 310 #define MP1_C2PMSG_9__CONTENT__SHIFT 0x0 311 #define MP1_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL 312 //MP1_C2PMSG_10 313 #define MP1_C2PMSG_10__CONTENT__SHIFT 0x0 314 #define MP1_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL 315 //MP1_C2PMSG_11 316 #define MP1_C2PMSG_11__CONTENT__SHIFT 0x0 317 #define MP1_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL 318 //MP1_C2PMSG_12 319 #define MP1_C2PMSG_12__CONTENT__SHIFT 0x0 320 #define MP1_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL 321 //MP1_C2PMSG_13 322 #define MP1_C2PMSG_13__CONTENT__SHIFT 0x0 323 #define MP1_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL 324 //MP1_C2PMSG_14 325 #define MP1_C2PMSG_14__CONTENT__SHIFT 0x0 326 #define MP1_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL 327 //MP1_C2PMSG_15 328 #define MP1_C2PMSG_15__CONTENT__SHIFT 0x0 329 #define MP1_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL 330 //MP1_C2PMSG_16 331 #define MP1_C2PMSG_16__CONTENT__SHIFT 0x0 332 #define MP1_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL 333 //MP1_C2PMSG_17 334 #define MP1_C2PMSG_17__CONTENT__SHIFT 0x0 335 #define MP1_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL 336 //MP1_C2PMSG_18 337 #define MP1_C2PMSG_18__CONTENT__SHIFT 0x0 338 #define MP1_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL 339 //MP1_C2PMSG_19 340 #define MP1_C2PMSG_19__CONTENT__SHIFT 0x0 341 #define MP1_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL 342 //MP1_C2PMSG_20 343 #define MP1_C2PMSG_20__CONTENT__SHIFT 0x0 344 #define MP1_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL 345 //MP1_C2PMSG_21 346 #define MP1_C2PMSG_21__CONTENT__SHIFT 0x0 347 #define MP1_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL 348 //MP1_C2PMSG_22 349 #define MP1_C2PMSG_22__CONTENT__SHIFT 0x0 350 #define MP1_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL 351 //MP1_C2PMSG_23 352 #define MP1_C2PMSG_23__CONTENT__SHIFT 0x0 353 #define MP1_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL 354 //MP1_C2PMSG_24 355 #define MP1_C2PMSG_24__CONTENT__SHIFT 0x0 356 #define MP1_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL 357 //MP1_C2PMSG_25 358 #define MP1_C2PMSG_25__CONTENT__SHIFT 0x0 359 #define MP1_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL 360 //MP1_C2PMSG_26 361 #define MP1_C2PMSG_26__CONTENT__SHIFT 0x0 362 #define MP1_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL 363 //MP1_C2PMSG_27 364 #define MP1_C2PMSG_27__CONTENT__SHIFT 0x0 365 #define MP1_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL 366 //MP1_C2PMSG_28 367 #define MP1_C2PMSG_28__CONTENT__SHIFT 0x0 368 #define MP1_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL 369 //MP1_C2PMSG_29 370 #define MP1_C2PMSG_29__CONTENT__SHIFT 0x0 371 #define MP1_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL 372 //MP1_C2PMSG_30 373 #define MP1_C2PMSG_30__CONTENT__SHIFT 0x0 374 #define MP1_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL 375 //MP1_C2PMSG_31 376 #define MP1_C2PMSG_31__CONTENT__SHIFT 0x0 377 #define MP1_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL 378 //MP1_P2CMSG_0 379 #define MP1_P2CMSG_0__CONTENT__SHIFT 0x0 380 #define MP1_P2CMSG_0__CONTENT_MASK 0xFFFFFFFFL 381 //MP1_P2CMSG_1 382 #define MP1_P2CMSG_1__CONTENT__SHIFT 0x0 383 #define MP1_P2CMSG_1__CONTENT_MASK 0xFFFFFFFFL 384 //MP1_P2CMSG_2 385 #define MP1_P2CMSG_2__CONTENT__SHIFT 0x0 386 #define MP1_P2CMSG_2__CONTENT_MASK 0xFFFFFFFFL 387 //MP1_P2CMSG_3 388 #define MP1_P2CMSG_3__CONTENT__SHIFT 0x0 389 #define MP1_P2CMSG_3__CONTENT_MASK 0xFFFFFFFFL 390 //MP1_P2CMSG_INTEN 391 #define MP1_P2CMSG_INTEN__INTEN__SHIFT 0x0 392 #define MP1_P2CMSG_INTEN__INTEN_MASK 0x0000000FL 393 //MP1_P2CMSG_INTSTS 394 #define MP1_P2CMSG_INTSTS__INTSTS0__SHIFT 0x0 395 #define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 396 #define MP1_P2CMSG_INTSTS__INTSTS2__SHIFT 0x2 397 #define MP1_P2CMSG_INTSTS__INTSTS3__SHIFT 0x3 398 #define MP1_P2CMSG_INTSTS__INTSTS0_MASK 0x00000001L 399 #define MP1_P2CMSG_INTSTS__INTSTS1_MASK 0x00000002L 400 #define MP1_P2CMSG_INTSTS__INTSTS2_MASK 0x00000004L 401 #define MP1_P2CMSG_INTSTS__INTSTS3_MASK 0x00000008L 402 //MP1_P2SMSG_0 403 #define MP1_P2SMSG_0__CONTENT__SHIFT 0x0 404 #define MP1_P2SMSG_0__CONTENT_MASK 0xFFFFFFFFL 405 //MP1_P2SMSG_1 406 #define MP1_P2SMSG_1__CONTENT__SHIFT 0x0 407 #define MP1_P2SMSG_1__CONTENT_MASK 0xFFFFFFFFL 408 //MP1_P2SMSG_2 409 #define MP1_P2SMSG_2__CONTENT__SHIFT 0x0 410 #define MP1_P2SMSG_2__CONTENT_MASK 0xFFFFFFFFL 411 //MP1_P2SMSG_3 412 #define MP1_P2SMSG_3__CONTENT__SHIFT 0x0 413 #define MP1_P2SMSG_3__CONTENT_MASK 0xFFFFFFFFL 414 //MP1_P2SMSG_INTSTS 415 #define MP1_P2SMSG_INTSTS__INTSTS0__SHIFT 0x0 416 #define MP1_P2SMSG_INTSTS__INTSTS1__SHIFT 0x1 417 #define MP1_P2SMSG_INTSTS__INTSTS2__SHIFT 0x2 418 #define MP1_P2SMSG_INTSTS__INTSTS3__SHIFT 0x3 419 #define MP1_P2SMSG_INTSTS__INTSTS0_MASK 0x00000001L 420 #define MP1_P2SMSG_INTSTS__INTSTS1_MASK 0x00000002L 421 #define MP1_P2SMSG_INTSTS__INTSTS2_MASK 0x00000004L 422 #define MP1_P2SMSG_INTSTS__INTSTS3_MASK 0x00000008L 423 //MP1_S2PMSG_0 424 #define MP1_S2PMSG_0__CONTENT__SHIFT 0x0 425 #define MP1_S2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 426 //MP1_C2PMSG_32 427 #define MP1_C2PMSG_32__CONTENT__SHIFT 0x0 428 #define MP1_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 429 //MP1_C2PMSG_33 430 #define MP1_C2PMSG_33__CONTENT__SHIFT 0x0 431 #define MP1_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 432 //MP1_C2PMSG_34 433 #define MP1_C2PMSG_34__CONTENT__SHIFT 0x0 434 #define MP1_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 435 //MP1_C2PMSG_35 436 #define MP1_C2PMSG_35__CONTENT__SHIFT 0x0 437 #define MP1_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 438 //MP1_C2PMSG_36 439 #define MP1_C2PMSG_36__CONTENT__SHIFT 0x0 440 #define MP1_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 441 //MP1_C2PMSG_37 442 #define MP1_C2PMSG_37__CONTENT__SHIFT 0x0 443 #define MP1_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 444 //MP1_C2PMSG_38 445 #define MP1_C2PMSG_38__CONTENT__SHIFT 0x0 446 #define MP1_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 447 //MP1_C2PMSG_39 448 #define MP1_C2PMSG_39__CONTENT__SHIFT 0x0 449 #define MP1_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 450 //MP1_C2PMSG_40 451 #define MP1_C2PMSG_40__CONTENT__SHIFT 0x0 452 #define MP1_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 453 //MP1_C2PMSG_41 454 #define MP1_C2PMSG_41__CONTENT__SHIFT 0x0 455 #define MP1_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 456 //MP1_C2PMSG_42 457 #define MP1_C2PMSG_42__CONTENT__SHIFT 0x0 458 #define MP1_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 459 //MP1_C2PMSG_43 460 #define MP1_C2PMSG_43__CONTENT__SHIFT 0x0 461 #define MP1_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 462 //MP1_C2PMSG_44 463 #define MP1_C2PMSG_44__CONTENT__SHIFT 0x0 464 #define MP1_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 465 //MP1_C2PMSG_45 466 #define MP1_C2PMSG_45__CONTENT__SHIFT 0x0 467 #define MP1_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 468 //MP1_C2PMSG_46 469 #define MP1_C2PMSG_46__CONTENT__SHIFT 0x0 470 #define MP1_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 471 //MP1_C2PMSG_47 472 #define MP1_C2PMSG_47__CONTENT__SHIFT 0x0 473 #define MP1_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 474 //MP1_C2PMSG_48 475 #define MP1_C2PMSG_48__CONTENT__SHIFT 0x0 476 #define MP1_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 477 //MP1_C2PMSG_49 478 #define MP1_C2PMSG_49__CONTENT__SHIFT 0x0 479 #define MP1_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 480 //MP1_C2PMSG_50 481 #define MP1_C2PMSG_50__CONTENT__SHIFT 0x0 482 #define MP1_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 483 //MP1_C2PMSG_51 484 #define MP1_C2PMSG_51__CONTENT__SHIFT 0x0 485 #define MP1_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 486 //MP1_C2PMSG_52 487 #define MP1_C2PMSG_52__CONTENT__SHIFT 0x0 488 #define MP1_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 489 //MP1_C2PMSG_53 490 #define MP1_C2PMSG_53__CONTENT__SHIFT 0x0 491 #define MP1_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 492 //MP1_C2PMSG_54 493 #define MP1_C2PMSG_54__CONTENT__SHIFT 0x0 494 #define MP1_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 495 //MP1_C2PMSG_55 496 #define MP1_C2PMSG_55__CONTENT__SHIFT 0x0 497 #define MP1_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 498 //MP1_C2PMSG_56 499 #define MP1_C2PMSG_56__CONTENT__SHIFT 0x0 500 #define MP1_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 501 //MP1_C2PMSG_57 502 #define MP1_C2PMSG_57__CONTENT__SHIFT 0x0 503 #define MP1_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 504 //MP1_C2PMSG_58 505 #define MP1_C2PMSG_58__CONTENT__SHIFT 0x0 506 #define MP1_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 507 //MP1_C2PMSG_59 508 #define MP1_C2PMSG_59__CONTENT__SHIFT 0x0 509 #define MP1_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 510 //MP1_C2PMSG_60 511 #define MP1_C2PMSG_60__CONTENT__SHIFT 0x0 512 #define MP1_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 513 //MP1_C2PMSG_61 514 #define MP1_C2PMSG_61__CONTENT__SHIFT 0x0 515 #define MP1_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 516 //MP1_C2PMSG_62 517 #define MP1_C2PMSG_62__CONTENT__SHIFT 0x0 518 #define MP1_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 519 //MP1_C2PMSG_63 520 #define MP1_C2PMSG_63__CONTENT__SHIFT 0x0 521 #define MP1_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 522 //MP1_C2PMSG_64 523 #define MP1_C2PMSG_64__CONTENT__SHIFT 0x0 524 #define MP1_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 525 //MP1_C2PMSG_65 526 #define MP1_C2PMSG_65__CONTENT__SHIFT 0x0 527 #define MP1_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 528 //MP1_C2PMSG_66 529 #define MP1_C2PMSG_66__CONTENT__SHIFT 0x0 530 #define MP1_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 531 //MP1_C2PMSG_67 532 #define MP1_C2PMSG_67__CONTENT__SHIFT 0x0 533 #define MP1_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 534 //MP1_C2PMSG_68 535 #define MP1_C2PMSG_68__CONTENT__SHIFT 0x0 536 #define MP1_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 537 //MP1_C2PMSG_69 538 #define MP1_C2PMSG_69__CONTENT__SHIFT 0x0 539 #define MP1_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 540 //MP1_C2PMSG_70 541 #define MP1_C2PMSG_70__CONTENT__SHIFT 0x0 542 #define MP1_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 543 //MP1_C2PMSG_71 544 #define MP1_C2PMSG_71__CONTENT__SHIFT 0x0 545 #define MP1_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 546 //MP1_C2PMSG_72 547 #define MP1_C2PMSG_72__CONTENT__SHIFT 0x0 548 #define MP1_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 549 //MP1_C2PMSG_73 550 #define MP1_C2PMSG_73__CONTENT__SHIFT 0x0 551 #define MP1_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 552 //MP1_C2PMSG_74 553 #define MP1_C2PMSG_74__CONTENT__SHIFT 0x0 554 #define MP1_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 555 //MP1_C2PMSG_75 556 #define MP1_C2PMSG_75__CONTENT__SHIFT 0x0 557 #define MP1_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 558 //MP1_C2PMSG_76 559 #define MP1_C2PMSG_76__CONTENT__SHIFT 0x0 560 #define MP1_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 561 //MP1_C2PMSG_77 562 #define MP1_C2PMSG_77__CONTENT__SHIFT 0x0 563 #define MP1_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 564 //MP1_C2PMSG_78 565 #define MP1_C2PMSG_78__CONTENT__SHIFT 0x0 566 #define MP1_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 567 //MP1_C2PMSG_79 568 #define MP1_C2PMSG_79__CONTENT__SHIFT 0x0 569 #define MP1_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 570 //MP1_C2PMSG_80 571 #define MP1_C2PMSG_80__CONTENT__SHIFT 0x0 572 #define MP1_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 573 //MP1_C2PMSG_81 574 #define MP1_C2PMSG_81__CONTENT__SHIFT 0x0 575 #define MP1_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 576 //MP1_C2PMSG_82 577 #define MP1_C2PMSG_82__CONTENT__SHIFT 0x0 578 #define MP1_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 579 //MP1_C2PMSG_83 580 #define MP1_C2PMSG_83__CONTENT__SHIFT 0x0 581 #define MP1_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 582 //MP1_C2PMSG_84 583 #define MP1_C2PMSG_84__CONTENT__SHIFT 0x0 584 #define MP1_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 585 //MP1_C2PMSG_85 586 #define MP1_C2PMSG_85__CONTENT__SHIFT 0x0 587 #define MP1_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 588 //MP1_C2PMSG_86 589 #define MP1_C2PMSG_86__CONTENT__SHIFT 0x0 590 #define MP1_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 591 //MP1_C2PMSG_87 592 #define MP1_C2PMSG_87__CONTENT__SHIFT 0x0 593 #define MP1_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 594 //MP1_C2PMSG_88 595 #define MP1_C2PMSG_88__CONTENT__SHIFT 0x0 596 #define MP1_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 597 //MP1_C2PMSG_89 598 #define MP1_C2PMSG_89__CONTENT__SHIFT 0x0 599 #define MP1_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 600 //MP1_C2PMSG_90 601 #define MP1_C2PMSG_90__CONTENT__SHIFT 0x0 602 #define MP1_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 603 //MP1_C2PMSG_91 604 #define MP1_C2PMSG_91__CONTENT__SHIFT 0x0 605 #define MP1_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 606 //MP1_C2PMSG_92 607 #define MP1_C2PMSG_92__CONTENT__SHIFT 0x0 608 #define MP1_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 609 //MP1_C2PMSG_93 610 #define MP1_C2PMSG_93__CONTENT__SHIFT 0x0 611 #define MP1_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 612 //MP1_C2PMSG_94 613 #define MP1_C2PMSG_94__CONTENT__SHIFT 0x0 614 #define MP1_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 615 //MP1_C2PMSG_95 616 #define MP1_C2PMSG_95__CONTENT__SHIFT 0x0 617 #define MP1_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 618 //MP1_C2PMSG_96 619 #define MP1_C2PMSG_96__CONTENT__SHIFT 0x0 620 #define MP1_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 621 //MP1_C2PMSG_97 622 #define MP1_C2PMSG_97__CONTENT__SHIFT 0x0 623 #define MP1_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 624 //MP1_C2PMSG_98 625 #define MP1_C2PMSG_98__CONTENT__SHIFT 0x0 626 #define MP1_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 627 //MP1_C2PMSG_99 628 #define MP1_C2PMSG_99__CONTENT__SHIFT 0x0 629 #define MP1_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 630 //MP1_C2PMSG_100 631 #define MP1_C2PMSG_100__CONTENT__SHIFT 0x0 632 #define MP1_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 633 //MP1_C2PMSG_101 634 #define MP1_C2PMSG_101__CONTENT__SHIFT 0x0 635 #define MP1_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 636 //MP1_C2PMSG_102 637 #define MP1_C2PMSG_102__CONTENT__SHIFT 0x0 638 #define MP1_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 639 //MP1_C2PMSG_103 640 #define MP1_C2PMSG_103__CONTENT__SHIFT 0x0 641 #define MP1_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 642 //MP1_ACTIVE_FCN_ID 643 #define MP1_ACTIVE_FCN_ID__VFID__SHIFT 0x0 644 #define MP1_ACTIVE_FCN_ID__VF__SHIFT 0x1f 645 #define MP1_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 646 #define MP1_ACTIVE_FCN_ID__VF_MASK 0x80000000L 647 //MP1_IH_CREDIT 648 #define MP1_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 649 #define MP1_IH_CREDIT__CLIENT_ID__SHIFT 0x10 650 #define MP1_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 651 #define MP1_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 652 //MP1_IH_SW_INT 653 #define MP1_IH_SW_INT__ID__SHIFT 0x0 654 #define MP1_IH_SW_INT__VALID__SHIFT 0x8 655 #define MP1_IH_SW_INT__ID_MASK 0x000000FFL 656 #define MP1_IH_SW_INT__VALID_MASK 0x00000100L 657 //MP1_IH_SW_INT_CTRL 658 #define MP1_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 659 #define MP1_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 660 #define MP1_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 661 #define MP1_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 662 //MP1_FPS_CNT 663 #define MP1_FPS_CNT__COUNT__SHIFT 0x0 664 #define MP1_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 665 //MP1_PUB_CTRL 666 #define MP1_PUB_CTRL__RESET__SHIFT 0x0 667 #define MP1_PUB_CTRL__RESET_MASK 0x00000001L 668 //MP1_EXT_SCRATCH0 669 #define MP1_EXT_SCRATCH0__DATA__SHIFT 0x0 670 #define MP1_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 671 //MP1_EXT_SCRATCH1 672 #define MP1_EXT_SCRATCH1__DATA__SHIFT 0x0 673 #define MP1_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 674 //MP1_EXT_SCRATCH2 675 #define MP1_EXT_SCRATCH2__DATA__SHIFT 0x0 676 #define MP1_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 677 //MP1_EXT_SCRATCH3 678 #define MP1_EXT_SCRATCH3__DATA__SHIFT 0x0 679 #define MP1_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 680 //MP1_EXT_SCRATCH4 681 #define MP1_EXT_SCRATCH4__DATA__SHIFT 0x0 682 #define MP1_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 683 //MP1_EXT_SCRATCH5 684 #define MP1_EXT_SCRATCH5__DATA__SHIFT 0x0 685 #define MP1_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 686 //MP1_EXT_SCRATCH6 687 #define MP1_EXT_SCRATCH6__DATA__SHIFT 0x0 688 #define MP1_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 689 //MP1_EXT_SCRATCH7 690 #define MP1_EXT_SCRATCH7__DATA__SHIFT 0x0 691 #define MP1_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 692 693 694 // addressBlock: mp_SmuMp1_SmnDec 695 //MP1_SMN_C2PMSG_32 696 #define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 697 #define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 698 //MP1_SMN_C2PMSG_33 699 #define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 700 #define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 701 //MP1_SMN_C2PMSG_34 702 #define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 703 #define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 704 //MP1_SMN_C2PMSG_35 705 #define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 706 #define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 707 //MP1_SMN_C2PMSG_36 708 #define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 709 #define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 710 //MP1_SMN_C2PMSG_37 711 #define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 712 #define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 713 //MP1_SMN_C2PMSG_38 714 #define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 715 #define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 716 //MP1_SMN_C2PMSG_39 717 #define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 718 #define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 719 //MP1_SMN_C2PMSG_40 720 #define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 721 #define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 722 //MP1_SMN_C2PMSG_41 723 #define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 724 #define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 725 //MP1_SMN_C2PMSG_42 726 #define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 727 #define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 728 //MP1_SMN_C2PMSG_43 729 #define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 730 #define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 731 //MP1_SMN_C2PMSG_44 732 #define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 733 #define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 734 //MP1_SMN_C2PMSG_45 735 #define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 736 #define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 737 //MP1_SMN_C2PMSG_46 738 #define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 739 #define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 740 //MP1_SMN_C2PMSG_47 741 #define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 742 #define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 743 //MP1_SMN_C2PMSG_48 744 #define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 745 #define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 746 //MP1_SMN_C2PMSG_49 747 #define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 748 #define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 749 //MP1_SMN_C2PMSG_50 750 #define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 751 #define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 752 //MP1_SMN_C2PMSG_51 753 #define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 754 #define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 755 //MP1_SMN_C2PMSG_52 756 #define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 757 #define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 758 //MP1_SMN_C2PMSG_53 759 #define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 760 #define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 761 //MP1_SMN_C2PMSG_54 762 #define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 763 #define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 764 //MP1_SMN_C2PMSG_55 765 #define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 766 #define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 767 //MP1_SMN_C2PMSG_56 768 #define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 769 #define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 770 //MP1_SMN_C2PMSG_57 771 #define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 772 #define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 773 //MP1_SMN_C2PMSG_58 774 #define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 775 #define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 776 //MP1_SMN_C2PMSG_59 777 #define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 778 #define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 779 //MP1_SMN_C2PMSG_60 780 #define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 781 #define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 782 //MP1_SMN_C2PMSG_61 783 #define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 784 #define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 785 //MP1_SMN_C2PMSG_62 786 #define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 787 #define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 788 //MP1_SMN_C2PMSG_63 789 #define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 790 #define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 791 //MP1_SMN_C2PMSG_64 792 #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 793 #define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 794 //MP1_SMN_C2PMSG_65 795 #define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 796 #define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 797 //MP1_SMN_C2PMSG_66 798 #define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 799 #define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 800 //MP1_SMN_C2PMSG_67 801 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 802 #define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 803 //MP1_SMN_C2PMSG_68 804 #define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 805 #define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 806 //MP1_SMN_C2PMSG_69 807 #define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 808 #define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 809 //MP1_SMN_C2PMSG_70 810 #define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 811 #define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 812 //MP1_SMN_C2PMSG_71 813 #define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 814 #define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 815 //MP1_SMN_C2PMSG_72 816 #define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 817 #define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 818 //MP1_SMN_C2PMSG_73 819 #define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 820 #define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 821 //MP1_SMN_C2PMSG_74 822 #define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 823 #define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 824 //MP1_SMN_C2PMSG_75 825 #define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 826 #define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 827 //MP1_SMN_C2PMSG_76 828 #define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 829 #define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 830 //MP1_SMN_C2PMSG_77 831 #define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 832 #define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 833 //MP1_SMN_C2PMSG_78 834 #define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 835 #define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 836 //MP1_SMN_C2PMSG_79 837 #define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 838 #define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 839 //MP1_SMN_C2PMSG_80 840 #define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 841 #define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 842 //MP1_SMN_C2PMSG_81 843 #define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 844 #define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 845 //MP1_SMN_C2PMSG_82 846 #define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 847 #define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 848 //MP1_SMN_C2PMSG_83 849 #define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 850 #define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 851 //MP1_SMN_C2PMSG_84 852 #define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 853 #define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 854 //MP1_SMN_C2PMSG_85 855 #define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 856 #define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 857 //MP1_SMN_C2PMSG_86 858 #define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 859 #define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 860 //MP1_SMN_C2PMSG_87 861 #define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 862 #define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 863 //MP1_SMN_C2PMSG_88 864 #define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 865 #define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 866 //MP1_SMN_C2PMSG_89 867 #define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 868 #define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 869 //MP1_SMN_C2PMSG_90 870 #define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 871 #define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 872 //MP1_SMN_C2PMSG_91 873 #define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 874 #define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 875 //MP1_SMN_C2PMSG_92 876 #define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 877 #define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 878 //MP1_SMN_C2PMSG_93 879 #define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 880 #define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 881 //MP1_SMN_C2PMSG_94 882 #define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 883 #define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 884 //MP1_SMN_C2PMSG_95 885 #define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 886 #define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 887 //MP1_SMN_C2PMSG_96 888 #define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 889 #define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 890 //MP1_SMN_C2PMSG_97 891 #define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 892 #define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 893 //MP1_SMN_C2PMSG_98 894 #define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 895 #define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 896 //MP1_SMN_C2PMSG_99 897 #define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 898 #define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 899 //MP1_SMN_C2PMSG_100 900 #define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 901 #define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 902 //MP1_SMN_C2PMSG_101 903 #define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 904 #define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 905 //MP1_SMN_C2PMSG_102 906 #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 907 #define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 908 //MP1_SMN_C2PMSG_103 909 #define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 910 #define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 911 //MP1_SMN_ACTIVE_FCN_ID 912 #define MP1_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 913 #define MP1_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f 914 #define MP1_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 915 #define MP1_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L 916 //MP1_SMN_IH_CREDIT 917 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 918 #define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 919 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 920 #define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 921 //MP1_SMN_IH_SW_INT 922 #define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0 923 #define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8 924 #define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL 925 #define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L 926 //MP1_SMN_IH_SW_INT_CTRL 927 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 928 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 929 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 930 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 931 //MP1_SMN_FPS_CNT 932 #define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 933 #define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 934 //MP1_SMN_PUB_CTRL 935 #define MP1_SMN_PUB_CTRL__RESET__SHIFT 0x0 936 #define MP1_SMN_PUB_CTRL__RESET_MASK 0x00000001L 937 //MP1_SMN_EXT_SCRATCH0 938 #define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0 939 #define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 940 //MP1_SMN_EXT_SCRATCH1 941 #define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0 942 #define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 943 //MP1_SMN_EXT_SCRATCH2 944 #define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0 945 #define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 946 //MP1_SMN_EXT_SCRATCH3 947 #define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0 948 #define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 949 //MP1_SMN_EXT_SCRATCH4 950 #define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0 951 #define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 952 //MP1_SMN_EXT_SCRATCH5 953 #define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0 954 #define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 955 //MP1_SMN_EXT_SCRATCH6 956 #define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0 957 #define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 958 //MP1_SMN_EXT_SCRATCH7 959 #define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0 960 #define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 961 962 963 #endif 964