1 /* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __MES_API_DEF_H__ 25 #define __MES_API_DEF_H__ 26 27 #pragma pack(push, 4) 28 29 #define MES_API_VERSION 1 30 31 /* Driver submits one API(cmd) as a single Frame and this command size is same 32 * for all API to ease the debugging and parsing of ring buffer. 33 */ 34 enum { API_FRAME_SIZE_IN_DWORDS = 64 }; 35 36 /* To avoid command in scheduler context to be overwritten whenenver mutilple 37 * interrupts come in, this creates another queue. 38 */ 39 enum { API_NUMBER_OF_COMMAND_MAX = 32 }; 40 41 enum MES_API_TYPE { 42 MES_API_TYPE_SCHEDULER = 1, 43 MES_API_TYPE_MAX 44 }; 45 46 enum MES_SCH_API_OPCODE { 47 MES_SCH_API_SET_HW_RSRC = 0, 48 MES_SCH_API_SET_SCHEDULING_CONFIG = 1, /* agreegated db, quantums, etc */ 49 MES_SCH_API_ADD_QUEUE = 2, 50 MES_SCH_API_REMOVE_QUEUE = 3, 51 MES_SCH_API_PERFORM_YIELD = 4, 52 MES_SCH_API_SET_GANG_PRIORITY_LEVEL = 5, 53 MES_SCH_API_SUSPEND = 6, 54 MES_SCH_API_RESUME = 7, 55 MES_SCH_API_RESET = 8, 56 MES_SCH_API_SET_LOG_BUFFER = 9, 57 MES_SCH_API_CHANGE_GANG_PRORITY = 10, 58 MES_SCH_API_QUERY_SCHEDULER_STATUS = 11, 59 MES_SCH_API_PROGRAM_GDS = 12, 60 MES_SCH_API_SET_DEBUG_VMID = 13, 61 MES_SCH_API_MISC = 14, 62 MES_SCH_API_UPDATE_ROOT_PAGE_TABLE = 15, 63 MES_SCH_API_AMD_LOG = 16, 64 MES_SCH_API_MAX = 0xFF 65 }; 66 67 union MES_API_HEADER { 68 struct { 69 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */ 70 uint32_t opcode : 8; 71 uint32_t dwsize : 8; /* including header */ 72 uint32_t reserved : 12; 73 }; 74 75 uint32_t u32All; 76 }; 77 78 enum MES_AMD_PRIORITY_LEVEL { 79 AMD_PRIORITY_LEVEL_LOW = 0, 80 AMD_PRIORITY_LEVEL_NORMAL = 1, 81 AMD_PRIORITY_LEVEL_MEDIUM = 2, 82 AMD_PRIORITY_LEVEL_HIGH = 3, 83 AMD_PRIORITY_LEVEL_REALTIME = 4, 84 AMD_PRIORITY_NUM_LEVELS 85 }; 86 87 enum MES_QUEUE_TYPE { 88 MES_QUEUE_TYPE_GFX, 89 MES_QUEUE_TYPE_COMPUTE, 90 MES_QUEUE_TYPE_SDMA, 91 MES_QUEUE_TYPE_MAX, 92 }; 93 94 struct MES_API_STATUS { 95 uint64_t api_completion_fence_addr; 96 uint64_t api_completion_fence_value; 97 }; 98 99 enum { MAX_COMPUTE_PIPES = 8 }; 100 enum { MAX_GFX_PIPES = 2 }; 101 enum { MAX_SDMA_PIPES = 2 }; 102 103 enum { MAX_COMPUTE_HQD_PER_PIPE = 8 }; 104 enum { MAX_GFX_HQD_PER_PIPE = 8 }; 105 enum { MAX_SDMA_HQD_PER_PIPE = 10 }; 106 enum { MAX_SDMA_HQD_PER_PIPE_11_0 = 8 }; 107 108 enum { MAX_QUEUES_IN_A_GANG = 8 }; 109 110 enum VM_HUB_TYPE { 111 VM_HUB_TYPE_GC = 0, 112 VM_HUB_TYPE_MM = 1, 113 VM_HUB_TYPE_MAX, 114 }; 115 116 enum { VMID_INVALID = 0xffff }; 117 118 enum { MAX_VMID_GCHUB = 16 }; 119 enum { MAX_VMID_MMHUB = 16 }; 120 121 enum SET_DEBUG_VMID_OPERATIONS { 122 DEBUG_VMID_OP_PROGRAM = 0, 123 DEBUG_VMID_OP_ALLOCATE = 1, 124 DEBUG_VMID_OP_RELEASE = 2 125 }; 126 127 enum MES_LOG_OPERATION { 128 MES_LOG_OPERATION_CONTEXT_STATE_CHANGE = 0, 129 MES_LOG_OPERATION_QUEUE_NEW_WORK = 1, 130 MES_LOG_OPERATION_QUEUE_UNWAIT_SYNC_OBJECT = 2, 131 MES_LOG_OPERATION_QUEUE_NO_MORE_WORK = 3, 132 MES_LOG_OPERATION_QUEUE_WAIT_SYNC_OBJECT = 4, 133 MES_LOG_OPERATION_QUEUE_INVALID = 0xF, 134 }; 135 136 enum MES_LOG_CONTEXT_STATE { 137 MES_LOG_CONTEXT_STATE_IDLE = 0, 138 MES_LOG_CONTEXT_STATE_RUNNING = 1, 139 MES_LOG_CONTEXT_STATE_READY = 2, 140 MES_LOG_CONTEXT_STATE_READY_STANDBY = 3, 141 MES_LOG_CONTEXT_STATE_INVALID = 0xF, 142 }; 143 144 struct MES_LOG_CONTEXT_STATE_CHANGE { 145 void *h_context; 146 enum MES_LOG_CONTEXT_STATE new_context_state; 147 }; 148 149 struct MES_LOG_QUEUE_NEW_WORK { 150 uint64_t h_queue; 151 uint64_t reserved; 152 }; 153 154 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT { 155 uint64_t h_queue; 156 uint64_t h_sync_object; 157 }; 158 159 struct MES_LOG_QUEUE_NO_MORE_WORK { 160 uint64_t h_queue; 161 uint64_t reserved; 162 }; 163 164 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT { 165 uint64_t h_queue; 166 uint64_t h_sync_object; 167 }; 168 169 struct MES_LOG_ENTRY_HEADER { 170 uint32_t first_free_entry_index; 171 uint32_t wraparound_count; 172 uint64_t number_of_entries; 173 uint64_t reserved[2]; 174 }; 175 176 struct MES_LOG_ENTRY_DATA { 177 uint64_t gpu_time_stamp; 178 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */ 179 uint32_t reserved_operation_type_bits; 180 union { 181 struct MES_LOG_CONTEXT_STATE_CHANGE context_state_change; 182 struct MES_LOG_QUEUE_NEW_WORK queue_new_work; 183 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT queue_unwait_sync_object; 184 struct MES_LOG_QUEUE_NO_MORE_WORK queue_no_more_work; 185 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT queue_wait_sync_object; 186 uint64_t all[2]; 187 }; 188 }; 189 190 struct MES_LOG_BUFFER { 191 struct MES_LOG_ENTRY_HEADER header; 192 struct MES_LOG_ENTRY_DATA entries[1]; 193 }; 194 195 enum MES_SWIP_TO_HWIP_DEF { 196 MES_MAX_HWIP_SEGMENT = 6, 197 }; 198 199 union MESAPI_SET_HW_RESOURCES { 200 struct { 201 union MES_API_HEADER header; 202 uint32_t vmid_mask_mmhub; 203 uint32_t vmid_mask_gfxhub; 204 uint32_t gds_size; 205 uint32_t paging_vmid; 206 uint32_t compute_hqd_mask[MAX_COMPUTE_PIPES]; 207 uint32_t gfx_hqd_mask[MAX_GFX_PIPES]; 208 uint32_t sdma_hqd_mask[MAX_SDMA_PIPES]; 209 uint32_t aggregated_doorbells[AMD_PRIORITY_NUM_LEVELS]; 210 uint64_t g_sch_ctx_gpu_mc_ptr; 211 uint64_t query_status_fence_gpu_mc_ptr; 212 uint32_t gc_base[MES_MAX_HWIP_SEGMENT]; 213 uint32_t mmhub_base[MES_MAX_HWIP_SEGMENT]; 214 uint32_t osssys_base[MES_MAX_HWIP_SEGMENT]; 215 struct MES_API_STATUS api_status; 216 union { 217 struct { 218 uint32_t disable_reset : 1; 219 uint32_t use_different_vmid_compute : 1; 220 uint32_t disable_mes_log : 1; 221 uint32_t apply_mmhub_pgvm_invalidate_ack_loss_wa : 1; 222 uint32_t apply_grbm_remote_register_dummy_read_wa : 1; 223 uint32_t second_gfx_pipe_enabled : 1; 224 uint32_t enable_level_process_quantum_check : 1; 225 uint32_t reserved : 25; 226 }; 227 uint32_t uint32_t_all; 228 }; 229 }; 230 231 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 232 }; 233 234 union MESAPI__ADD_QUEUE { 235 struct { 236 union MES_API_HEADER header; 237 uint32_t process_id; 238 uint64_t page_table_base_addr; 239 uint64_t process_va_start; 240 uint64_t process_va_end; 241 uint64_t process_quantum; 242 uint64_t process_context_addr; 243 uint64_t gang_quantum; 244 uint64_t gang_context_addr; 245 uint32_t inprocess_gang_priority; 246 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level; 247 uint32_t doorbell_offset; 248 uint64_t mqd_addr; 249 uint64_t wptr_addr; 250 uint64_t h_context; 251 uint64_t h_queue; 252 enum MES_QUEUE_TYPE queue_type; 253 uint32_t gds_base; 254 uint32_t gds_size; 255 uint32_t gws_base; 256 uint32_t gws_size; 257 uint32_t oa_mask; 258 uint64_t trap_handler_addr; 259 uint32_t vm_context_cntl; 260 261 struct { 262 uint32_t paging : 1; 263 uint32_t debug_vmid : 4; 264 uint32_t program_gds : 1; 265 uint32_t is_gang_suspended : 1; 266 uint32_t is_tmz_queue : 1; 267 uint32_t map_kiq_utility_queue : 1; 268 uint32_t reserved : 23; 269 }; 270 struct MES_API_STATUS api_status; 271 uint64_t tma_addr; 272 }; 273 274 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 275 }; 276 277 union MESAPI__REMOVE_QUEUE { 278 struct { 279 union MES_API_HEADER header; 280 uint32_t doorbell_offset; 281 uint64_t gang_context_addr; 282 283 struct { 284 uint32_t unmap_legacy_gfx_queue : 1; 285 uint32_t unmap_kiq_utility_queue : 1; 286 uint32_t preempt_legacy_gfx_queue : 1; 287 uint32_t reserved : 29; 288 }; 289 struct MES_API_STATUS api_status; 290 291 uint32_t pipe_id; 292 uint32_t queue_id; 293 294 uint64_t tf_addr; 295 uint32_t tf_data; 296 }; 297 298 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 299 }; 300 301 union MESAPI__SET_SCHEDULING_CONFIG { 302 struct { 303 union MES_API_HEADER header; 304 /* Grace period when preempting another priority band for this 305 * priority band. The value for idle priority band is ignored, 306 * as it never preempts other bands. 307 */ 308 uint64_t grace_period_other_levels[AMD_PRIORITY_NUM_LEVELS]; 309 /* Default quantum for scheduling across processes within 310 * a priority band. 311 */ 312 uint64_t process_quantum_for_level[AMD_PRIORITY_NUM_LEVELS]; 313 /* Default grace period for processes that preempt each other 314 * within a priority band. 315 */ 316 uint64_t process_grace_period_same_level[AMD_PRIORITY_NUM_LEVELS]; 317 /* For normal level this field specifies the target GPU 318 * percentage in situations when it's starved by the high level. 319 * Valid values are between 0 and 50, with the default being 10. 320 */ 321 uint32_t normal_yield_percent; 322 struct MES_API_STATUS api_status; 323 }; 324 325 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 326 }; 327 328 union MESAPI__PERFORM_YIELD { 329 struct { 330 union MES_API_HEADER header; 331 uint32_t dummy; 332 struct MES_API_STATUS api_status; 333 }; 334 335 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 336 }; 337 338 union MESAPI__CHANGE_GANG_PRIORITY_LEVEL { 339 struct { 340 union MES_API_HEADER header; 341 uint32_t inprocess_gang_priority; 342 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level; 343 uint64_t gang_quantum; 344 uint64_t gang_context_addr; 345 struct MES_API_STATUS api_status; 346 }; 347 348 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 349 }; 350 351 union MESAPI__SUSPEND { 352 struct { 353 union MES_API_HEADER header; 354 /* false - suspend all gangs; true - specific gang */ 355 struct { 356 uint32_t suspend_all_gangs : 1; 357 uint32_t reserved : 31; 358 }; 359 /* gang_context_addr is valid only if suspend_all = false */ 360 uint64_t gang_context_addr; 361 362 uint64_t suspend_fence_addr; 363 uint32_t suspend_fence_value; 364 365 struct MES_API_STATUS api_status; 366 }; 367 368 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 369 }; 370 371 union MESAPI__RESUME { 372 struct { 373 union MES_API_HEADER header; 374 /* false - resume all gangs; true - specified gang */ 375 struct { 376 uint32_t resume_all_gangs : 1; 377 uint32_t reserved : 31; 378 }; 379 /* valid only if resume_all_gangs = false */ 380 uint64_t gang_context_addr; 381 382 struct MES_API_STATUS api_status; 383 }; 384 385 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 386 }; 387 388 union MESAPI__RESET { 389 struct { 390 union MES_API_HEADER header; 391 392 struct { 393 /* Only reset the queue given by doorbell_offset (not entire gang) */ 394 uint32_t reset_queue_only : 1; 395 /* Hang detection first then reset any queues that are hung */ 396 uint32_t hang_detect_then_reset : 1; 397 /* Only do hang detection (no reset) */ 398 uint32_t hang_detect_only : 1; 399 /* Rest HP and LP kernel queues not managed by MES */ 400 uint32_t reset_legacy_gfx : 1; 401 uint32_t reserved : 28; 402 }; 403 404 uint64_t gang_context_addr; 405 406 /* valid only if reset_queue_only = true */ 407 uint32_t doorbell_offset; 408 409 /* valid only if hang_detect_then_reset = true */ 410 uint64_t doorbell_offset_addr; 411 enum MES_QUEUE_TYPE queue_type; 412 413 /* valid only if reset_legacy_gfx = true */ 414 uint32_t pipe_id_lp; 415 uint32_t queue_id_lp; 416 uint32_t vmid_id_lp; 417 uint64_t mqd_mc_addr_lp; 418 uint32_t doorbell_offset_lp; 419 uint64_t wptr_addr_lp; 420 421 uint32_t pipe_id_hp; 422 uint32_t queue_id_hp; 423 uint32_t vmid_id_hp; 424 uint64_t mqd_mc_addr_hp; 425 uint32_t doorbell_offset_hp; 426 uint64_t wptr_addr_hp; 427 428 struct MES_API_STATUS api_status; 429 }; 430 431 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 432 }; 433 434 union MESAPI__SET_LOGGING_BUFFER { 435 struct { 436 union MES_API_HEADER header; 437 /* There are separate log buffers for each queue type */ 438 enum MES_QUEUE_TYPE log_type; 439 /* Log buffer GPU Address */ 440 uint64_t logging_buffer_addr; 441 /* number of entries in the log buffer */ 442 uint32_t number_of_entries; 443 /* Entry index at which CPU interrupt needs to be signalled */ 444 uint32_t interrupt_entry; 445 446 struct MES_API_STATUS api_status; 447 }; 448 449 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 450 }; 451 452 union MESAPI__QUERY_MES_STATUS { 453 struct { 454 union MES_API_HEADER header; 455 bool mes_healthy; /* 0 - not healthy, 1 - healthy */ 456 struct MES_API_STATUS api_status; 457 }; 458 459 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 460 }; 461 462 union MESAPI__PROGRAM_GDS { 463 struct { 464 union MES_API_HEADER header; 465 uint64_t process_context_addr; 466 uint32_t gds_base; 467 uint32_t gds_size; 468 uint32_t gws_base; 469 uint32_t gws_size; 470 uint32_t oa_mask; 471 struct MES_API_STATUS api_status; 472 }; 473 474 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 475 }; 476 477 union MESAPI__SET_DEBUG_VMID { 478 struct { 479 union MES_API_HEADER header; 480 struct MES_API_STATUS api_status; 481 union { 482 struct { 483 uint32_t use_gds : 1; 484 uint32_t operation : 2; 485 uint32_t reserved : 29; 486 } flags; 487 uint32_t u32All; 488 }; 489 uint32_t reserved; 490 uint32_t debug_vmid; 491 uint64_t process_context_addr; 492 uint64_t page_table_base_addr; 493 uint64_t process_va_start; 494 uint64_t process_va_end; 495 uint32_t gds_base; 496 uint32_t gds_size; 497 uint32_t gws_base; 498 uint32_t gws_size; 499 uint32_t oa_mask; 500 501 /* output addr of the acquired vmid value */ 502 uint64_t output_addr; 503 }; 504 505 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 506 }; 507 508 enum MESAPI_MISC_OPCODE { 509 MESAPI_MISC__MODIFY_REG, 510 MESAPI_MISC__INV_GART, 511 MESAPI_MISC__QUERY_STATUS, 512 MESAPI_MISC__MAX, 513 }; 514 515 enum MODIFY_REG_SUBCODE { 516 MODIFY_REG__OVERWRITE, 517 MODIFY_REG__RMW_OR, 518 MODIFY_REG__RMW_AND, 519 MODIFY_REG__MAX, 520 }; 521 522 enum { MISC_DATA_MAX_SIZE_IN_DWORDS = 20 }; 523 524 struct MODIFY_REG { 525 enum MODIFY_REG_SUBCODE subcode; 526 uint32_t reg_offset; 527 uint32_t reg_value; 528 }; 529 530 struct INV_GART { 531 uint64_t inv_range_va_start; 532 uint64_t inv_range_size; 533 }; 534 535 struct QUERY_STATUS { 536 uint32_t context_id; 537 }; 538 539 union MESAPI__MISC { 540 struct { 541 union MES_API_HEADER header; 542 enum MESAPI_MISC_OPCODE opcode; 543 struct MES_API_STATUS api_status; 544 545 union { 546 struct MODIFY_REG modify_reg; 547 struct INV_GART inv_gart; 548 struct QUERY_STATUS query_status; 549 uint32_t data[MISC_DATA_MAX_SIZE_IN_DWORDS]; 550 }; 551 }; 552 553 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 554 }; 555 556 union MESAPI__UPDATE_ROOT_PAGE_TABLE { 557 struct { 558 union MES_API_HEADER header; 559 uint64_t page_table_base_addr; 560 uint64_t process_context_addr; 561 struct MES_API_STATUS api_status; 562 }; 563 564 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 565 }; 566 567 union MESAPI_AMD_LOG { 568 struct { 569 union MES_API_HEADER header; 570 uint64_t p_buffer_memory; 571 uint64_t p_buffer_size_used; 572 struct MES_API_STATUS api_status; 573 }; 574 575 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 576 }; 577 578 #pragma pack(pop) 579 #endif 580