1 /* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __SMU_V13_0_4_PPSMC_H__ 25 #define __SMU_V13_0_4_PPSMC_H__ 26 27 /*! @mainpage PMFW-PPS (PPLib) Message Interface 28 This documentation contains the subsections:\n\n 29 @ref ResponseCodes\n 30 @ref definitions\n 31 @ref enums\n 32 */ 33 34 /** @def PPS_PMFW_IF_VER 35 * PPS (PPLib) to PMFW IF version 1.0 36 */ 37 #define PPS_PMFW_IF_VER "1.0" ///< Major.Minor 38 39 /** @defgroup ResponseCodes PMFW Response Codes 40 * @{ 41 */ 42 // SMU Response Codes: 43 #define PPSMC_Result_OK 0x1 ///< Message Response OK 44 #define PPSMC_Result_Failed 0xFF ///< Message Response Failed 45 #define PPSMC_Result_UnknownCmd 0xFE ///< Message Response Unknown Command 46 #define PPSMC_Result_CmdRejectedPrereq 0xFD ///< Message Response Command Failed Prerequisite 47 #define PPSMC_Result_CmdRejectedBusy 0xFC ///< Message Response Command Rejected due to PMFW is busy. Sender should retry sending this message 48 /** @}*/ 49 50 /** @defgroup definitions Message definitions 51 * @{ 52 */ 53 // Message Definitions: 54 #define PPSMC_MSG_TestMessage 0x01 ///< To check if PMFW is alive and responding. Requirement specified by PMFW team 55 #define PPSMC_MSG_GetPmfwVersion 0x02 ///< Get PMFW version 56 #define PPSMC_MSG_GetDriverIfVersion 0x03 ///< Get PMFW_DRIVER_IF version 57 #define PPSMC_MSG_EnableGfxOff 0x04 ///< Enable GFXOFF 58 #define PPSMC_MSG_DisableGfxOff 0x05 ///< Disable GFXOFF 59 #define PPSMC_MSG_PowerDownVcn 0x06 ///< Power down VCN 60 #define PPSMC_MSG_PowerUpVcn 0x07 ///< Power up VCN; VCN is power gated by default 61 #define PPSMC_MSG_SetHardMinVcn 0x08 ///< For wireless display 62 #define PPSMC_MSG_SetSoftMinGfxclk 0x09 ///< Set SoftMin for GFXCLK, argument is frequency in MHz 63 #define PPSMC_MSG_ActiveProcessNotify 0x0A ///< Needs update 64 #define PPSMC_MSG_ForcePowerDownGfx 0x0B ///< Force power down GFX, i.e. enter GFXOFF 65 #define PPSMC_MSG_PrepareMp1ForUnload 0x0C ///< Prepare PMFW for GFX driver unload 66 #define PPSMC_MSG_SetDriverDramAddrHigh 0x0D ///< Set high 32 bits of DRAM address for Driver table transfer 67 #define PPSMC_MSG_SetDriverDramAddrLow 0x0E ///< Set low 32 bits of DRAM address for Driver table transfer 68 #define PPSMC_MSG_TransferTableSmu2Dram 0x0F ///< Transfer driver interface table from PMFW SRAM to DRAM 69 #define PPSMC_MSG_TransferTableDram2Smu 0x10 ///< Transfer driver interface table from DRAM to PMFW SRAM 70 #define PPSMC_MSG_GfxDeviceDriverReset 0x11 ///< Request GFX mode 2 reset 71 #define PPSMC_MSG_GetEnabledSmuFeatures 0x12 ///< Get enabled features in PMFW 72 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x13 ///< Set hard min for SOC CLK 73 #define PPSMC_MSG_SetSoftMinFclk 0x14 ///< Set hard min for FCLK 74 #define PPSMC_MSG_SetSoftMinVcn 0x15 ///< Set soft min for VCN clocks (VCLK and DCLK) 75 76 77 #define PPSMC_MSG_EnableGfxImu 0x16 ///< Needs update 78 79 #define PPSMC_MSG_GetGfxclkFrequency 0x17 ///< Get GFX clock frequency 80 #define PPSMC_MSG_GetFclkFrequency 0x18 ///< Get FCLK frequency 81 #define PPSMC_MSG_AllowGfxOff 0x19 ///< Inform PMFW of allowing GFXOFF entry 82 #define PPSMC_MSG_DisallowGfxOff 0x1A ///< Inform PMFW of disallowing GFXOFF entry 83 #define PPSMC_MSG_SetSoftMaxGfxClk 0x1B ///< Set soft max for GFX CLK 84 #define PPSMC_MSG_SetHardMinGfxClk 0x1C ///< Set hard min for GFX CLK 85 86 #define PPSMC_MSG_SetSoftMaxSocclkByFreq 0x1D ///< Set soft max for SOC CLK 87 #define PPSMC_MSG_SetSoftMaxFclkByFreq 0x1E ///< Set soft max for FCLK 88 #define PPSMC_MSG_SetSoftMaxVcn 0x1F ///< Set soft max for VCN clocks (VCLK and DCLK) 89 #define PPSMC_MSG_SetPowerLimitPercentage 0x20 ///< Set power limit percentage 90 #define PPSMC_MSG_PowerDownJpeg 0x21 ///< Power down Jpeg 91 #define PPSMC_MSG_PowerUpJpeg 0x22 ///< Power up Jpeg; VCN is power gated by default 92 93 #define PPSMC_MSG_SetHardMinFclkByFreq 0x23 ///< Set hard min for FCLK 94 #define PPSMC_MSG_SetSoftMinSocclkByFreq 0x24 ///< Set soft min for SOC CLK 95 #define PPSMC_MSG_AllowZstates 0x25 ///< Inform PMFM of allowing Zstate entry, i.e. no Miracast activity 96 #define PPSMC_MSG_Reserved 0x26 ///< Not used 97 #define PPSMC_MSG_Reserved1 0x27 ///< Not used, previously PPSMC_MSG_RequestActiveWgp 98 #define PPSMC_MSG_Reserved2 0x28 ///< Not used, previously PPSMC_MSG_QueryActiveWgp 99 #define PPSMC_MSG_PowerDownIspByTile 0x29 ///< ISP is power gated by default 100 #define PPSMC_MSG_PowerUpIspByTile 0x2A ///< This message is used to power up ISP tiles and enable the ISP DPM 101 #define PPSMC_MSG_SetHardMinIspiclkByFreq 0x2B ///< Set HardMin by frequency for ISPICLK 102 #define PPSMC_MSG_SetHardMinIspxclkByFreq 0x2C ///< Set HardMin by frequency for ISPXCLK 103 #define PPSMC_MSG_PowerDownUmsch 0x2D ///< Power down VCN.UMSCH (aka VSCH) scheduler 104 #define PPSMC_MSG_PowerUpUmsch 0x2E ///< Power up VCN.UMSCH (aka VSCH) scheduler 105 #define PPSMC_Message_IspStutterOn_MmhubPgDis 0x2F ///< ISP StutterOn mmHub PgDis 106 #define PPSMC_Message_IspStutterOff_MmhubPgEn 0x30 ///< ISP StufferOff mmHub PgEn 107 108 #define PPSMC_Message_Count 0x31 ///< Total number of PPSMC messages 109 /** @}*/ 110 111 /** 112 * @defgroup enums Enum Definitions 113 * @{ 114 */ 115 116 /** @enum Mode_Reset_e 117 * Mode reset type, argument for PPSMC_MSG_GfxDeviceDriverReset 118 */ 119 //argument for PPSMC_MSG_GfxDeviceDriverReset 120 typedef enum { 121 MODE1_RESET = 1, ///< Mode reset type 1 122 MODE2_RESET = 2 ///< Mode reset type 2 123 } Mode_Reset_e; 124 125 /** @}*/ 126 127 /** @enum ZStates_e 128 * Zstate types, argument for PPSMC_MSG_AllowZstates 129 */ 130 //Argument for PPSMC_MSG_AllowZstates 131 typedef enum { 132 DISALLOW_ZSTATES = 0, ///< Disallow Zstates 133 ALLOW_ZSTATES_Z8 = 8, ///< Allows Z8 only 134 ALLOW_ZSTATES_Z9 = 9, ///< Allows Z9 and Z8 135 } ZStates_e; 136 137 /** @}*/ 138 #endif 139