xref: /linux/drivers/gpu/drm/i915/display/intel_cdclk.h (revision 9a6b55ac)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_CDCLK_H__
7 #define __INTEL_CDCLK_H__
8 
9 #include <linux/types.h>
10 
11 #include "intel_display.h"
12 
13 struct drm_i915_private;
14 struct intel_atomic_state;
15 struct intel_cdclk_state;
16 struct intel_crtc_state;
17 
18 struct intel_cdclk_vals {
19 	u16 refclk;
20 	u32 cdclk;
21 	u8 divider;	/* CD2X divider * 2 */
22 	u8 ratio;
23 };
24 
25 int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
26 void intel_cdclk_init(struct drm_i915_private *i915);
27 void intel_cdclk_uninit(struct drm_i915_private *i915);
28 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
29 void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
30 void intel_update_cdclk(struct drm_i915_private *dev_priv);
31 void intel_update_rawclk(struct drm_i915_private *dev_priv);
32 bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
33 			       const struct intel_cdclk_state *b);
34 void intel_cdclk_swap_state(struct intel_atomic_state *state);
35 void
36 intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,
37 				 const struct intel_cdclk_state *old_state,
38 				 const struct intel_cdclk_state *new_state,
39 				 enum pipe pipe);
40 void
41 intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv,
42 				  const struct intel_cdclk_state *old_state,
43 				  const struct intel_cdclk_state *new_state,
44 				  enum pipe pipe);
45 void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
46 			    const char *context);
47 int intel_modeset_calc_cdclk(struct intel_atomic_state *state);
48 
49 #endif /* __INTEL_CDCLK_H__ */
50