1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * 24 */ 25 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_dp_dual_mode_helper.h> 28 #include <drm/drm_edid.h> 29 30 #include "intel_display_types.h" 31 #include "intel_dp.h" 32 #include "intel_lspcon.h" 33 34 /* LSPCON OUI Vendor ID(signatures) */ 35 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 36 #define LSPCON_VENDOR_MCA_OUI 0x0060AD 37 38 /* AUX addresses to write MCA AVI IF */ 39 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 40 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF 41 #define LSPCON_MCA_AVI_IF_KICKOFF (1 << 0) 42 #define LSPCON_MCA_AVI_IF_HANDLED (1 << 1) 43 44 /* AUX addresses to write Parade AVI IF */ 45 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516 46 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E 47 #define LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7) 48 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32 49 50 static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon) 51 { 52 struct intel_digital_port *dig_port = 53 container_of(lspcon, struct intel_digital_port, lspcon); 54 55 return &dig_port->dp; 56 } 57 58 static const char *lspcon_mode_name(enum drm_lspcon_mode mode) 59 { 60 switch (mode) { 61 case DRM_LSPCON_MODE_PCON: 62 return "PCON"; 63 case DRM_LSPCON_MODE_LS: 64 return "LS"; 65 case DRM_LSPCON_MODE_INVALID: 66 return "INVALID"; 67 default: 68 MISSING_CASE(mode); 69 return "INVALID"; 70 } 71 } 72 73 static bool lspcon_detect_vendor(struct intel_lspcon *lspcon) 74 { 75 struct intel_dp *dp = lspcon_to_intel_dp(lspcon); 76 struct drm_dp_dpcd_ident *ident; 77 u32 vendor_oui; 78 79 if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) { 80 DRM_ERROR("Can't read description\n"); 81 return false; 82 } 83 84 ident = &dp->desc.ident; 85 vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) | 86 ident->oui[2]; 87 88 switch (vendor_oui) { 89 case LSPCON_VENDOR_MCA_OUI: 90 lspcon->vendor = LSPCON_VENDOR_MCA; 91 DRM_DEBUG_KMS("Vendor: Mega Chips\n"); 92 break; 93 94 case LSPCON_VENDOR_PARADE_OUI: 95 lspcon->vendor = LSPCON_VENDOR_PARADE; 96 DRM_DEBUG_KMS("Vendor: Parade Tech\n"); 97 break; 98 99 default: 100 DRM_ERROR("Invalid/Unknown vendor OUI\n"); 101 return false; 102 } 103 104 return true; 105 } 106 107 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon) 108 { 109 enum drm_lspcon_mode current_mode; 110 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc; 111 112 if (drm_lspcon_get_mode(adapter, ¤t_mode)) { 113 DRM_DEBUG_KMS("Error reading LSPCON mode\n"); 114 return DRM_LSPCON_MODE_INVALID; 115 } 116 return current_mode; 117 } 118 119 static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon, 120 enum drm_lspcon_mode mode) 121 { 122 enum drm_lspcon_mode current_mode; 123 124 current_mode = lspcon_get_current_mode(lspcon); 125 if (current_mode == mode) 126 goto out; 127 128 DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n", 129 lspcon_mode_name(mode)); 130 131 wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400); 132 if (current_mode != mode) 133 DRM_ERROR("LSPCON mode hasn't settled\n"); 134 135 out: 136 DRM_DEBUG_KMS("Current LSPCON mode %s\n", 137 lspcon_mode_name(current_mode)); 138 139 return current_mode; 140 } 141 142 static int lspcon_change_mode(struct intel_lspcon *lspcon, 143 enum drm_lspcon_mode mode) 144 { 145 int err; 146 enum drm_lspcon_mode current_mode; 147 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc; 148 149 err = drm_lspcon_get_mode(adapter, ¤t_mode); 150 if (err) { 151 DRM_ERROR("Error reading LSPCON mode\n"); 152 return err; 153 } 154 155 if (current_mode == mode) { 156 DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n"); 157 return 0; 158 } 159 160 err = drm_lspcon_set_mode(adapter, mode); 161 if (err < 0) { 162 DRM_ERROR("LSPCON mode change failed\n"); 163 return err; 164 } 165 166 lspcon->mode = mode; 167 DRM_DEBUG_KMS("LSPCON mode changed done\n"); 168 return 0; 169 } 170 171 static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon) 172 { 173 u8 rev; 174 175 if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV, 176 &rev) != 1) { 177 DRM_DEBUG_KMS("Native AUX CH down\n"); 178 return false; 179 } 180 181 DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n", 182 rev >> 4, rev & 0xf); 183 184 return true; 185 } 186 187 void lspcon_ycbcr420_config(struct drm_connector *connector, 188 struct intel_crtc_state *crtc_state) 189 { 190 const struct drm_display_info *info = &connector->display_info; 191 const struct drm_display_mode *adjusted_mode = 192 &crtc_state->hw.adjusted_mode; 193 194 if (drm_mode_is_420_only(info, adjusted_mode) && 195 connector->ycbcr_420_allowed) { 196 crtc_state->port_clock /= 2; 197 crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR444; 198 crtc_state->lspcon_downsampling = true; 199 } 200 } 201 202 static bool lspcon_probe(struct intel_lspcon *lspcon) 203 { 204 int retry; 205 enum drm_dp_dual_mode_type adaptor_type; 206 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc; 207 enum drm_lspcon_mode expected_mode; 208 209 expected_mode = lspcon_wake_native_aux_ch(lspcon) ? 210 DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS; 211 212 /* Lets probe the adaptor and check its type */ 213 for (retry = 0; retry < 6; retry++) { 214 if (retry) 215 usleep_range(500, 1000); 216 217 adaptor_type = drm_dp_dual_mode_detect(adapter); 218 if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON) 219 break; 220 } 221 222 if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) { 223 DRM_DEBUG_KMS("No LSPCON detected, found %s\n", 224 drm_dp_get_dual_mode_type_name(adaptor_type)); 225 return false; 226 } 227 228 /* Yay ... got a LSPCON device */ 229 DRM_DEBUG_KMS("LSPCON detected\n"); 230 lspcon->mode = lspcon_wait_mode(lspcon, expected_mode); 231 232 /* 233 * In the SW state machine, lets Put LSPCON in PCON mode only. 234 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI 235 * 2.0 sinks. 236 */ 237 if (lspcon->mode != DRM_LSPCON_MODE_PCON) { 238 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) { 239 DRM_ERROR("LSPCON mode change to PCON failed\n"); 240 return false; 241 } 242 } 243 return true; 244 } 245 246 static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon) 247 { 248 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon); 249 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 250 unsigned long start = jiffies; 251 252 while (1) { 253 if (intel_digital_port_connected(&dig_port->base)) { 254 DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n", 255 jiffies_to_msecs(jiffies - start)); 256 return; 257 } 258 259 if (time_after(jiffies, start + msecs_to_jiffies(1000))) 260 break; 261 262 usleep_range(10000, 15000); 263 } 264 265 DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n"); 266 } 267 268 static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux) 269 { 270 u8 avi_if_ctrl; 271 u8 retry; 272 ssize_t ret; 273 274 /* Check if LSPCON FW is ready for data */ 275 for (retry = 0; retry < 5; retry++) { 276 if (retry) 277 usleep_range(200, 300); 278 279 ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL, 280 &avi_if_ctrl, 1); 281 if (ret < 0) { 282 DRM_ERROR("Failed to read AVI IF control\n"); 283 return false; 284 } 285 286 if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0) 287 return true; 288 } 289 290 DRM_ERROR("Parade FW not ready to accept AVI IF\n"); 291 return false; 292 } 293 294 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux, 295 u8 *avi_buf) 296 { 297 u8 avi_if_ctrl; 298 u8 block_count = 0; 299 u8 *data; 300 u16 reg; 301 ssize_t ret; 302 303 while (block_count < 4) { 304 if (!lspcon_parade_fw_ready(aux)) { 305 DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n", 306 block_count); 307 return false; 308 } 309 310 reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET; 311 data = avi_buf + block_count * 8; 312 ret = drm_dp_dpcd_write(aux, reg, data, 8); 313 if (ret < 0) { 314 DRM_ERROR("Failed to write AVI IF block %d\n", 315 block_count); 316 return false; 317 } 318 319 /* 320 * Once a block of data is written, we have to inform the FW 321 * about this by writing into avi infoframe control register: 322 * - set the kickoff bit[7] to 1 323 * - write the block no. to bits[1:0] 324 */ 325 reg = LSPCON_PARADE_AVI_IF_CTRL; 326 avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count; 327 ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1); 328 if (ret < 0) { 329 DRM_ERROR("Failed to update (0x%x), block %d\n", 330 reg, block_count); 331 return false; 332 } 333 334 block_count++; 335 } 336 337 DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n"); 338 return true; 339 } 340 341 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux, 342 const u8 *frame, 343 ssize_t len) 344 { 345 u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, }; 346 347 /* 348 * Parade's frames contains 32 bytes of data, divided 349 * into 4 frames: 350 * Token byte (first byte of first frame, must be non-zero) 351 * HB0 to HB2 from AVI IF (3 bytes header) 352 * PB0 to PB27 from AVI IF (28 bytes data) 353 * So it should look like this 354 * first block: | <token> <HB0-HB2> <DB0-DB3> | 355 * next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>| 356 */ 357 358 if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) { 359 DRM_ERROR("Invalid length of infoframes\n"); 360 return false; 361 } 362 363 memcpy(&avi_if[1], frame, len); 364 365 if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) { 366 DRM_DEBUG_KMS("Failed to write infoframe blocks\n"); 367 return false; 368 } 369 370 return true; 371 } 372 373 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux, 374 const u8 *buffer, ssize_t len) 375 { 376 int ret; 377 u32 val = 0; 378 u32 retry; 379 u16 reg; 380 const u8 *data = buffer; 381 382 reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET; 383 while (val < len) { 384 /* DPCD write for AVI IF can fail on a slow FW day, so retry */ 385 for (retry = 0; retry < 5; retry++) { 386 ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1); 387 if (ret == 1) { 388 break; 389 } else if (retry < 4) { 390 mdelay(50); 391 continue; 392 } else { 393 DRM_ERROR("DPCD write failed at:0x%x\n", reg); 394 return false; 395 } 396 } 397 val++; reg++; data++; 398 } 399 400 val = 0; 401 reg = LSPCON_MCA_AVI_IF_CTRL; 402 ret = drm_dp_dpcd_read(aux, reg, &val, 1); 403 if (ret < 0) { 404 DRM_ERROR("DPCD read failed, address 0x%x\n", reg); 405 return false; 406 } 407 408 /* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */ 409 val &= ~LSPCON_MCA_AVI_IF_HANDLED; 410 val |= LSPCON_MCA_AVI_IF_KICKOFF; 411 412 ret = drm_dp_dpcd_write(aux, reg, &val, 1); 413 if (ret < 0) { 414 DRM_ERROR("DPCD read failed, address 0x%x\n", reg); 415 return false; 416 } 417 418 val = 0; 419 ret = drm_dp_dpcd_read(aux, reg, &val, 1); 420 if (ret < 0) { 421 DRM_ERROR("DPCD read failed, address 0x%x\n", reg); 422 return false; 423 } 424 425 if (val == LSPCON_MCA_AVI_IF_HANDLED) 426 DRM_DEBUG_KMS("AVI IF handled by FW\n"); 427 428 return true; 429 } 430 431 void lspcon_write_infoframe(struct intel_encoder *encoder, 432 const struct intel_crtc_state *crtc_state, 433 unsigned int type, 434 const void *frame, ssize_t len) 435 { 436 bool ret; 437 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 438 struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder); 439 440 /* LSPCON only needs AVI IF */ 441 if (type != HDMI_INFOFRAME_TYPE_AVI) 442 return; 443 444 if (lspcon->vendor == LSPCON_VENDOR_MCA) 445 ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, 446 frame, len); 447 else 448 ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, 449 frame, len); 450 451 if (!ret) { 452 DRM_ERROR("Failed to write AVI infoframes\n"); 453 return; 454 } 455 456 DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n"); 457 } 458 459 void lspcon_read_infoframe(struct intel_encoder *encoder, 460 const struct intel_crtc_state *crtc_state, 461 unsigned int type, 462 void *frame, ssize_t len) 463 { 464 /* FIXME implement this */ 465 } 466 467 void lspcon_set_infoframes(struct intel_encoder *encoder, 468 bool enable, 469 const struct intel_crtc_state *crtc_state, 470 const struct drm_connector_state *conn_state) 471 { 472 ssize_t ret; 473 union hdmi_infoframe frame; 474 u8 buf[VIDEO_DIP_DATA_SIZE]; 475 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); 476 struct intel_lspcon *lspcon = &dig_port->lspcon; 477 const struct drm_display_mode *adjusted_mode = 478 &crtc_state->hw.adjusted_mode; 479 480 if (!lspcon->active) { 481 DRM_ERROR("Writing infoframes while LSPCON disabled ?\n"); 482 return; 483 } 484 485 /* FIXME precompute infoframes */ 486 487 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, 488 conn_state->connector, 489 adjusted_mode); 490 if (ret < 0) { 491 DRM_ERROR("couldn't fill AVI infoframe\n"); 492 return; 493 } 494 495 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { 496 if (crtc_state->lspcon_downsampling) 497 frame.avi.colorspace = HDMI_COLORSPACE_YUV420; 498 else 499 frame.avi.colorspace = HDMI_COLORSPACE_YUV444; 500 } else { 501 frame.avi.colorspace = HDMI_COLORSPACE_RGB; 502 } 503 504 drm_hdmi_avi_infoframe_quant_range(&frame.avi, 505 conn_state->connector, 506 adjusted_mode, 507 crtc_state->limited_color_range ? 508 HDMI_QUANTIZATION_RANGE_LIMITED : 509 HDMI_QUANTIZATION_RANGE_FULL); 510 511 ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf)); 512 if (ret < 0) { 513 DRM_ERROR("Failed to pack AVI IF\n"); 514 return; 515 } 516 517 dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI, 518 buf, ret); 519 } 520 521 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, 522 const struct intel_crtc_state *pipe_config) 523 { 524 /* FIXME actually read this from the hw */ 525 return enc_to_intel_lspcon(encoder)->active; 526 } 527 528 void lspcon_resume(struct intel_lspcon *lspcon) 529 { 530 enum drm_lspcon_mode expected_mode; 531 532 if (lspcon_wake_native_aux_ch(lspcon)) { 533 expected_mode = DRM_LSPCON_MODE_PCON; 534 lspcon_resume_in_pcon_wa(lspcon); 535 } else { 536 expected_mode = DRM_LSPCON_MODE_LS; 537 } 538 539 if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON) 540 return; 541 542 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON)) 543 DRM_ERROR("LSPCON resume failed\n"); 544 else 545 DRM_DEBUG_KMS("LSPCON resume success\n"); 546 } 547 548 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon) 549 { 550 lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON); 551 } 552 553 bool lspcon_init(struct intel_digital_port *intel_dig_port) 554 { 555 struct intel_dp *dp = &intel_dig_port->dp; 556 struct intel_lspcon *lspcon = &intel_dig_port->lspcon; 557 struct drm_device *dev = intel_dig_port->base.base.dev; 558 struct drm_i915_private *dev_priv = to_i915(dev); 559 struct drm_connector *connector = &dp->attached_connector->base; 560 561 if (!HAS_LSPCON(dev_priv)) { 562 DRM_ERROR("LSPCON is not supported on this platform\n"); 563 return false; 564 } 565 566 lspcon->active = false; 567 lspcon->mode = DRM_LSPCON_MODE_INVALID; 568 569 if (!lspcon_probe(lspcon)) { 570 DRM_ERROR("Failed to probe lspcon\n"); 571 return false; 572 } 573 574 if (!intel_dp_read_dpcd(dp)) { 575 DRM_ERROR("LSPCON DPCD read failed\n"); 576 return false; 577 } 578 579 if (!lspcon_detect_vendor(lspcon)) { 580 DRM_ERROR("LSPCON vendor detection failed\n"); 581 return false; 582 } 583 584 connector->ycbcr_420_allowed = true; 585 lspcon->active = true; 586 DRM_DEBUG_KMS("Success: LSPCON init\n"); 587 return true; 588 } 589