1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved 4 */ 5 6 #ifndef _DPU_HW_WB_H 7 #define _DPU_HW_WB_H 8 9 #include "dpu_hw_catalog.h" 10 #include "dpu_hw_mdss.h" 11 #include "dpu_hw_top.h" 12 #include "dpu_hw_util.h" 13 #include "dpu_hw_pingpong.h" 14 15 struct dpu_hw_wb; 16 17 struct dpu_hw_wb_cfg { 18 struct dpu_hw_fmt_layout dest; 19 enum dpu_intf_mode intf_mode; 20 struct drm_rect roi; 21 struct drm_rect crop; 22 }; 23 24 /** 25 * 26 * struct dpu_hw_wb_ops : Interface to the wb hw driver functions 27 * Assumption is these functions will be called after clocks are enabled 28 * @setup_outaddress: setup output address from the writeback job 29 * @setup_outformat: setup output format of writeback block from writeback job 30 * @setup_qos_lut: setup qos LUT for writeback block based on input 31 * @setup_cdp: setup chroma down prefetch block for writeback block 32 * @setup_clk_force_ctrl: setup clock force control 33 * @bind_pingpong_blk: enable/disable the connection with ping-pong block 34 */ 35 struct dpu_hw_wb_ops { 36 void (*setup_outaddress)(struct dpu_hw_wb *ctx, 37 struct dpu_hw_wb_cfg *wb); 38 39 void (*setup_outformat)(struct dpu_hw_wb *ctx, 40 struct dpu_hw_wb_cfg *wb); 41 42 void (*setup_roi)(struct dpu_hw_wb *ctx, 43 struct dpu_hw_wb_cfg *wb); 44 45 void (*setup_qos_lut)(struct dpu_hw_wb *ctx, 46 struct dpu_hw_qos_cfg *cfg); 47 48 void (*setup_cdp)(struct dpu_hw_wb *ctx, 49 const struct dpu_format *fmt, 50 bool enable); 51 52 bool (*setup_clk_force_ctrl)(struct dpu_hw_wb *ctx, 53 bool enable); 54 55 void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx, 56 const enum dpu_pingpong pp); 57 }; 58 59 /** 60 * struct dpu_hw_wb : WB driver object 61 * @hw: block hardware details 62 * @idx: hardware index number within type 63 * @wb_hw_caps: hardware capabilities 64 * @ops: function pointers 65 */ 66 struct dpu_hw_wb { 67 struct dpu_hw_blk_reg_map hw; 68 69 /* wb path */ 70 int idx; 71 const struct dpu_wb_cfg *caps; 72 73 /* ops */ 74 struct dpu_hw_wb_ops ops; 75 }; 76 77 /** 78 * dpu_hw_wb_init() - Initializes the writeback hw driver object. 79 * @cfg: wb_path catalog entry for which driver object is required 80 * @addr: mapped register io address of MDP 81 * @mdss_rev: dpu core's major and minor versions 82 * Return: Error code or allocated dpu_hw_wb context 83 */ 84 struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg, 85 void __iomem *addr, const struct dpu_mdss_version *mdss_rev); 86 87 /** 88 * dpu_hw_wb_destroy(): Destroy writeback hw driver object. 89 * @hw_wb: Pointer to writeback hw driver object 90 */ 91 void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb); 92 93 #endif /*_DPU_HW_WB_H */ 94