xref: /linux/drivers/gpu/drm/msm/dp/dp_panel.c (revision 2da68a77)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #include "dp_panel.h"
7 
8 #include <drm/drm_connector.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_print.h>
11 
12 struct dp_panel_private {
13 	struct device *dev;
14 	struct drm_device *drm_dev;
15 	struct dp_panel dp_panel;
16 	struct drm_dp_aux *aux;
17 	struct dp_link *link;
18 	struct dp_catalog *catalog;
19 	bool panel_on;
20 	bool aux_cfg_update_done;
21 };
22 
23 static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
24 {
25 	int rc = 0;
26 	size_t len;
27 	ssize_t rlen;
28 	struct dp_panel_private *panel;
29 	struct dp_link_info *link_info;
30 	u8 *dpcd, major = 0, minor = 0, temp;
31 	u32 offset = DP_DPCD_REV;
32 
33 	dpcd = dp_panel->dpcd;
34 
35 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
36 	link_info = &dp_panel->link_info;
37 
38 	rlen = drm_dp_dpcd_read(panel->aux, offset,
39 			dpcd, (DP_RECEIVER_CAP_SIZE + 1));
40 	if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
41 		DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
42 		if (rlen == -ETIMEDOUT)
43 			rc = rlen;
44 		else
45 			rc = -EINVAL;
46 
47 		goto end;
48 	}
49 
50 	temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL];
51 
52 	/* check for EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT */
53 	if (temp & BIT(7)) {
54 		drm_dbg_dp(panel->drm_dev,
55 				"using EXTENDED_RECEIVER_CAPABILITY_FIELD\n");
56 		offset = DPRX_EXTENDED_DPCD_FIELD;
57 	}
58 
59 	rlen = drm_dp_dpcd_read(panel->aux, offset,
60 		dpcd, (DP_RECEIVER_CAP_SIZE + 1));
61 	if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
62 		DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
63 		if (rlen == -ETIMEDOUT)
64 			rc = rlen;
65 		else
66 			rc = -EINVAL;
67 
68 		goto end;
69 	}
70 
71 	link_info->revision = dpcd[DP_DPCD_REV];
72 	major = (link_info->revision >> 4) & 0x0f;
73 	minor = link_info->revision & 0x0f;
74 
75 	link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
76 	link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
77 
78 	if (link_info->num_lanes > dp_panel->max_dp_lanes)
79 		link_info->num_lanes = dp_panel->max_dp_lanes;
80 
81 	/* Limit support upto HBR2 until HBR3 support is added */
82 	if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4)))
83 		link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
84 
85 	drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
86 	drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
87 	drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);
88 
89 	if (drm_dp_enhanced_frame_cap(dpcd))
90 		link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
91 
92 	dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT];
93 	dp_panel->dfp_present &= DP_DWN_STRM_PORT_PRESENT;
94 
95 	if (dp_panel->dfp_present && (dpcd[DP_DPCD_REV] > 0x10)) {
96 		dp_panel->ds_port_cnt = dpcd[DP_DOWN_STREAM_PORT_COUNT];
97 		dp_panel->ds_port_cnt &= DP_PORT_COUNT_MASK;
98 		len = DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE;
99 
100 		rlen = drm_dp_dpcd_read(panel->aux,
101 			DP_DOWNSTREAM_PORT_0, dp_panel->ds_cap_info, len);
102 		if (rlen < len) {
103 			DRM_ERROR("ds port status failed, rlen=%zd\n", rlen);
104 			rc = -EINVAL;
105 			goto end;
106 		}
107 	}
108 
109 end:
110 	return rc;
111 }
112 
113 static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
114 		u32 mode_edid_bpp, u32 mode_pclk_khz)
115 {
116 	struct dp_link_info *link_info;
117 	const u32 max_supported_bpp = 30, min_supported_bpp = 18;
118 	u32 bpp = 0, data_rate_khz = 0;
119 
120 	bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
121 
122 	link_info = &dp_panel->link_info;
123 	data_rate_khz = link_info->num_lanes * link_info->rate * 8;
124 
125 	while (bpp > min_supported_bpp) {
126 		if (mode_pclk_khz * bpp <= data_rate_khz)
127 			break;
128 		bpp -= 6;
129 	}
130 
131 	return bpp;
132 }
133 
134 static int dp_panel_update_modes(struct drm_connector *connector,
135 	struct edid *edid)
136 {
137 	int rc = 0;
138 
139 	if (edid) {
140 		rc = drm_connector_update_edid_property(connector, edid);
141 		if (rc) {
142 			DRM_ERROR("failed to update edid property %d\n", rc);
143 			return rc;
144 		}
145 		rc = drm_add_edid_modes(connector, edid);
146 		return rc;
147 	}
148 
149 	rc = drm_connector_update_edid_property(connector, NULL);
150 	if (rc)
151 		DRM_ERROR("failed to update edid property %d\n", rc);
152 
153 	return rc;
154 }
155 
156 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
157 	struct drm_connector *connector)
158 {
159 	int rc = 0, bw_code;
160 	int rlen, count;
161 	struct dp_panel_private *panel;
162 
163 	if (!dp_panel || !connector) {
164 		DRM_ERROR("invalid input\n");
165 		return -EINVAL;
166 	}
167 
168 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
169 
170 	rc = dp_panel_read_dpcd(dp_panel);
171 	if (rc) {
172 		DRM_ERROR("read dpcd failed %d\n", rc);
173 		return rc;
174 	}
175 
176 	bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
177 	if (!is_link_rate_valid(bw_code) ||
178 			!is_lane_count_valid(dp_panel->link_info.num_lanes) ||
179 			(bw_code > dp_panel->max_bw_code)) {
180 		DRM_ERROR("Illegal link rate=%d lane=%d\n", dp_panel->link_info.rate,
181 				dp_panel->link_info.num_lanes);
182 		return -EINVAL;
183 	}
184 
185 	if (dp_panel->dfp_present) {
186 		rlen = drm_dp_dpcd_read(panel->aux, DP_SINK_COUNT,
187 				&count, 1);
188 		if (rlen == 1) {
189 			count = DP_GET_SINK_COUNT(count);
190 			if (!count) {
191 				DRM_ERROR("no downstream ports connected\n");
192 				panel->link->sink_count = 0;
193 				rc = -ENOTCONN;
194 				goto end;
195 			}
196 		}
197 	}
198 
199 	kfree(dp_panel->edid);
200 	dp_panel->edid = NULL;
201 
202 	dp_panel->edid = drm_get_edid(connector,
203 					      &panel->aux->ddc);
204 	if (!dp_panel->edid) {
205 		DRM_ERROR("panel edid read failed\n");
206 		/* check edid read fail is due to unplug */
207 		if (!dp_catalog_link_is_connected(panel->catalog)) {
208 			rc = -ETIMEDOUT;
209 			goto end;
210 		}
211 	}
212 
213 	if (panel->aux_cfg_update_done) {
214 		drm_dbg_dp(panel->drm_dev,
215 				"read DPCD with updated AUX config\n");
216 		rc = dp_panel_read_dpcd(dp_panel);
217 		bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
218 		if (rc || !is_link_rate_valid(bw_code) ||
219 			!is_lane_count_valid(dp_panel->link_info.num_lanes)
220 			|| (bw_code > dp_panel->max_bw_code)) {
221 			DRM_ERROR("read dpcd failed %d\n", rc);
222 			return rc;
223 		}
224 		panel->aux_cfg_update_done = false;
225 	}
226 end:
227 	return rc;
228 }
229 
230 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel,
231 		u32 mode_edid_bpp, u32 mode_pclk_khz)
232 {
233 	struct dp_panel_private *panel;
234 	u32 bpp;
235 
236 	if (!dp_panel || !mode_edid_bpp || !mode_pclk_khz) {
237 		DRM_ERROR("invalid input\n");
238 		return 0;
239 	}
240 
241 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
242 
243 	if (dp_panel->video_test)
244 		bpp = dp_link_bit_depth_to_bpp(
245 				panel->link->test_video.test_bit_depth);
246 	else
247 		bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp,
248 				mode_pclk_khz);
249 
250 	return bpp;
251 }
252 
253 int dp_panel_get_modes(struct dp_panel *dp_panel,
254 	struct drm_connector *connector)
255 {
256 	if (!dp_panel) {
257 		DRM_ERROR("invalid input\n");
258 		return -EINVAL;
259 	}
260 
261 	if (dp_panel->edid)
262 		return dp_panel_update_modes(connector, dp_panel->edid);
263 
264 	return 0;
265 }
266 
267 static u8 dp_panel_get_edid_checksum(struct edid *edid)
268 {
269 	struct edid *last_block;
270 	u8 *raw_edid;
271 	bool is_edid_corrupt = false;
272 
273 	if (!edid) {
274 		DRM_ERROR("invalid edid input\n");
275 		return 0;
276 	}
277 
278 	raw_edid = (u8 *)edid;
279 	raw_edid += (edid->extensions * EDID_LENGTH);
280 	last_block = (struct edid *)raw_edid;
281 
282 	/* block type extension */
283 	drm_edid_block_valid(raw_edid, 1, false, &is_edid_corrupt);
284 	if (!is_edid_corrupt)
285 		return last_block->checksum;
286 
287 	DRM_ERROR("Invalid block, no checksum\n");
288 	return 0;
289 }
290 
291 void dp_panel_handle_sink_request(struct dp_panel *dp_panel)
292 {
293 	struct dp_panel_private *panel;
294 
295 	if (!dp_panel) {
296 		DRM_ERROR("invalid input\n");
297 		return;
298 	}
299 
300 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
301 
302 	if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) {
303 		u8 checksum;
304 
305 		if (dp_panel->edid)
306 			checksum = dp_panel_get_edid_checksum(dp_panel->edid);
307 		else
308 			checksum = dp_panel->connector->real_edid_checksum;
309 
310 		dp_link_send_edid_checksum(panel->link, checksum);
311 		dp_link_send_test_response(panel->link);
312 	}
313 }
314 
315 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable)
316 {
317 	struct dp_catalog *catalog;
318 	struct dp_panel_private *panel;
319 
320 	if (!dp_panel) {
321 		DRM_ERROR("invalid input\n");
322 		return;
323 	}
324 
325 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
326 	catalog = panel->catalog;
327 
328 	if (!panel->panel_on) {
329 		drm_dbg_dp(panel->drm_dev,
330 				"DP panel not enabled, handle TPG on next on\n");
331 		return;
332 	}
333 
334 	if (!enable) {
335 		dp_catalog_panel_tpg_disable(catalog);
336 		return;
337 	}
338 
339 	drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n");
340 	dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode);
341 }
342 
343 void dp_panel_dump_regs(struct dp_panel *dp_panel)
344 {
345 	struct dp_catalog *catalog;
346 	struct dp_panel_private *panel;
347 
348 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
349 	catalog = panel->catalog;
350 
351 	dp_catalog_dump_regs(catalog);
352 }
353 
354 int dp_panel_timing_cfg(struct dp_panel *dp_panel)
355 {
356 	u32 data, total_ver, total_hor;
357 	struct dp_catalog *catalog;
358 	struct dp_panel_private *panel;
359 	struct drm_display_mode *drm_mode;
360 
361 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
362 	catalog = panel->catalog;
363 	drm_mode = &panel->dp_panel.dp_mode.drm_mode;
364 
365 	drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n",
366 		drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end,
367 		drm_mode->hsync_start - drm_mode->hdisplay,
368 		drm_mode->hsync_end - drm_mode->hsync_start);
369 
370 	drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n",
371 		drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end,
372 		drm_mode->vsync_start - drm_mode->vdisplay,
373 		drm_mode->vsync_end - drm_mode->vsync_start);
374 
375 	total_hor = drm_mode->htotal;
376 
377 	total_ver = drm_mode->vtotal;
378 
379 	data = total_ver;
380 	data <<= 16;
381 	data |= total_hor;
382 
383 	catalog->total = data;
384 
385 	data = (drm_mode->vtotal - drm_mode->vsync_start);
386 	data <<= 16;
387 	data |= (drm_mode->htotal - drm_mode->hsync_start);
388 
389 	catalog->sync_start = data;
390 
391 	data = drm_mode->vsync_end - drm_mode->vsync_start;
392 	data <<= 16;
393 	data |= (panel->dp_panel.dp_mode.v_active_low << 31);
394 	data |= drm_mode->hsync_end - drm_mode->hsync_start;
395 	data |= (panel->dp_panel.dp_mode.h_active_low << 15);
396 
397 	catalog->width_blanking = data;
398 
399 	data = drm_mode->vdisplay;
400 	data <<= 16;
401 	data |= drm_mode->hdisplay;
402 
403 	catalog->dp_active = data;
404 
405 	dp_catalog_panel_timing_cfg(catalog);
406 	panel->panel_on = true;
407 
408 	return 0;
409 }
410 
411 int dp_panel_init_panel_info(struct dp_panel *dp_panel)
412 {
413 	struct drm_display_mode *drm_mode;
414 	struct dp_panel_private *panel;
415 
416 	drm_mode = &dp_panel->dp_mode.drm_mode;
417 
418 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
419 
420 	/*
421 	 * print resolution info as this is a result
422 	 * of user initiated action of cable connection
423 	 */
424 	drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n");
425 	drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n",
426 		drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode));
427 	drm_dbg_dp(panel->drm_dev,
428 			"h_porches(back|front|width) = (%d|%d|%d)\n",
429 			drm_mode->htotal - drm_mode->hsync_end,
430 			drm_mode->hsync_start - drm_mode->hdisplay,
431 			drm_mode->hsync_end - drm_mode->hsync_start);
432 	drm_dbg_dp(panel->drm_dev,
433 			"v_porches(back|front|width) = (%d|%d|%d)\n",
434 			drm_mode->vtotal - drm_mode->vsync_end,
435 			drm_mode->vsync_start - drm_mode->vdisplay,
436 			drm_mode->vsync_end - drm_mode->vsync_start);
437 	drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n",
438 				drm_mode->clock);
439 	drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp);
440 
441 	dp_panel->dp_mode.bpp = max_t(u32, 18,
442 				min_t(u32, dp_panel->dp_mode.bpp, 30));
443 	drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",
444 				dp_panel->dp_mode.bpp);
445 
446 	return 0;
447 }
448 
449 struct dp_panel *dp_panel_get(struct dp_panel_in *in)
450 {
451 	struct dp_panel_private *panel;
452 	struct dp_panel *dp_panel;
453 
454 	if (!in->dev || !in->catalog || !in->aux || !in->link) {
455 		DRM_ERROR("invalid input\n");
456 		return ERR_PTR(-EINVAL);
457 	}
458 
459 	panel = devm_kzalloc(in->dev, sizeof(*panel), GFP_KERNEL);
460 	if (!panel)
461 		return ERR_PTR(-ENOMEM);
462 
463 	panel->dev = in->dev;
464 	panel->aux = in->aux;
465 	panel->catalog = in->catalog;
466 	panel->link = in->link;
467 
468 	dp_panel = &panel->dp_panel;
469 	dp_panel->max_bw_code = DP_LINK_BW_8_1;
470 	panel->aux_cfg_update_done = false;
471 
472 	return dp_panel;
473 }
474 
475 void dp_panel_put(struct dp_panel *dp_panel)
476 {
477 	if (!dp_panel)
478 		return;
479 
480 	kfree(dp_panel->edid);
481 }
482