xref: /linux/drivers/gpu/drm/nouveau/nouveau_drv.h (revision 44f57d78)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __NOUVEAU_DRV_H__
3 #define __NOUVEAU_DRV_H__
4 
5 #define DRIVER_AUTHOR		"Nouveau Project"
6 #define DRIVER_EMAIL		"nouveau@lists.freedesktop.org"
7 
8 #define DRIVER_NAME		"nouveau"
9 #define DRIVER_DESC		"nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra K1+"
10 #define DRIVER_DATE		"20120801"
11 
12 #define DRIVER_MAJOR		1
13 #define DRIVER_MINOR		3
14 #define DRIVER_PATCHLEVEL	1
15 
16 /*
17  * 1.1.1:
18  * 	- added support for tiled system memory buffer objects
19  *      - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
20  *      - added support for compressed memory storage types on [nvc0,nve0].
21  *      - added support for software methods 0x600,0x644,0x6ac on nvc0
22  *        to control registers on the MPs to enable performance counters,
23  *        and to control the warp error enable mask (OpenGL requires out of
24  *        bounds access to local memory to be silently ignored / return 0).
25  * 1.1.2:
26  *      - fixes multiple bugs in flip completion events and timestamping
27  * 1.2.0:
28  * 	- object api exposed to userspace
29  * 	- fermi,kepler,maxwell zbc
30  * 1.2.1:
31  *      - allow concurrent access to bo's mapped read/write.
32  * 1.2.2:
33  *      - add NOUVEAU_GEM_DOMAIN_COHERENT flag
34  * 1.3.0:
35  *      - NVIF ABI modified, safe because only (current) users are test
36  *        programs that get directly linked with NVKM.
37  * 1.3.1:
38  *      - implemented limited ABI16/NVIF interop
39  */
40 
41 #include <linux/notifier.h>
42 
43 #include <nvif/client.h>
44 #include <nvif/device.h>
45 #include <nvif/ioctl.h>
46 #include <nvif/mmu.h>
47 #include <nvif/vmm.h>
48 
49 #include <drm/drmP.h>
50 
51 #include <drm/ttm/ttm_bo_api.h>
52 #include <drm/ttm/ttm_bo_driver.h>
53 #include <drm/ttm/ttm_placement.h>
54 #include <drm/ttm/ttm_memory.h>
55 #include <drm/ttm/ttm_module.h>
56 #include <drm/ttm/ttm_page_alloc.h>
57 
58 #include "uapi/drm/nouveau_drm.h"
59 
60 struct nouveau_channel;
61 struct platform_device;
62 
63 #include "nouveau_fence.h"
64 #include "nouveau_bios.h"
65 #include "nouveau_vmm.h"
66 
67 struct nouveau_drm_tile {
68 	struct nouveau_fence *fence;
69 	bool used;
70 };
71 
72 enum nouveau_drm_object_route {
73 	NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF,
74 	NVDRM_OBJECT_USIF,
75 	NVDRM_OBJECT_ABI16,
76 	NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY,
77 };
78 
79 enum nouveau_drm_notify_route {
80 	NVDRM_NOTIFY_NVIF = 0,
81 	NVDRM_NOTIFY_USIF
82 };
83 
84 enum nouveau_drm_handle {
85 	NVDRM_CHAN    = 0xcccc0000, /* |= client chid */
86 	NVDRM_NVSW    = 0x55550000,
87 };
88 
89 struct nouveau_cli {
90 	struct nvif_client base;
91 	struct nouveau_drm *drm;
92 	struct mutex mutex;
93 
94 	struct nvif_device device;
95 	struct nvif_mmu mmu;
96 	struct nouveau_vmm vmm;
97 	struct nouveau_vmm svm;
98 	const struct nvif_mclass *mem;
99 
100 	struct list_head head;
101 	void *abi16;
102 	struct list_head objects;
103 	struct list_head notifys;
104 	char name[32];
105 
106 	struct work_struct work;
107 	struct list_head worker;
108 	struct mutex lock;
109 };
110 
111 struct nouveau_cli_work {
112 	void (*func)(struct nouveau_cli_work *);
113 	struct nouveau_cli *cli;
114 	struct list_head head;
115 
116 	struct dma_fence *fence;
117 	struct dma_fence_cb cb;
118 };
119 
120 void nouveau_cli_work_queue(struct nouveau_cli *, struct dma_fence *,
121 			    struct nouveau_cli_work *);
122 
123 static inline struct nouveau_cli *
124 nouveau_cli(struct drm_file *fpriv)
125 {
126 	return fpriv ? fpriv->driver_priv : NULL;
127 }
128 
129 #include <nvif/object.h>
130 #include <nvif/device.h>
131 
132 struct nouveau_drm {
133 	struct nouveau_cli master;
134 	struct nouveau_cli client;
135 	struct drm_device *dev;
136 
137 	struct list_head clients;
138 
139 	struct {
140 		struct agp_bridge_data *bridge;
141 		u32 base;
142 		u32 size;
143 		bool cma;
144 	} agp;
145 
146 	/* TTM interface support */
147 	struct {
148 		struct ttm_bo_device bdev;
149 		atomic_t validate_sequence;
150 		int (*move)(struct nouveau_channel *,
151 			    struct ttm_buffer_object *,
152 			    struct ttm_mem_reg *, struct ttm_mem_reg *);
153 		struct nouveau_channel *chan;
154 		struct nvif_object copy;
155 		int mtrr;
156 		int type_vram;
157 		int type_host[2];
158 		int type_ncoh[2];
159 	} ttm;
160 
161 	/* GEM interface support */
162 	struct {
163 		u64 vram_available;
164 		u64 gart_available;
165 	} gem;
166 
167 	/* synchronisation */
168 	void *fence;
169 
170 	/* Global channel management. */
171 	struct {
172 		int nr;
173 		u64 context_base;
174 	} chan;
175 
176 	/* context for accelerated drm-internal operations */
177 	struct nouveau_channel *cechan;
178 	struct nouveau_channel *channel;
179 	struct nvkm_gpuobj *notify;
180 	struct nouveau_fbdev *fbcon;
181 	struct nvif_object nvsw;
182 	struct nvif_object ntfy;
183 
184 	/* nv10-nv40 tiling regions */
185 	struct {
186 		struct nouveau_drm_tile reg[15];
187 		spinlock_t lock;
188 	} tile;
189 
190 	/* modesetting */
191 	struct nvbios vbios;
192 	struct nouveau_display *display;
193 	struct work_struct hpd_work;
194 	struct work_struct fbcon_work;
195 	int fbcon_new_state;
196 #ifdef CONFIG_ACPI
197 	struct notifier_block acpi_nb;
198 #endif
199 
200 	/* power management */
201 	struct nouveau_hwmon *hwmon;
202 	struct nouveau_debugfs *debugfs;
203 
204 	/* led management */
205 	struct nouveau_led *led;
206 
207 	/* display power reference */
208 	bool have_disp_power_ref;
209 
210 	struct dev_pm_domain vga_pm_domain;
211 
212 	struct nouveau_svm *svm;
213 
214 	struct nouveau_dmem *dmem;
215 };
216 
217 static inline struct nouveau_drm *
218 nouveau_drm(struct drm_device *dev)
219 {
220 	return dev->dev_private;
221 }
222 
223 static inline bool
224 nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
225 {
226 	struct nvif_mmu *mmu = &drm->client.mmu;
227 	return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
228 }
229 
230 int nouveau_pmops_suspend(struct device *);
231 int nouveau_pmops_resume(struct device *);
232 bool nouveau_pmops_runtime(void);
233 
234 #include <nvkm/core/tegra.h>
235 
236 struct drm_device *
237 nouveau_platform_device_create(const struct nvkm_device_tegra_func *,
238 			       struct platform_device *, struct nvkm_device **);
239 void nouveau_drm_device_remove(struct drm_device *dev);
240 
241 #define NV_PRINTK(l,c,f,a...) do {                                             \
242 	struct nouveau_cli *_cli = (c);                                        \
243 	dev_##l(_cli->drm->dev->dev, "%s: "f, _cli->name, ##a);                \
244 } while(0)
245 
246 #define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a)
247 #define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a)
248 #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
249 #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
250 
251 #define NV_DEBUG(drm,f,a...) do {                                              \
252 	if (unlikely(drm_debug & DRM_UT_DRIVER))                               \
253 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
254 } while(0)
255 #define NV_ATOMIC(drm,f,a...) do {                                             \
256 	if (unlikely(drm_debug & DRM_UT_ATOMIC))                               \
257 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
258 } while(0)
259 
260 #define NV_PRINTK_ONCE(l,c,f,a...) NV_PRINTK(l##_once,c,f, ##a)
261 
262 #define NV_ERROR_ONCE(drm,f,a...) NV_PRINTK_ONCE(err, &(drm)->client, f, ##a)
263 #define NV_WARN_ONCE(drm,f,a...) NV_PRINTK_ONCE(warn, &(drm)->client, f, ##a)
264 #define NV_INFO_ONCE(drm,f,a...) NV_PRINTK_ONCE(info, &(drm)->client, f, ##a)
265 
266 extern int nouveau_modeset;
267 
268 #endif
269