xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c (revision 44f57d78)
1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "gf100.h"
25 #include "ctxgf100.h"
26 
27 #include <nvif/class.h>
28 
29 /*******************************************************************************
30  * PGRAPH register lists
31  ******************************************************************************/
32 
33 static const struct gf100_gr_init
34 gk110b_gr_init_l1c_0[] = {
35 	{ 0x419c98,   1, 0x04, 0x00000000 },
36 	{ 0x419ca8,   1, 0x04, 0x00000000 },
37 	{ 0x419cb0,   1, 0x04, 0x09000000 },
38 	{ 0x419cb4,   1, 0x04, 0x00000000 },
39 	{ 0x419cb8,   1, 0x04, 0x00b08bea },
40 	{ 0x419c84,   1, 0x04, 0x00010384 },
41 	{ 0x419cbc,   1, 0x04, 0x281b3646 },
42 	{ 0x419cc0,   2, 0x04, 0x00000000 },
43 	{ 0x419c80,   1, 0x04, 0x00020230 },
44 	{ 0x419ccc,   2, 0x04, 0x00000000 },
45 	{}
46 };
47 
48 static const struct gf100_gr_init
49 gk110b_gr_init_sm_0[] = {
50 	{ 0x419e00,   1, 0x04, 0x00000080 },
51 	{ 0x419ea0,   1, 0x04, 0x00000000 },
52 	{ 0x419ee4,   1, 0x04, 0x00000000 },
53 	{ 0x419ea4,   1, 0x04, 0x00000100 },
54 	{ 0x419ea8,   1, 0x04, 0x00000000 },
55 	{ 0x419eb4,   1, 0x04, 0x00000000 },
56 	{ 0x419ebc,   2, 0x04, 0x00000000 },
57 	{ 0x419edc,   1, 0x04, 0x00000000 },
58 	{ 0x419f00,   1, 0x04, 0x00000000 },
59 	{ 0x419ed0,   1, 0x04, 0x00002616 },
60 	{ 0x419f74,   1, 0x04, 0x00015555 },
61 	{ 0x419f80,   4, 0x04, 0x00000000 },
62 	{}
63 };
64 
65 static const struct gf100_gr_pack
66 gk110b_gr_pack_mmio[] = {
67 	{ gk104_gr_init_main_0 },
68 	{ gk110_gr_init_fe_0 },
69 	{ gf100_gr_init_pri_0 },
70 	{ gf100_gr_init_rstr2d_0 },
71 	{ gf119_gr_init_pd_0 },
72 	{ gk110_gr_init_ds_0 },
73 	{ gf100_gr_init_scc_0 },
74 	{ gk110_gr_init_sked_0 },
75 	{ gk110_gr_init_cwd_0 },
76 	{ gf119_gr_init_prop_0 },
77 	{ gf108_gr_init_gpc_unk_0 },
78 	{ gf100_gr_init_setup_0 },
79 	{ gf100_gr_init_crstr_0 },
80 	{ gf108_gr_init_setup_1 },
81 	{ gf100_gr_init_zcull_0 },
82 	{ gf119_gr_init_gpm_0 },
83 	{ gk110_gr_init_gpc_unk_1 },
84 	{ gf100_gr_init_gcc_0 },
85 	{ gk104_gr_init_gpc_unk_2 },
86 	{ gk104_gr_init_tpccs_0 },
87 	{ gk110_gr_init_tex_0 },
88 	{ gk104_gr_init_pe_0 },
89 	{ gk110b_gr_init_l1c_0 },
90 	{ gf100_gr_init_mpc_0 },
91 	{ gk110b_gr_init_sm_0 },
92 	{ gf117_gr_init_pes_0 },
93 	{ gf117_gr_init_wwdx_0 },
94 	{ gf117_gr_init_cbm_0 },
95 	{ gk104_gr_init_be_0 },
96 	{ gf100_gr_init_fe_1 },
97 	{}
98 };
99 
100 /*******************************************************************************
101  * PGRAPH engine/subdev functions
102  ******************************************************************************/
103 
104 static const struct gf100_gr_func
105 gk110b_gr = {
106 	.oneinit_tiles = gf100_gr_oneinit_tiles,
107 	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
108 	.init = gf100_gr_init,
109 	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
110 	.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
111 	.init_zcull = gf117_gr_init_zcull,
112 	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
113 	.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
114 	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
115 	.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
116 	.init_419cc0 = gf100_gr_init_419cc0,
117 	.init_419eb4 = gk110_gr_init_419eb4,
118 	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
119 	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
120 	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
121 	.init_400054 = gf100_gr_init_400054,
122 	.trap_mp = gf100_gr_trap_mp,
123 	.mmio = gk110b_gr_pack_mmio,
124 	.fecs.ucode = &gk110_gr_fecs_ucode,
125 	.gpccs.ucode = &gk110_gr_gpccs_ucode,
126 	.rops = gf100_gr_rops,
127 	.ppc_nr = 2,
128 	.grctx = &gk110b_grctx,
129 	.zbc = &gf100_gr_zbc,
130 	.sclass = {
131 		{ -1, -1, FERMI_TWOD_A },
132 		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
133 		{ -1, -1, KEPLER_B, &gf100_fermi },
134 		{ -1, -1, KEPLER_COMPUTE_B },
135 		{}
136 	}
137 };
138 
139 int
140 gk110b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
141 {
142 	return gf100_gr_new_(&gk110b_gr, device, index, pgr);
143 }
144