xref: /linux/drivers/gpu/drm/sun4i/sun4i_crtc.c (revision 44f57d78)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2015 Free Electrons
4  * Copyright (C) 2015 NextThing Co
5  *
6  * Maxime Ripard <maxime.ripard@free-electrons.com>
7  */
8 
9 #include <drm/drmP.h>
10 #include <drm/drm_atomic_helper.h>
11 #include <drm/drm_crtc.h>
12 #include <drm/drm_modes.h>
13 #include <drm/drm_probe_helper.h>
14 
15 #include <linux/clk-provider.h>
16 #include <linux/ioport.h>
17 #include <linux/of_address.h>
18 #include <linux/of_graph.h>
19 #include <linux/of_irq.h>
20 #include <linux/regmap.h>
21 
22 #include <video/videomode.h>
23 
24 #include "sun4i_backend.h"
25 #include "sun4i_crtc.h"
26 #include "sun4i_drv.h"
27 #include "sunxi_engine.h"
28 #include "sun4i_tcon.h"
29 
30 /*
31  * While this isn't really working in the DRM theory, in practice we
32  * can only ever have one encoder per TCON since we have a mux in our
33  * TCON.
34  */
35 static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)
36 {
37 	struct drm_encoder *encoder;
38 
39 	drm_for_each_encoder(encoder, crtc->dev)
40 		if (encoder->crtc == crtc)
41 			return encoder;
42 
43 	return NULL;
44 }
45 
46 static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
47 				    struct drm_crtc_state *state)
48 {
49 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
50 	struct sunxi_engine *engine = scrtc->engine;
51 	int ret = 0;
52 
53 	if (engine && engine->ops && engine->ops->atomic_check)
54 		ret = engine->ops->atomic_check(engine, state);
55 
56 	return ret;
57 }
58 
59 static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
60 				    struct drm_crtc_state *old_state)
61 {
62 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
63 	struct drm_device *dev = crtc->dev;
64 	struct sunxi_engine *engine = scrtc->engine;
65 	unsigned long flags;
66 
67 	if (crtc->state->event) {
68 		WARN_ON(drm_crtc_vblank_get(crtc) != 0);
69 
70 		spin_lock_irqsave(&dev->event_lock, flags);
71 		scrtc->event = crtc->state->event;
72 		spin_unlock_irqrestore(&dev->event_lock, flags);
73 		crtc->state->event = NULL;
74 	}
75 
76 	if (engine->ops->atomic_begin)
77 		engine->ops->atomic_begin(engine, old_state);
78 }
79 
80 static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
81 				    struct drm_crtc_state *old_state)
82 {
83 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
84 	struct drm_pending_vblank_event *event = crtc->state->event;
85 
86 	DRM_DEBUG_DRIVER("Committing plane changes\n");
87 
88 	sunxi_engine_commit(scrtc->engine);
89 
90 	if (event) {
91 		crtc->state->event = NULL;
92 
93 		spin_lock_irq(&crtc->dev->event_lock);
94 		if (drm_crtc_vblank_get(crtc) == 0)
95 			drm_crtc_arm_vblank_event(crtc, event);
96 		else
97 			drm_crtc_send_vblank_event(crtc, event);
98 		spin_unlock_irq(&crtc->dev->event_lock);
99 	}
100 }
101 
102 static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
103 				      struct drm_crtc_state *old_state)
104 {
105 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
106 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
107 
108 	DRM_DEBUG_DRIVER("Disabling the CRTC\n");
109 
110 	drm_crtc_vblank_off(crtc);
111 
112 	sun4i_tcon_set_status(scrtc->tcon, encoder, false);
113 
114 	if (crtc->state->event && !crtc->state->active) {
115 		spin_lock_irq(&crtc->dev->event_lock);
116 		drm_crtc_send_vblank_event(crtc, crtc->state->event);
117 		spin_unlock_irq(&crtc->dev->event_lock);
118 
119 		crtc->state->event = NULL;
120 	}
121 }
122 
123 static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,
124 				     struct drm_crtc_state *old_state)
125 {
126 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
127 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
128 
129 	DRM_DEBUG_DRIVER("Enabling the CRTC\n");
130 
131 	sun4i_tcon_set_status(scrtc->tcon, encoder, true);
132 
133 	drm_crtc_vblank_on(crtc);
134 }
135 
136 static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
137 {
138 	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
139 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
140 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
141 
142 	sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
143 }
144 
145 static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
146 	.atomic_check	= sun4i_crtc_atomic_check,
147 	.atomic_begin	= sun4i_crtc_atomic_begin,
148 	.atomic_flush	= sun4i_crtc_atomic_flush,
149 	.atomic_enable	= sun4i_crtc_atomic_enable,
150 	.atomic_disable	= sun4i_crtc_atomic_disable,
151 	.mode_set_nofb	= sun4i_crtc_mode_set_nofb,
152 };
153 
154 static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
155 {
156 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
157 
158 	DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
159 
160 	sun4i_tcon_enable_vblank(scrtc->tcon, true);
161 
162 	return 0;
163 }
164 
165 static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
166 {
167 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
168 
169 	DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
170 
171 	sun4i_tcon_enable_vblank(scrtc->tcon, false);
172 }
173 
174 static const struct drm_crtc_funcs sun4i_crtc_funcs = {
175 	.atomic_destroy_state	= drm_atomic_helper_crtc_destroy_state,
176 	.atomic_duplicate_state	= drm_atomic_helper_crtc_duplicate_state,
177 	.destroy		= drm_crtc_cleanup,
178 	.page_flip		= drm_atomic_helper_page_flip,
179 	.reset			= drm_atomic_helper_crtc_reset,
180 	.set_config		= drm_atomic_helper_set_config,
181 	.enable_vblank		= sun4i_crtc_enable_vblank,
182 	.disable_vblank		= sun4i_crtc_disable_vblank,
183 };
184 
185 struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
186 				   struct sunxi_engine *engine,
187 				   struct sun4i_tcon *tcon)
188 {
189 	struct sun4i_crtc *scrtc;
190 	struct drm_plane **planes;
191 	struct drm_plane *primary = NULL, *cursor = NULL;
192 	int ret, i;
193 
194 	scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
195 	if (!scrtc)
196 		return ERR_PTR(-ENOMEM);
197 	scrtc->engine = engine;
198 	scrtc->tcon = tcon;
199 
200 	/* Create our layers */
201 	planes = sunxi_engine_layers_init(drm, engine);
202 	if (IS_ERR(planes)) {
203 		dev_err(drm->dev, "Couldn't create the planes\n");
204 		return NULL;
205 	}
206 
207 	/* find primary and cursor planes for drm_crtc_init_with_planes */
208 	for (i = 0; planes[i]; i++) {
209 		struct drm_plane *plane = planes[i];
210 
211 		switch (plane->type) {
212 		case DRM_PLANE_TYPE_PRIMARY:
213 			primary = plane;
214 			break;
215 		case DRM_PLANE_TYPE_CURSOR:
216 			cursor = plane;
217 			break;
218 		default:
219 			break;
220 		}
221 	}
222 
223 	ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
224 					primary,
225 					cursor,
226 					&sun4i_crtc_funcs,
227 					NULL);
228 	if (ret) {
229 		dev_err(drm->dev, "Couldn't init DRM CRTC\n");
230 		return ERR_PTR(ret);
231 	}
232 
233 	drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
234 
235 	/* Set crtc.port to output port node of the tcon */
236 	scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
237 						   1);
238 
239 	/* Set possible_crtcs to this crtc for overlay planes */
240 	for (i = 0; planes[i]; i++) {
241 		uint32_t possible_crtcs = drm_crtc_mask(&scrtc->crtc);
242 		struct drm_plane *plane = planes[i];
243 
244 		if (plane->type == DRM_PLANE_TYPE_OVERLAY)
245 			plane->possible_crtcs = possible_crtcs;
246 	}
247 
248 	return scrtc;
249 }
250