1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright © 2018 Broadcom 4 * 5 * Authors: 6 * Eric Anholt <eric@anholt.net> 7 * Boris Brezillon <boris.brezillon@bootlin.com> 8 */ 9 10 #include <drm/drm_atomic_helper.h> 11 #include <drm/drm_fb_cma_helper.h> 12 #include <drm/drm_edid.h> 13 #include <drm/drm_panel.h> 14 #include <drm/drm_probe_helper.h> 15 #include <drm/drm_writeback.h> 16 #include <linux/clk.h> 17 #include <linux/component.h> 18 #include <linux/of_graph.h> 19 #include <linux/of_platform.h> 20 #include <linux/pm_runtime.h> 21 22 #include "vc4_drv.h" 23 #include "vc4_regs.h" 24 25 /* Base address of the output. Raster formats must be 4-byte aligned, 26 * T and LT must be 16-byte aligned or maybe utile-aligned (docs are 27 * inconsistent, but probably utile). 28 */ 29 #define TXP_DST_PTR 0x00 30 31 /* Pitch in bytes for raster images, 16-byte aligned. For tiled, it's 32 * the width in tiles. 33 */ 34 #define TXP_DST_PITCH 0x04 35 /* For T-tiled imgaes, DST_PITCH should be the number of tiles wide, 36 * shifted up. 37 */ 38 # define TXP_T_TILE_WIDTH_SHIFT 7 39 /* For LT-tiled images, DST_PITCH should be the number of utiles wide, 40 * shifted up. 41 */ 42 # define TXP_LT_TILE_WIDTH_SHIFT 4 43 44 /* Pre-rotation width/height of the image. Must match HVS config. 45 * 46 * If TFORMAT and 32-bit, limit is 1920 for 32-bit and 3840 to 16-bit 47 * and width/height must be tile or utile-aligned as appropriate. If 48 * transposing (rotating), width is limited to 1920. 49 * 50 * Height is limited to various numbers between 4088 and 4095. I'd 51 * just use 4088 to be safe. 52 */ 53 #define TXP_DIM 0x08 54 # define TXP_HEIGHT_SHIFT 16 55 # define TXP_HEIGHT_MASK GENMASK(31, 16) 56 # define TXP_WIDTH_SHIFT 0 57 # define TXP_WIDTH_MASK GENMASK(15, 0) 58 59 #define TXP_DST_CTRL 0x0c 60 /* These bits are set to 0x54 */ 61 #define TXP_PILOT_SHIFT 24 62 #define TXP_PILOT_MASK GENMASK(31, 24) 63 /* Bits 22-23 are set to 0x01 */ 64 #define TXP_VERSION_SHIFT 22 65 #define TXP_VERSION_MASK GENMASK(23, 22) 66 67 /* Powers down the internal memory. */ 68 # define TXP_POWERDOWN BIT(21) 69 70 /* Enables storing the alpha component in 8888/4444, instead of 71 * filling with ~ALPHA_INVERT. 72 */ 73 # define TXP_ALPHA_ENABLE BIT(20) 74 75 /* 4 bits, each enables stores for a channel in each set of 4 bytes. 76 * Set to 0xf for normal operation. 77 */ 78 # define TXP_BYTE_ENABLE_SHIFT 16 79 # define TXP_BYTE_ENABLE_MASK GENMASK(19, 16) 80 81 /* Debug: Generate VSTART again at EOF. */ 82 # define TXP_VSTART_AT_EOF BIT(15) 83 84 /* Debug: Terminate the current frame immediately. Stops AXI 85 * writes. 86 */ 87 # define TXP_ABORT BIT(14) 88 89 # define TXP_DITHER BIT(13) 90 91 /* Inverts alpha if TXP_ALPHA_ENABLE, chooses fill value for 92 * !TXP_ALPHA_ENABLE. 93 */ 94 # define TXP_ALPHA_INVERT BIT(12) 95 96 /* Note: I've listed the channels here in high bit (in byte 3/2/1) to 97 * low bit (in byte 0) order. 98 */ 99 # define TXP_FORMAT_SHIFT 8 100 # define TXP_FORMAT_MASK GENMASK(11, 8) 101 # define TXP_FORMAT_ABGR4444 0 102 # define TXP_FORMAT_ARGB4444 1 103 # define TXP_FORMAT_BGRA4444 2 104 # define TXP_FORMAT_RGBA4444 3 105 # define TXP_FORMAT_BGR565 6 106 # define TXP_FORMAT_RGB565 7 107 /* 888s are non-rotated, raster-only */ 108 # define TXP_FORMAT_BGR888 8 109 # define TXP_FORMAT_RGB888 9 110 # define TXP_FORMAT_ABGR8888 12 111 # define TXP_FORMAT_ARGB8888 13 112 # define TXP_FORMAT_BGRA8888 14 113 # define TXP_FORMAT_RGBA8888 15 114 115 /* If TFORMAT is set, generates LT instead of T format. */ 116 # define TXP_LINEAR_UTILE BIT(7) 117 118 /* Rotate output by 90 degrees. */ 119 # define TXP_TRANSPOSE BIT(6) 120 121 /* Generate a tiled format for V3D. */ 122 # define TXP_TFORMAT BIT(5) 123 124 /* Generates some undefined test mode output. */ 125 # define TXP_TEST_MODE BIT(4) 126 127 /* Request odd field from HVS. */ 128 # define TXP_FIELD BIT(3) 129 130 /* Raise interrupt when idle. */ 131 # define TXP_EI BIT(2) 132 133 /* Set when generating a frame, clears when idle. */ 134 # define TXP_BUSY BIT(1) 135 136 /* Starts a frame. Self-clearing. */ 137 # define TXP_GO BIT(0) 138 139 /* Number of lines received and committed to memory. */ 140 #define TXP_PROGRESS 0x10 141 142 #define TXP_READ(offset) readl(txp->regs + (offset)) 143 #define TXP_WRITE(offset, val) writel(val, txp->regs + (offset)) 144 145 struct vc4_txp { 146 struct platform_device *pdev; 147 148 struct drm_writeback_connector connector; 149 150 void __iomem *regs; 151 struct debugfs_regset32 regset; 152 }; 153 154 static inline struct vc4_txp *encoder_to_vc4_txp(struct drm_encoder *encoder) 155 { 156 return container_of(encoder, struct vc4_txp, connector.encoder); 157 } 158 159 static inline struct vc4_txp *connector_to_vc4_txp(struct drm_connector *conn) 160 { 161 return container_of(conn, struct vc4_txp, connector.base); 162 } 163 164 static const struct debugfs_reg32 txp_regs[] = { 165 VC4_REG32(TXP_DST_PTR), 166 VC4_REG32(TXP_DST_PITCH), 167 VC4_REG32(TXP_DIM), 168 VC4_REG32(TXP_DST_CTRL), 169 VC4_REG32(TXP_PROGRESS), 170 }; 171 172 static int vc4_txp_connector_get_modes(struct drm_connector *connector) 173 { 174 struct drm_device *dev = connector->dev; 175 176 return drm_add_modes_noedid(connector, dev->mode_config.max_width, 177 dev->mode_config.max_height); 178 } 179 180 static enum drm_mode_status 181 vc4_txp_connector_mode_valid(struct drm_connector *connector, 182 struct drm_display_mode *mode) 183 { 184 struct drm_device *dev = connector->dev; 185 struct drm_mode_config *mode_config = &dev->mode_config; 186 int w = mode->hdisplay, h = mode->vdisplay; 187 188 if (w < mode_config->min_width || w > mode_config->max_width) 189 return MODE_BAD_HVALUE; 190 191 if (h < mode_config->min_height || h > mode_config->max_height) 192 return MODE_BAD_VVALUE; 193 194 return MODE_OK; 195 } 196 197 static const u32 drm_fmts[] = { 198 DRM_FORMAT_RGB888, 199 DRM_FORMAT_BGR888, 200 DRM_FORMAT_XRGB8888, 201 DRM_FORMAT_XBGR8888, 202 DRM_FORMAT_ARGB8888, 203 DRM_FORMAT_ABGR8888, 204 DRM_FORMAT_RGBX8888, 205 DRM_FORMAT_BGRX8888, 206 DRM_FORMAT_RGBA8888, 207 DRM_FORMAT_BGRA8888, 208 }; 209 210 static const u32 txp_fmts[] = { 211 TXP_FORMAT_RGB888, 212 TXP_FORMAT_BGR888, 213 TXP_FORMAT_ARGB8888, 214 TXP_FORMAT_ABGR8888, 215 TXP_FORMAT_ARGB8888, 216 TXP_FORMAT_ABGR8888, 217 TXP_FORMAT_RGBA8888, 218 TXP_FORMAT_BGRA8888, 219 TXP_FORMAT_RGBA8888, 220 TXP_FORMAT_BGRA8888, 221 }; 222 223 static int vc4_txp_connector_atomic_check(struct drm_connector *conn, 224 struct drm_connector_state *conn_state) 225 { 226 struct drm_crtc_state *crtc_state; 227 struct drm_framebuffer *fb; 228 int i; 229 230 if (!conn_state->writeback_job || !conn_state->writeback_job->fb) 231 return 0; 232 233 crtc_state = drm_atomic_get_new_crtc_state(conn_state->state, 234 conn_state->crtc); 235 236 fb = conn_state->writeback_job->fb; 237 if (fb->width != crtc_state->mode.hdisplay || 238 fb->height != crtc_state->mode.vdisplay) { 239 DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n", 240 fb->width, fb->height); 241 return -EINVAL; 242 } 243 244 for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) { 245 if (fb->format->format == drm_fmts[i]) 246 break; 247 } 248 249 if (i == ARRAY_SIZE(drm_fmts)) 250 return -EINVAL; 251 252 /* Pitch must be aligned on 16 bytes. */ 253 if (fb->pitches[0] & GENMASK(3, 0)) 254 return -EINVAL; 255 256 vc4_crtc_txp_armed(crtc_state); 257 258 return 0; 259 } 260 261 static void vc4_txp_connector_atomic_commit(struct drm_connector *conn, 262 struct drm_connector_state *conn_state) 263 { 264 struct vc4_txp *txp = connector_to_vc4_txp(conn); 265 struct drm_gem_cma_object *gem; 266 struct drm_display_mode *mode; 267 struct drm_framebuffer *fb; 268 u32 ctrl; 269 int i; 270 271 if (WARN_ON(!conn_state->writeback_job || 272 !conn_state->writeback_job->fb)) 273 return; 274 275 mode = &conn_state->crtc->state->adjusted_mode; 276 fb = conn_state->writeback_job->fb; 277 278 for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) { 279 if (fb->format->format == drm_fmts[i]) 280 break; 281 } 282 283 if (WARN_ON(i == ARRAY_SIZE(drm_fmts))) 284 return; 285 286 ctrl = TXP_GO | TXP_VSTART_AT_EOF | TXP_EI | 287 VC4_SET_FIELD(0xf, TXP_BYTE_ENABLE) | 288 VC4_SET_FIELD(txp_fmts[i], TXP_FORMAT); 289 290 if (fb->format->has_alpha) 291 ctrl |= TXP_ALPHA_ENABLE; 292 293 gem = drm_fb_cma_get_gem_obj(fb, 0); 294 TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]); 295 TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]); 296 TXP_WRITE(TXP_DIM, 297 VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) | 298 VC4_SET_FIELD(mode->vdisplay, TXP_HEIGHT)); 299 300 TXP_WRITE(TXP_DST_CTRL, ctrl); 301 302 drm_writeback_queue_job(&txp->connector, conn_state); 303 } 304 305 static const struct drm_connector_helper_funcs vc4_txp_connector_helper_funcs = { 306 .get_modes = vc4_txp_connector_get_modes, 307 .mode_valid = vc4_txp_connector_mode_valid, 308 .atomic_check = vc4_txp_connector_atomic_check, 309 .atomic_commit = vc4_txp_connector_atomic_commit, 310 }; 311 312 static enum drm_connector_status 313 vc4_txp_connector_detect(struct drm_connector *connector, bool force) 314 { 315 return connector_status_connected; 316 } 317 318 static void vc4_txp_connector_destroy(struct drm_connector *connector) 319 { 320 drm_connector_unregister(connector); 321 drm_connector_cleanup(connector); 322 } 323 324 static const struct drm_connector_funcs vc4_txp_connector_funcs = { 325 .detect = vc4_txp_connector_detect, 326 .fill_modes = drm_helper_probe_single_connector_modes, 327 .destroy = vc4_txp_connector_destroy, 328 .reset = drm_atomic_helper_connector_reset, 329 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 330 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 331 }; 332 333 static void vc4_txp_encoder_disable(struct drm_encoder *encoder) 334 { 335 struct vc4_txp *txp = encoder_to_vc4_txp(encoder); 336 337 if (TXP_READ(TXP_DST_CTRL) & TXP_BUSY) { 338 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 339 340 TXP_WRITE(TXP_DST_CTRL, TXP_ABORT); 341 342 while (TXP_READ(TXP_DST_CTRL) & TXP_BUSY && 343 time_before(jiffies, timeout)) 344 ; 345 346 WARN_ON(TXP_READ(TXP_DST_CTRL) & TXP_BUSY); 347 } 348 349 TXP_WRITE(TXP_DST_CTRL, TXP_POWERDOWN); 350 } 351 352 static const struct drm_encoder_helper_funcs vc4_txp_encoder_helper_funcs = { 353 .disable = vc4_txp_encoder_disable, 354 }; 355 356 static irqreturn_t vc4_txp_interrupt(int irq, void *data) 357 { 358 struct vc4_txp *txp = data; 359 360 TXP_WRITE(TXP_DST_CTRL, TXP_READ(TXP_DST_CTRL) & ~TXP_EI); 361 vc4_crtc_handle_vblank(to_vc4_crtc(txp->connector.base.state->crtc)); 362 drm_writeback_signal_completion(&txp->connector, 0); 363 364 return IRQ_HANDLED; 365 } 366 367 static int vc4_txp_bind(struct device *dev, struct device *master, void *data) 368 { 369 struct platform_device *pdev = to_platform_device(dev); 370 struct drm_device *drm = dev_get_drvdata(master); 371 struct vc4_dev *vc4 = to_vc4_dev(drm); 372 struct vc4_txp *txp; 373 int ret, irq; 374 375 irq = platform_get_irq(pdev, 0); 376 if (irq < 0) 377 return irq; 378 379 txp = devm_kzalloc(dev, sizeof(*txp), GFP_KERNEL); 380 if (!txp) 381 return -ENOMEM; 382 383 txp->pdev = pdev; 384 385 txp->regs = vc4_ioremap_regs(pdev, 0); 386 if (IS_ERR(txp->regs)) 387 return PTR_ERR(txp->regs); 388 txp->regset.base = txp->regs; 389 txp->regset.regs = txp_regs; 390 txp->regset.nregs = ARRAY_SIZE(txp_regs); 391 392 drm_connector_helper_add(&txp->connector.base, 393 &vc4_txp_connector_helper_funcs); 394 ret = drm_writeback_connector_init(drm, &txp->connector, 395 &vc4_txp_connector_funcs, 396 &vc4_txp_encoder_helper_funcs, 397 drm_fmts, ARRAY_SIZE(drm_fmts)); 398 if (ret) 399 return ret; 400 401 ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0, 402 dev_name(dev), txp); 403 if (ret) 404 return ret; 405 406 dev_set_drvdata(dev, txp); 407 vc4->txp = txp; 408 409 vc4_debugfs_add_regset32(drm, "txp_regs", &txp->regset); 410 411 return 0; 412 } 413 414 static void vc4_txp_unbind(struct device *dev, struct device *master, 415 void *data) 416 { 417 struct drm_device *drm = dev_get_drvdata(master); 418 struct vc4_dev *vc4 = to_vc4_dev(drm); 419 struct vc4_txp *txp = dev_get_drvdata(dev); 420 421 vc4_txp_connector_destroy(&txp->connector.base); 422 423 vc4->txp = NULL; 424 } 425 426 static const struct component_ops vc4_txp_ops = { 427 .bind = vc4_txp_bind, 428 .unbind = vc4_txp_unbind, 429 }; 430 431 static int vc4_txp_probe(struct platform_device *pdev) 432 { 433 return component_add(&pdev->dev, &vc4_txp_ops); 434 } 435 436 static int vc4_txp_remove(struct platform_device *pdev) 437 { 438 component_del(&pdev->dev, &vc4_txp_ops); 439 return 0; 440 } 441 442 static const struct of_device_id vc4_txp_dt_match[] = { 443 { .compatible = "brcm,bcm2835-txp" }, 444 { /* sentinel */ }, 445 }; 446 447 struct platform_driver vc4_txp_driver = { 448 .probe = vc4_txp_probe, 449 .remove = vc4_txp_remove, 450 .driver = { 451 .name = "vc4_txp", 452 .of_match_table = vc4_txp_dt_match, 453 }, 454 }; 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